1/* 2 * linux/arch/m68k/kernel/traps.c 3 * 4 * Copyright (C) 1993, 1994 by Hamish Macdonald 5 * 6 * 68040 fixes by Michael Rausch 7 * 68040 fixes by Martin Apel 8 * 68040 fixes and writeback by Richard Zidlicky 9 * 68060 fixes by Roman Hodek 10 * 68060 fixes by Jesper Skov 11 * 12 * This file is subject to the terms and conditions of the GNU General Public 13 * License. See the file COPYING in the main directory of this archive 14 * for more details. 15 */ 16 17/* 18 * Sets up all exception vectors 19 */ 20 21#include <linux/sched.h> 22#include <linux/signal.h> 23#include <linux/kernel.h> 24#include <linux/mm.h> 25#include <linux/module.h> 26#include <linux/user.h> 27#include <linux/string.h> 28#include <linux/linkage.h> 29#include <linux/init.h> 30#include <linux/ptrace.h> 31#include <linux/kallsyms.h> 32 33#include <asm/setup.h> 34#include <asm/fpu.h> 35#include <asm/system.h> 36#include <asm/uaccess.h> 37#include <asm/traps.h> 38#include <asm/pgalloc.h> 39#include <asm/machdep.h> 40#include <asm/siginfo.h> 41 42/* assembler routines */ 43asmlinkage void system_call(void); 44asmlinkage void buserr(void); 45asmlinkage void trap(void); 46asmlinkage void nmihandler(void); 47#ifdef CONFIG_M68KFPU_EMU 48asmlinkage void fpu_emu(void); 49#endif 50 51e_vector vectors[256] = { 52 [VEC_BUSERR] = buserr, 53 [VEC_SYS] = system_call, 54}; 55 56/* nmi handler for the Amiga */ 57asm(".text\n" 58 __ALIGN_STR "\n" 59 "nmihandler: rte"); 60 61/* 62 * this must be called very early as the kernel might 63 * use some instruction that are emulated on the 060 64 */ 65void __init base_trap_init(void) 66{ 67 if(MACH_IS_SUN3X) { 68 extern e_vector *sun3x_prom_vbr; 69 70 __asm__ volatile ("movec %%vbr, %0" : "=r" (sun3x_prom_vbr)); 71 } 72 73 /* setup the exception vector table */ 74 __asm__ volatile ("movec %0,%%vbr" : : "r" ((void*)vectors)); 75 76 if (CPU_IS_060) { 77 /* set up ISP entry points */ 78 asmlinkage void unimp_vec(void) asm ("_060_isp_unimp"); 79 80 vectors[VEC_UNIMPII] = unimp_vec; 81 } 82} 83 84void __init trap_init (void) 85{ 86 int i; 87 88 for (i = VEC_SPUR; i <= VEC_INT7; i++) 89 vectors[i] = bad_inthandler; 90 91 for (i = 0; i < VEC_USER; i++) 92 if (!vectors[i]) 93 vectors[i] = trap; 94 95 for (i = VEC_USER; i < 256; i++) 96 vectors[i] = bad_inthandler; 97 98#ifdef CONFIG_M68KFPU_EMU 99 if (FPU_IS_EMU) 100 vectors[VEC_LINE11] = fpu_emu; 101#endif 102 103 if (CPU_IS_040 && !FPU_IS_EMU) { 104 /* set up FPSP entry points */ 105 asmlinkage void dz_vec(void) asm ("dz"); 106 asmlinkage void inex_vec(void) asm ("inex"); 107 asmlinkage void ovfl_vec(void) asm ("ovfl"); 108 asmlinkage void unfl_vec(void) asm ("unfl"); 109 asmlinkage void snan_vec(void) asm ("snan"); 110 asmlinkage void operr_vec(void) asm ("operr"); 111 asmlinkage void bsun_vec(void) asm ("bsun"); 112 asmlinkage void fline_vec(void) asm ("fline"); 113 asmlinkage void unsupp_vec(void) asm ("unsupp"); 114 115 vectors[VEC_FPDIVZ] = dz_vec; 116 vectors[VEC_FPIR] = inex_vec; 117 vectors[VEC_FPOVER] = ovfl_vec; 118 vectors[VEC_FPUNDER] = unfl_vec; 119 vectors[VEC_FPNAN] = snan_vec; 120 vectors[VEC_FPOE] = operr_vec; 121 vectors[VEC_FPBRUC] = bsun_vec; 122 vectors[VEC_LINE11] = fline_vec; 123 vectors[VEC_FPUNSUP] = unsupp_vec; 124 } 125 126 if (CPU_IS_060 && !FPU_IS_EMU) { 127 /* set up IFPSP entry points */ 128 asmlinkage void snan_vec6(void) asm ("_060_fpsp_snan"); 129 asmlinkage void operr_vec6(void) asm ("_060_fpsp_operr"); 130 asmlinkage void ovfl_vec6(void) asm ("_060_fpsp_ovfl"); 131 asmlinkage void unfl_vec6(void) asm ("_060_fpsp_unfl"); 132 asmlinkage void dz_vec6(void) asm ("_060_fpsp_dz"); 133 asmlinkage void inex_vec6(void) asm ("_060_fpsp_inex"); 134 asmlinkage void fline_vec6(void) asm ("_060_fpsp_fline"); 135 asmlinkage void unsupp_vec6(void) asm ("_060_fpsp_unsupp"); 136 asmlinkage void effadd_vec6(void) asm ("_060_fpsp_effadd"); 137 138 vectors[VEC_FPNAN] = snan_vec6; 139 vectors[VEC_FPOE] = operr_vec6; 140 vectors[VEC_FPOVER] = ovfl_vec6; 141 vectors[VEC_FPUNDER] = unfl_vec6; 142 vectors[VEC_FPDIVZ] = dz_vec6; 143 vectors[VEC_FPIR] = inex_vec6; 144 vectors[VEC_LINE11] = fline_vec6; 145 vectors[VEC_FPUNSUP] = unsupp_vec6; 146 vectors[VEC_UNIMPEA] = effadd_vec6; 147 } 148 149 /* if running on an amiga, make the NMI interrupt do nothing */ 150 if (MACH_IS_AMIGA) { 151 vectors[VEC_INT7] = nmihandler; 152 } 153} 154 155 156static const char *vec_names[] = { 157 [VEC_RESETSP] = "RESET SP", 158 [VEC_RESETPC] = "RESET PC", 159 [VEC_BUSERR] = "BUS ERROR", 160 [VEC_ADDRERR] = "ADDRESS ERROR", 161 [VEC_ILLEGAL] = "ILLEGAL INSTRUCTION", 162 [VEC_ZERODIV] = "ZERO DIVIDE", 163 [VEC_CHK] = "CHK", 164 [VEC_TRAP] = "TRAPcc", 165 [VEC_PRIV] = "PRIVILEGE VIOLATION", 166 [VEC_TRACE] = "TRACE", 167 [VEC_LINE10] = "LINE 1010", 168 [VEC_LINE11] = "LINE 1111", 169 [VEC_RESV12] = "UNASSIGNED RESERVED 12", 170 [VEC_COPROC] = "COPROCESSOR PROTOCOL VIOLATION", 171 [VEC_FORMAT] = "FORMAT ERROR", 172 [VEC_UNINT] = "UNINITIALIZED INTERRUPT", 173 [VEC_RESV16] = "UNASSIGNED RESERVED 16", 174 [VEC_RESV17] = "UNASSIGNED RESERVED 17", 175 [VEC_RESV18] = "UNASSIGNED RESERVED 18", 176 [VEC_RESV19] = "UNASSIGNED RESERVED 19", 177 [VEC_RESV20] = "UNASSIGNED RESERVED 20", 178 [VEC_RESV21] = "UNASSIGNED RESERVED 21", 179 [VEC_RESV22] = "UNASSIGNED RESERVED 22", 180 [VEC_RESV23] = "UNASSIGNED RESERVED 23", 181 [VEC_SPUR] = "SPURIOUS INTERRUPT", 182 [VEC_INT1] = "LEVEL 1 INT", 183 [VEC_INT2] = "LEVEL 2 INT", 184 [VEC_INT3] = "LEVEL 3 INT", 185 [VEC_INT4] = "LEVEL 4 INT", 186 [VEC_INT5] = "LEVEL 5 INT", 187 [VEC_INT6] = "LEVEL 6 INT", 188 [VEC_INT7] = "LEVEL 7 INT", 189 [VEC_SYS] = "SYSCALL", 190 [VEC_TRAP1] = "TRAP #1", 191 [VEC_TRAP2] = "TRAP #2", 192 [VEC_TRAP3] = "TRAP #3", 193 [VEC_TRAP4] = "TRAP #4", 194 [VEC_TRAP5] = "TRAP #5", 195 [VEC_TRAP6] = "TRAP #6", 196 [VEC_TRAP7] = "TRAP #7", 197 [VEC_TRAP8] = "TRAP #8", 198 [VEC_TRAP9] = "TRAP #9", 199 [VEC_TRAP10] = "TRAP #10", 200 [VEC_TRAP11] = "TRAP #11", 201 [VEC_TRAP12] = "TRAP #12", 202 [VEC_TRAP13] = "TRAP #13", 203 [VEC_TRAP14] = "TRAP #14", 204 [VEC_TRAP15] = "TRAP #15", 205 [VEC_FPBRUC] = "FPCP BSUN", 206 [VEC_FPIR] = "FPCP INEXACT", 207 [VEC_FPDIVZ] = "FPCP DIV BY 0", 208 [VEC_FPUNDER] = "FPCP UNDERFLOW", 209 [VEC_FPOE] = "FPCP OPERAND ERROR", 210 [VEC_FPOVER] = "FPCP OVERFLOW", 211 [VEC_FPNAN] = "FPCP SNAN", 212 [VEC_FPUNSUP] = "FPCP UNSUPPORTED OPERATION", 213 [VEC_MMUCFG] = "MMU CONFIGURATION ERROR", 214 [VEC_MMUILL] = "MMU ILLEGAL OPERATION ERROR", 215 [VEC_MMUACC] = "MMU ACCESS LEVEL VIOLATION ERROR", 216 [VEC_RESV59] = "UNASSIGNED RESERVED 59", 217 [VEC_UNIMPEA] = "UNASSIGNED RESERVED 60", 218 [VEC_UNIMPII] = "UNASSIGNED RESERVED 61", 219 [VEC_RESV62] = "UNASSIGNED RESERVED 62", 220 [VEC_RESV63] = "UNASSIGNED RESERVED 63", 221}; 222 223static const char *space_names[] = { 224 [0] = "Space 0", 225 [USER_DATA] = "User Data", 226 [USER_PROGRAM] = "User Program", 227#ifndef CONFIG_SUN3 228 [3] = "Space 3", 229#else 230 [FC_CONTROL] = "Control", 231#endif 232 [4] = "Space 4", 233 [SUPER_DATA] = "Super Data", 234 [SUPER_PROGRAM] = "Super Program", 235 [CPU_SPACE] = "CPU" 236}; 237 238void die_if_kernel(char *,struct pt_regs *,int); 239asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address, 240 unsigned long error_code); 241int send_fault_sig(struct pt_regs *regs); 242 243asmlinkage void trap_c(struct frame *fp); 244 245#if defined(CONFIG_M68060) 246static inline void access_error060 (struct frame *fp) 247{ 248 unsigned long fslw = fp->un.fmt4.pc; /* is really FSLW for access error */ 249 250#ifdef DEBUG 251 printk("fslw=%#lx, fa=%#lx\n", fslw, fp->un.fmt4.effaddr); 252#endif 253 254 if (fslw & MMU060_BPE) { 255 /* branch prediction error -> clear branch cache */ 256 __asm__ __volatile__ ("movec %/cacr,%/d0\n\t" 257 "orl #0x00400000,%/d0\n\t" 258 "movec %/d0,%/cacr" 259 : : : "d0" ); 260 /* return if there's no other error */ 261 if (!(fslw & MMU060_ERR_BITS) && !(fslw & MMU060_SEE)) 262 return; 263 } 264 265 if (fslw & (MMU060_DESC_ERR | MMU060_WP | MMU060_SP)) { 266 unsigned long errorcode; 267 unsigned long addr = fp->un.fmt4.effaddr; 268 269 if (fslw & MMU060_MA) 270 addr = (addr + PAGE_SIZE - 1) & PAGE_MASK; 271 272 errorcode = 1; 273 if (fslw & MMU060_DESC_ERR) { 274 __flush_tlb040_one(addr); 275 errorcode = 0; 276 } 277 if (fslw & MMU060_W) 278 errorcode |= 2; 279#ifdef DEBUG 280 printk("errorcode = %d\n", errorcode ); 281#endif 282 do_page_fault(&fp->ptregs, addr, errorcode); 283 } else if (fslw & (MMU060_SEE)){ 284 /* Software Emulation Error. 285 * fault during mem_read/mem_write in ifpsp060/os.S 286 */ 287 send_fault_sig(&fp->ptregs); 288 } else if (!(fslw & (MMU060_RE|MMU060_WE)) || 289 send_fault_sig(&fp->ptregs) > 0) { 290 printk("pc=%#lx, fa=%#lx\n", fp->ptregs.pc, fp->un.fmt4.effaddr); 291 printk( "68060 access error, fslw=%lx\n", fslw ); 292 trap_c( fp ); 293 } 294} 295#endif /* CONFIG_M68060 */ 296 297#if defined(CONFIG_M68040) 298static inline unsigned long probe040(int iswrite, unsigned long addr, int wbs) 299{ 300 unsigned long mmusr; 301 mm_segment_t old_fs = get_fs(); 302 303 set_fs(MAKE_MM_SEG(wbs)); 304 305 if (iswrite) 306 asm volatile (".chip 68040; ptestw (%0); .chip 68k" : : "a" (addr)); 307 else 308 asm volatile (".chip 68040; ptestr (%0); .chip 68k" : : "a" (addr)); 309 310 asm volatile (".chip 68040; movec %%mmusr,%0; .chip 68k" : "=r" (mmusr)); 311 312 set_fs(old_fs); 313 314 return mmusr; 315} 316 317static inline int do_040writeback1(unsigned short wbs, unsigned long wba, 318 unsigned long wbd) 319{ 320 int res = 0; 321 mm_segment_t old_fs = get_fs(); 322 323 /* set_fs can not be moved, otherwise put_user() may oops */ 324 set_fs(MAKE_MM_SEG(wbs)); 325 326 switch (wbs & WBSIZ_040) { 327 case BA_SIZE_BYTE: 328 res = put_user(wbd & 0xff, (char __user *)wba); 329 break; 330 case BA_SIZE_WORD: 331 res = put_user(wbd & 0xffff, (short __user *)wba); 332 break; 333 case BA_SIZE_LONG: 334 res = put_user(wbd, (int __user *)wba); 335 break; 336 } 337 338 /* set_fs can not be moved, otherwise put_user() may oops */ 339 set_fs(old_fs); 340 341 342#ifdef DEBUG 343 printk("do_040writeback1, res=%d\n",res); 344#endif 345 346 return res; 347} 348 349/* after an exception in a writeback the stack frame corresponding 350 * to that exception is discarded, set a few bits in the old frame 351 * to simulate what it should look like 352 */ 353static inline void fix_xframe040(struct frame *fp, unsigned long wba, unsigned short wbs) 354{ 355 fp->un.fmt7.faddr = wba; 356 fp->un.fmt7.ssw = wbs & 0xff; 357 if (wba != current->thread.faddr) 358 fp->un.fmt7.ssw |= MA_040; 359} 360 361static inline void do_040writebacks(struct frame *fp) 362{ 363 int res = 0; 364 365 if ((fp->un.fmt7.wb2s & WBV_040) && 366 !(fp->un.fmt7.wb2s & WBTT_040)) { 367 res = do_040writeback1(fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, 368 fp->un.fmt7.wb2d); 369 if (res) 370 fix_xframe040(fp, fp->un.fmt7.wb2a, fp->un.fmt7.wb2s); 371 else 372 fp->un.fmt7.wb2s = 0; 373 } 374 375 /* do the 2nd wb only if the first one was successful (except for a kernel wb) */ 376 if (fp->un.fmt7.wb3s & WBV_040 && (!res || fp->un.fmt7.wb3s & 4)) { 377 res = do_040writeback1(fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, 378 fp->un.fmt7.wb3d); 379 if (res) 380 { 381 fix_xframe040(fp, fp->un.fmt7.wb3a, fp->un.fmt7.wb3s); 382 383 fp->un.fmt7.wb2s = fp->un.fmt7.wb3s; 384 fp->un.fmt7.wb3s &= (~WBV_040); 385 fp->un.fmt7.wb2a = fp->un.fmt7.wb3a; 386 fp->un.fmt7.wb2d = fp->un.fmt7.wb3d; 387 } 388 else 389 fp->un.fmt7.wb3s = 0; 390 } 391 392 if (res) 393 send_fault_sig(&fp->ptregs); 394} 395 396/* 397 * called from sigreturn(), must ensure userspace code didn't 398 * manipulate exception frame to circumvent protection, then complete 399 * pending writebacks 400 * we just clear TM2 to turn it into a userspace access 401 */ 402asmlinkage void berr_040cleanup(struct frame *fp) 403{ 404 fp->un.fmt7.wb2s &= ~4; 405 fp->un.fmt7.wb3s &= ~4; 406 407 do_040writebacks(fp); 408} 409 410static inline void access_error040(struct frame *fp) 411{ 412 unsigned short ssw = fp->un.fmt7.ssw; 413 unsigned long mmusr; 414 415#ifdef DEBUG 416 printk("ssw=%#x, fa=%#lx\n", ssw, fp->un.fmt7.faddr); 417 printk("wb1s=%#x, wb2s=%#x, wb3s=%#x\n", fp->un.fmt7.wb1s, 418 fp->un.fmt7.wb2s, fp->un.fmt7.wb3s); 419 printk ("wb2a=%lx, wb3a=%lx, wb2d=%lx, wb3d=%lx\n", 420 fp->un.fmt7.wb2a, fp->un.fmt7.wb3a, 421 fp->un.fmt7.wb2d, fp->un.fmt7.wb3d); 422#endif 423 424 if (ssw & ATC_040) { 425 unsigned long addr = fp->un.fmt7.faddr; 426 unsigned long errorcode; 427 428 /* 429 * The MMU status has to be determined AFTER the address 430 * has been corrected if there was a misaligned access (MA). 431 */ 432 if (ssw & MA_040) 433 addr = (addr + 7) & -8; 434 435 /* MMU error, get the MMUSR info for this access */ 436 mmusr = probe040(!(ssw & RW_040), addr, ssw); 437#ifdef DEBUG 438 printk("mmusr = %lx\n", mmusr); 439#endif 440 errorcode = 1; 441 if (!(mmusr & MMU_R_040)) { 442 /* clear the invalid atc entry */ 443 __flush_tlb040_one(addr); 444 errorcode = 0; 445 } 446 447 /* despite what documentation seems to say, RMW 448 * accesses have always both the LK and RW bits set */ 449 if (!(ssw & RW_040) || (ssw & LK_040)) 450 errorcode |= 2; 451 452 if (do_page_fault(&fp->ptregs, addr, errorcode)) { 453#ifdef DEBUG 454 printk("do_page_fault() !=0\n"); 455#endif 456 if (user_mode(&fp->ptregs)){ 457 /* delay writebacks after signal delivery */ 458#ifdef DEBUG 459 printk(".. was usermode - return\n"); 460#endif 461 return; 462 } 463 /* disable writeback into user space from kernel 464 * (if do_page_fault didn't fix the mapping, 465 * the writeback won't do good) 466 */ 467disable_wb: 468#ifdef DEBUG 469 printk(".. disabling wb2\n"); 470#endif 471 if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr) 472 fp->un.fmt7.wb2s &= ~WBV_040; 473 if (fp->un.fmt7.wb3a == fp->un.fmt7.faddr) 474 fp->un.fmt7.wb3s &= ~WBV_040; 475 } 476 } else { 477 /* In case of a bus error we either kill the process or expect 478 * the kernel to catch the fault, which then is also responsible 479 * for cleaning up the mess. 480 */ 481 current->thread.signo = SIGBUS; 482 current->thread.faddr = fp->un.fmt7.faddr; 483 if (send_fault_sig(&fp->ptregs) >= 0) 484 printk("68040 bus error (ssw=%x, faddr=%lx)\n", ssw, 485 fp->un.fmt7.faddr); 486 goto disable_wb; 487 } 488 489 do_040writebacks(fp); 490} 491#endif /* CONFIG_M68040 */ 492 493#if defined(CONFIG_SUN3) 494#include <asm/sun3mmu.h> 495 496extern int mmu_emu_handle_fault (unsigned long, int, int); 497 498/* sun3 version of bus_error030 */ 499 500static inline void bus_error030 (struct frame *fp) 501{ 502 unsigned char buserr_type = sun3_get_buserr (); 503 unsigned long addr, errorcode; 504 unsigned short ssw = fp->un.fmtb.ssw; 505 extern unsigned long _sun3_map_test_start, _sun3_map_test_end; 506 507#ifdef DEBUG 508 if (ssw & (FC | FB)) 509 printk ("Instruction fault at %#010lx\n", 510 ssw & FC ? 511 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2 512 : 513 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr); 514 if (ssw & DF) 515 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n", 516 ssw & RW ? "read" : "write", 517 fp->un.fmtb.daddr, 518 space_names[ssw & DFC], fp->ptregs.pc); 519#endif 520 521 /* 522 * Check if this page should be demand-mapped. This needs to go before 523 * the testing for a bad kernel-space access (demand-mapping applies 524 * to kernel accesses too). 525 */ 526 527 if ((ssw & DF) 528 && (buserr_type & (SUN3_BUSERR_PROTERR | SUN3_BUSERR_INVALID))) { 529 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 0)) 530 return; 531 } 532 533 /* Check for kernel-space pagefault (BAD). */ 534 if (fp->ptregs.sr & PS_S) { 535 /* kernel fault must be a data fault to user space */ 536 if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) { 537 // try checking the kernel mappings before surrender 538 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 1)) 539 return; 540 /* instruction fault or kernel data fault! */ 541 if (ssw & (FC | FB)) 542 printk ("Instruction fault at %#010lx\n", 543 fp->ptregs.pc); 544 if (ssw & DF) { 545 /* was this fault incurred testing bus mappings? */ 546 if((fp->ptregs.pc >= (unsigned long)&_sun3_map_test_start) && 547 (fp->ptregs.pc <= (unsigned long)&_sun3_map_test_end)) { 548 send_fault_sig(&fp->ptregs); 549 return; 550 } 551 552 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n", 553 ssw & RW ? "read" : "write", 554 fp->un.fmtb.daddr, 555 space_names[ssw & DFC], fp->ptregs.pc); 556 } 557 printk ("BAD KERNEL BUSERR\n"); 558 559 die_if_kernel("Oops", &fp->ptregs,0); 560 force_sig(SIGKILL, current); 561 return; 562 } 563 } else { 564 /* user fault */ 565 if (!(ssw & (FC | FB)) && !(ssw & DF)) 566 /* not an instruction fault or data fault! BAD */ 567 panic ("USER BUSERR w/o instruction or data fault"); 568 } 569 570 571 /* First handle the data fault, if any. */ 572 if (ssw & DF) { 573 addr = fp->un.fmtb.daddr; 574 575// errorcode bit 0: 0 -> no page 1 -> protection fault 576// errorcode bit 1: 0 -> read fault 1 -> write fault 577 578// (buserr_type & SUN3_BUSERR_PROTERR) -> protection fault 579// (buserr_type & SUN3_BUSERR_INVALID) -> invalid page fault 580 581 if (buserr_type & SUN3_BUSERR_PROTERR) 582 errorcode = 0x01; 583 else if (buserr_type & SUN3_BUSERR_INVALID) 584 errorcode = 0x00; 585 else { 586#ifdef DEBUG 587 printk ("*** unexpected busfault type=%#04x\n", buserr_type); 588 printk ("invalid %s access at %#lx from pc %#lx\n", 589 !(ssw & RW) ? "write" : "read", addr, 590 fp->ptregs.pc); 591#endif 592 die_if_kernel ("Oops", &fp->ptregs, buserr_type); 593 force_sig (SIGBUS, current); 594 return; 595 } 596 597//todo: wtf is RM bit? --m 598 if (!(ssw & RW) || ssw & RM) 599 errorcode |= 0x02; 600 601 /* Handle page fault. */ 602 do_page_fault (&fp->ptregs, addr, errorcode); 603 604 /* Retry the data fault now. */ 605 return; 606 } 607 608 /* Now handle the instruction fault. */ 609 610 /* Get the fault address. */ 611 if (fp->ptregs.format == 0xA) 612 addr = fp->ptregs.pc + 4; 613 else 614 addr = fp->un.fmtb.baddr; 615 if (ssw & FC) 616 addr -= 2; 617 618 if (buserr_type & SUN3_BUSERR_INVALID) { 619 if (!mmu_emu_handle_fault (fp->un.fmtb.daddr, 1, 0)) 620 do_page_fault (&fp->ptregs, addr, 0); 621 } else { 622#ifdef DEBUG 623 printk ("protection fault on insn access (segv).\n"); 624#endif 625 force_sig (SIGSEGV, current); 626 } 627} 628#else 629#if defined(CPU_M68020_OR_M68030) 630static inline void bus_error030 (struct frame *fp) 631{ 632 volatile unsigned short temp; 633 unsigned short mmusr; 634 unsigned long addr, errorcode; 635 unsigned short ssw = fp->un.fmtb.ssw; 636#ifdef DEBUG 637 unsigned long desc; 638 639 printk ("pid = %x ", current->pid); 640 printk ("SSW=%#06x ", ssw); 641 642 if (ssw & (FC | FB)) 643 printk ("Instruction fault at %#010lx\n", 644 ssw & FC ? 645 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2 646 : 647 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr); 648 if (ssw & DF) 649 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n", 650 ssw & RW ? "read" : "write", 651 fp->un.fmtb.daddr, 652 space_names[ssw & DFC], fp->ptregs.pc); 653#endif 654 655 /* ++andreas: If a data fault and an instruction fault happen 656 at the same time map in both pages. */ 657 658 /* First handle the data fault, if any. */ 659 if (ssw & DF) { 660 addr = fp->un.fmtb.daddr; 661 662#ifdef DEBUG 663 asm volatile ("ptestr %3,%2@,#7,%0\n\t" 664 "pmove %%psr,%1@" 665 : "=a&" (desc) 666 : "a" (&temp), "a" (addr), "d" (ssw)); 667#else 668 asm volatile ("ptestr %2,%1@,#7\n\t" 669 "pmove %%psr,%0@" 670 : : "a" (&temp), "a" (addr), "d" (ssw)); 671#endif 672 mmusr = temp; 673 674#ifdef DEBUG 675 printk("mmusr is %#x for addr %#lx in task %p\n", 676 mmusr, addr, current); 677 printk("descriptor address is %#lx, contents %#lx\n", 678 __va(desc), *(unsigned long *)__va(desc)); 679#endif 680 681 errorcode = (mmusr & MMU_I) ? 0 : 1; 682 if (!(ssw & RW) || (ssw & RM)) 683 errorcode |= 2; 684 685 if (mmusr & (MMU_I | MMU_WP)) { 686 if (ssw & 4) { 687 printk("Data %s fault at %#010lx in %s (pc=%#lx)\n", 688 ssw & RW ? "read" : "write", 689 fp->un.fmtb.daddr, 690 space_names[ssw & DFC], fp->ptregs.pc); 691 goto buserr; 692 } 693 /* Don't try to do anything further if an exception was 694 handled. */ 695 if (do_page_fault (&fp->ptregs, addr, errorcode) < 0) 696 return; 697 } else if (!(mmusr & MMU_I)) { 698 /* probably a 020 cas fault */ 699 if (!(ssw & RM) && send_fault_sig(&fp->ptregs) > 0) 700 printk("unexpected bus error (%#x,%#x)\n", ssw, mmusr); 701 } else if (mmusr & (MMU_B|MMU_L|MMU_S)) { 702 printk("invalid %s access at %#lx from pc %#lx\n", 703 !(ssw & RW) ? "write" : "read", addr, 704 fp->ptregs.pc); 705 die_if_kernel("Oops",&fp->ptregs,mmusr); 706 force_sig(SIGSEGV, current); 707 return; 708 } else { 709 710 printk("weird %s access at %#lx from pc %#lx (ssw is %#x)\n", 711 !(ssw & RW) ? "write" : "read", addr, 712 fp->ptregs.pc, ssw); 713 asm volatile ("ptestr #1,%1@,#0\n\t" 714 "pmove %%psr,%0@" 715 : /* no outputs */ 716 : "a" (&temp), "a" (addr)); 717 mmusr = temp; 718 719 printk ("level 0 mmusr is %#x\n", mmusr); 720#ifdef DEBUG 721 printk("Unknown SIGSEGV - 1\n"); 722#endif 723 die_if_kernel("Oops",&fp->ptregs,mmusr); 724 force_sig(SIGSEGV, current); 725 return; 726 } 727 728 /* setup an ATC entry for the access about to be retried */ 729 if (!(ssw & RW) || (ssw & RM)) 730 asm volatile ("ploadw %1,%0@" : /* no outputs */ 731 : "a" (addr), "d" (ssw)); 732 else 733 asm volatile ("ploadr %1,%0@" : /* no outputs */ 734 : "a" (addr), "d" (ssw)); 735 } 736 737 /* Now handle the instruction fault. */ 738 739 if (!(ssw & (FC|FB))) 740 return; 741 742 if (fp->ptregs.sr & PS_S) { 743 printk("Instruction fault at %#010lx\n", 744 fp->ptregs.pc); 745 buserr: 746 printk ("BAD KERNEL BUSERR\n"); 747 die_if_kernel("Oops",&fp->ptregs,0); 748 force_sig(SIGKILL, current); 749 return; 750 } 751 752 /* get the fault address */ 753 if (fp->ptregs.format == 10) 754 addr = fp->ptregs.pc + 4; 755 else 756 addr = fp->un.fmtb.baddr; 757 if (ssw & FC) 758 addr -= 2; 759 760 if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0) 761 /* Insn fault on same page as data fault. But we 762 should still create the ATC entry. */ 763 goto create_atc_entry; 764 765#ifdef DEBUG 766 asm volatile ("ptestr #1,%2@,#7,%0\n\t" 767 "pmove %%psr,%1@" 768 : "=a&" (desc) 769 : "a" (&temp), "a" (addr)); 770#else 771 asm volatile ("ptestr #1,%1@,#7\n\t" 772 "pmove %%psr,%0@" 773 : : "a" (&temp), "a" (addr)); 774#endif 775 mmusr = temp; 776 777#ifdef DEBUG 778 printk ("mmusr is %#x for addr %#lx in task %p\n", 779 mmusr, addr, current); 780 printk ("descriptor address is %#lx, contents %#lx\n", 781 __va(desc), *(unsigned long *)__va(desc)); 782#endif 783 784 if (mmusr & MMU_I) 785 do_page_fault (&fp->ptregs, addr, 0); 786 else if (mmusr & (MMU_B|MMU_L|MMU_S)) { 787 printk ("invalid insn access at %#lx from pc %#lx\n", 788 addr, fp->ptregs.pc); 789#ifdef DEBUG 790 printk("Unknown SIGSEGV - 2\n"); 791#endif 792 die_if_kernel("Oops",&fp->ptregs,mmusr); 793 force_sig(SIGSEGV, current); 794 return; 795 } 796 797create_atc_entry: 798 /* setup an ATC entry for the access about to be retried */ 799 asm volatile ("ploadr #2,%0@" : /* no outputs */ 800 : "a" (addr)); 801} 802#endif /* CPU_M68020_OR_M68030 */ 803#endif /* !CONFIG_SUN3 */ 804 805asmlinkage void buserr_c(struct frame *fp) 806{ 807 /* Only set esp0 if coming from user mode */ 808 if (user_mode(&fp->ptregs)) 809 current->thread.esp0 = (unsigned long) fp; 810 811#ifdef DEBUG 812 printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format); 813#endif 814 815 switch (fp->ptregs.format) { 816#if defined(CONFIG_M68060) 817 case 4: /* 68060 access error */ 818 access_error060 (fp); 819 break; 820#endif 821#if defined(CONFIG_M68040) 822 case 0x7: /* 68040 access error */ 823 access_error040 (fp); 824 break; 825#endif 826#if defined(CPU_M68020_OR_M68030) 827 case 0xa: 828 case 0xb: 829 bus_error030 (fp); 830 break; 831#endif 832 default: 833 die_if_kernel("bad frame format",&fp->ptregs,0); 834#ifdef DEBUG 835 printk("Unknown SIGSEGV - 4\n"); 836#endif 837 force_sig(SIGSEGV, current); 838 } 839} 840 841 842static int kstack_depth_to_print = 48; 843 844void show_trace(unsigned long *stack) 845{ 846 unsigned long *endstack; 847 unsigned long addr; 848 int i; 849 850 printk("Call Trace:"); 851 addr = (unsigned long)stack + THREAD_SIZE - 1; 852 endstack = (unsigned long *)(addr & -THREAD_SIZE); 853 i = 0; 854 while (stack + 1 <= endstack) { 855 addr = *stack++; 856 /* 857 * If the address is either in the text segment of the 858 * kernel, or in the region which contains vmalloc'ed 859 * memory, it *may* be the address of a calling 860 * routine; if so, print it so that someone tracing 861 * down the cause of the crash will be able to figure 862 * out the call path that was taken. 863 */ 864 if (__kernel_text_address(addr)) { 865#ifndef CONFIG_KALLSYMS 866 if (i % 5 == 0) 867 printk("\n "); 868#endif 869 printk(" [<%08lx>] %pS\n", addr, (void *)addr); 870 i++; 871 } 872 } 873 printk("\n"); 874} 875 876void show_registers(struct pt_regs *regs) 877{ 878 struct frame *fp = (struct frame *)regs; 879 mm_segment_t old_fs = get_fs(); 880 u16 c, *cp; 881 unsigned long addr; 882 int i; 883 884 print_modules(); 885 printk("PC: [<%08lx>] %pS\n", regs->pc, (void *)regs->pc); 886 printk("SR: %04x SP: %p a2: %08lx\n", regs->sr, regs, regs->a2); 887 printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n", 888 regs->d0, regs->d1, regs->d2, regs->d3); 889 printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n", 890 regs->d4, regs->d5, regs->a0, regs->a1); 891 892 printk("Process %s (pid: %d, task=%p)\n", 893 current->comm, task_pid_nr(current), current); 894 addr = (unsigned long)&fp->un; 895 printk("Frame format=%X ", regs->format); 896 switch (regs->format) { 897 case 0x2: 898 printk("instr addr=%08lx\n", fp->un.fmt2.iaddr); 899 addr += sizeof(fp->un.fmt2); 900 break; 901 case 0x3: 902 printk("eff addr=%08lx\n", fp->un.fmt3.effaddr); 903 addr += sizeof(fp->un.fmt3); 904 break; 905 case 0x4: 906 printk((CPU_IS_060 ? "fault addr=%08lx fslw=%08lx\n" 907 : "eff addr=%08lx pc=%08lx\n"), 908 fp->un.fmt4.effaddr, fp->un.fmt4.pc); 909 addr += sizeof(fp->un.fmt4); 910 break; 911 case 0x7: 912 printk("eff addr=%08lx ssw=%04x faddr=%08lx\n", 913 fp->un.fmt7.effaddr, fp->un.fmt7.ssw, fp->un.fmt7.faddr); 914 printk("wb 1 stat/addr/data: %04x %08lx %08lx\n", 915 fp->un.fmt7.wb1s, fp->un.fmt7.wb1a, fp->un.fmt7.wb1dpd0); 916 printk("wb 2 stat/addr/data: %04x %08lx %08lx\n", 917 fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, fp->un.fmt7.wb2d); 918 printk("wb 3 stat/addr/data: %04x %08lx %08lx\n", 919 fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, fp->un.fmt7.wb3d); 920 printk("push data: %08lx %08lx %08lx %08lx\n", 921 fp->un.fmt7.wb1dpd0, fp->un.fmt7.pd1, fp->un.fmt7.pd2, 922 fp->un.fmt7.pd3); 923 addr += sizeof(fp->un.fmt7); 924 break; 925 case 0x9: 926 printk("instr addr=%08lx\n", fp->un.fmt9.iaddr); 927 addr += sizeof(fp->un.fmt9); 928 break; 929 case 0xa: 930 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n", 931 fp->un.fmta.ssw, fp->un.fmta.isc, fp->un.fmta.isb, 932 fp->un.fmta.daddr, fp->un.fmta.dobuf); 933 addr += sizeof(fp->un.fmta); 934 break; 935 case 0xb: 936 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n", 937 fp->un.fmtb.ssw, fp->un.fmtb.isc, fp->un.fmtb.isb, 938 fp->un.fmtb.daddr, fp->un.fmtb.dobuf); 939 printk("baddr=%08lx dibuf=%08lx ver=%x\n", 940 fp->un.fmtb.baddr, fp->un.fmtb.dibuf, fp->un.fmtb.ver); 941 addr += sizeof(fp->un.fmtb); 942 break; 943 default: 944 printk("\n"); 945 } 946 show_stack(NULL, (unsigned long *)addr); 947 948 printk("Code:"); 949 set_fs(KERNEL_DS); 950 cp = (u16 *)regs->pc; 951 for (i = -8; i < 16; i++) { 952 if (get_user(c, cp + i) && i >= 0) { 953 printk(" Bad PC value."); 954 break; 955 } 956 printk(i ? " %04x" : " <%04x>", c); 957 } 958 set_fs(old_fs); 959 printk ("\n"); 960} 961 962void show_stack(struct task_struct *task, unsigned long *stack) 963{ 964 unsigned long *p; 965 unsigned long *endstack; 966 int i; 967 968 if (!stack) { 969 if (task) 970 stack = (unsigned long *)task->thread.esp0; 971 else 972 stack = (unsigned long *)&stack; 973 } 974 endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1) & -THREAD_SIZE); 975 976 printk("Stack from %08lx:", (unsigned long)stack); 977 p = stack; 978 for (i = 0; i < kstack_depth_to_print; i++) { 979 if (p + 1 > endstack) 980 break; 981 if (i % 8 == 0) 982 printk("\n "); 983 printk(" %08lx", *p++); 984 } 985 printk("\n"); 986 show_trace(stack); 987} 988 989/* 990 * The architecture-independent backtrace generator 991 */ 992void dump_stack(void) 993{ 994 unsigned long stack; 995 996 show_trace(&stack); 997} 998 999EXPORT_SYMBOL(dump_stack); 1000 1001void bad_super_trap (struct frame *fp) 1002{ 1003 console_verbose(); 1004 if (fp->ptregs.vector < 4 * ARRAY_SIZE(vec_names)) 1005 printk ("*** %s *** FORMAT=%X\n", 1006 vec_names[(fp->ptregs.vector) >> 2], 1007 fp->ptregs.format); 1008 else 1009 printk ("*** Exception %d *** FORMAT=%X\n", 1010 (fp->ptregs.vector) >> 2, 1011 fp->ptregs.format); 1012 if (fp->ptregs.vector >> 2 == VEC_ADDRERR && CPU_IS_020_OR_030) { 1013 unsigned short ssw = fp->un.fmtb.ssw; 1014 1015 printk ("SSW=%#06x ", ssw); 1016 1017 if (ssw & RC) 1018 printk ("Pipe stage C instruction fault at %#010lx\n", 1019 (fp->ptregs.format) == 0xA ? 1020 fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2); 1021 if (ssw & RB) 1022 printk ("Pipe stage B instruction fault at %#010lx\n", 1023 (fp->ptregs.format) == 0xA ? 1024 fp->ptregs.pc + 4 : fp->un.fmtb.baddr); 1025 if (ssw & DF) 1026 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n", 1027 ssw & RW ? "read" : "write", 1028 fp->un.fmtb.daddr, space_names[ssw & DFC], 1029 fp->ptregs.pc); 1030 } 1031 printk ("Current process id is %d\n", task_pid_nr(current)); 1032 die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0); 1033} 1034 1035asmlinkage void trap_c(struct frame *fp) 1036{ 1037 int sig; 1038 siginfo_t info; 1039 1040 if (fp->ptregs.sr & PS_S) { 1041 if ((fp->ptregs.vector >> 2) == VEC_TRACE) { 1042 /* traced a trapping instruction */ 1043 } else 1044 bad_super_trap(fp); 1045 return; 1046 } 1047 1048 /* send the appropriate signal to the user program */ 1049 switch ((fp->ptregs.vector) >> 2) { 1050 case VEC_ADDRERR: 1051 info.si_code = BUS_ADRALN; 1052 sig = SIGBUS; 1053 break; 1054 case VEC_ILLEGAL: 1055 case VEC_LINE10: 1056 case VEC_LINE11: 1057 info.si_code = ILL_ILLOPC; 1058 sig = SIGILL; 1059 break; 1060 case VEC_PRIV: 1061 info.si_code = ILL_PRVOPC; 1062 sig = SIGILL; 1063 break; 1064 case VEC_COPROC: 1065 info.si_code = ILL_COPROC; 1066 sig = SIGILL; 1067 break; 1068 case VEC_TRAP1: 1069 case VEC_TRAP2: 1070 case VEC_TRAP3: 1071 case VEC_TRAP4: 1072 case VEC_TRAP5: 1073 case VEC_TRAP6: 1074 case VEC_TRAP7: 1075 case VEC_TRAP8: 1076 case VEC_TRAP9: 1077 case VEC_TRAP10: 1078 case VEC_TRAP11: 1079 case VEC_TRAP12: 1080 case VEC_TRAP13: 1081 case VEC_TRAP14: 1082 info.si_code = ILL_ILLTRP; 1083 sig = SIGILL; 1084 break; 1085 case VEC_FPBRUC: 1086 case VEC_FPOE: 1087 case VEC_FPNAN: 1088 info.si_code = FPE_FLTINV; 1089 sig = SIGFPE; 1090 break; 1091 case VEC_FPIR: 1092 info.si_code = FPE_FLTRES; 1093 sig = SIGFPE; 1094 break; 1095 case VEC_FPDIVZ: 1096 info.si_code = FPE_FLTDIV; 1097 sig = SIGFPE; 1098 break; 1099 case VEC_FPUNDER: 1100 info.si_code = FPE_FLTUND; 1101 sig = SIGFPE; 1102 break; 1103 case VEC_FPOVER: 1104 info.si_code = FPE_FLTOVF; 1105 sig = SIGFPE; 1106 break; 1107 case VEC_ZERODIV: 1108 info.si_code = FPE_INTDIV; 1109 sig = SIGFPE; 1110 break; 1111 case VEC_CHK: 1112 case VEC_TRAP: 1113 info.si_code = FPE_INTOVF; 1114 sig = SIGFPE; 1115 break; 1116 case VEC_TRACE: /* ptrace single step */ 1117 info.si_code = TRAP_TRACE; 1118 sig = SIGTRAP; 1119 break; 1120 case VEC_TRAP15: /* breakpoint */ 1121 info.si_code = TRAP_BRKPT; 1122 sig = SIGTRAP; 1123 break; 1124 default: 1125 info.si_code = ILL_ILLOPC; 1126 sig = SIGILL; 1127 break; 1128 } 1129 info.si_signo = sig; 1130 info.si_errno = 0; 1131 switch (fp->ptregs.format) { 1132 default: 1133 info.si_addr = (void *) fp->ptregs.pc; 1134 break; 1135 case 2: 1136 info.si_addr = (void *) fp->un.fmt2.iaddr; 1137 break; 1138 case 7: 1139 info.si_addr = (void *) fp->un.fmt7.effaddr; 1140 break; 1141 case 9: 1142 info.si_addr = (void *) fp->un.fmt9.iaddr; 1143 break; 1144 case 10: 1145 info.si_addr = (void *) fp->un.fmta.daddr; 1146 break; 1147 case 11: 1148 info.si_addr = (void *) fp->un.fmtb.daddr; 1149 break; 1150 } 1151 force_sig_info (sig, &info, current); 1152} 1153 1154void die_if_kernel (char *str, struct pt_regs *fp, int nr) 1155{ 1156 if (!(fp->sr & PS_S)) 1157 return; 1158 1159 console_verbose(); 1160 printk("%s: %08x\n",str,nr); 1161 show_registers(fp); 1162 add_taint(TAINT_DIE); 1163 do_exit(SIGSEGV); 1164} 1165 1166/* 1167 * This function is called if an error occur while accessing 1168 * user-space from the fpsp040 code. 1169 */ 1170asmlinkage void fpsp040_die(void) 1171{ 1172 do_exit(SIGSEGV); 1173} 1174 1175#ifdef CONFIG_M68KFPU_EMU 1176asmlinkage void fpemu_signal(int signal, int code, void *addr) 1177{ 1178 siginfo_t info; 1179 1180 info.si_signo = signal; 1181 info.si_errno = 0; 1182 info.si_code = code; 1183 info.si_addr = addr; 1184 force_sig_info(signal, &info, current); 1185} 1186#endif 1187