1#ifndef _ASM_CRIS_IO_H 2#define _ASM_CRIS_IO_H 3 4#include <asm/page.h> /* for __va, __pa */ 5#include <arch/io.h> 6#include <linux/kernel.h> 7 8struct cris_io_operations 9{ 10 u32 (*read_mem)(void *addr, int size); 11 void (*write_mem)(u32 val, int size, void *addr); 12 u32 (*read_io)(u32 port, void *addr, int size, int count); 13 void (*write_io)(u32 port, void *addr, int size, int count); 14}; 15 16#ifdef CONFIG_PCI 17extern struct cris_io_operations *cris_iops; 18#else 19#define cris_iops ((struct cris_io_operations*)NULL) 20#endif 21 22/* 23 * Change virtual addresses to physical addresses and vv. 24 */ 25 26static inline unsigned long virt_to_phys(volatile void * address) 27{ 28 return __pa(address); 29} 30 31static inline void * phys_to_virt(unsigned long address) 32{ 33 return __va(address); 34} 35 36extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags); 37extern void __iomem * __ioremap_prot(unsigned long phys_addr, unsigned long size, pgprot_t prot); 38 39static inline void __iomem * ioremap (unsigned long offset, unsigned long size) 40{ 41 return __ioremap(offset, size, 0); 42} 43 44extern void iounmap(volatile void * __iomem addr); 45 46extern void __iomem * ioremap_nocache(unsigned long offset, unsigned long size); 47 48/* 49 * IO bus memory addresses are also 1:1 with the physical address 50 */ 51#define virt_to_bus virt_to_phys 52#define bus_to_virt phys_to_virt 53 54/* 55 * readX/writeX() are used to access memory mapped devices. On some 56 * architectures the memory mapped IO stuff needs to be accessed 57 * differently. On the CRIS architecture, we just read/write the 58 * memory location directly. 59 */ 60#ifdef CONFIG_PCI 61#define PCI_SPACE(x) ((((unsigned)(x)) & 0x10000000) == 0x10000000) 62#else 63#define PCI_SPACE(x) 0 64#endif 65static inline unsigned char readb(const volatile void __iomem *addr) 66{ 67 if (PCI_SPACE(addr) && cris_iops) 68 return cris_iops->read_mem((void*)addr, 1); 69 else 70 return *(volatile unsigned char __force *) addr; 71} 72static inline unsigned short readw(const volatile void __iomem *addr) 73{ 74 if (PCI_SPACE(addr) && cris_iops) 75 return cris_iops->read_mem((void*)addr, 2); 76 else 77 return *(volatile unsigned short __force *) addr; 78} 79static inline unsigned int readl(const volatile void __iomem *addr) 80{ 81 if (PCI_SPACE(addr) && cris_iops) 82 return cris_iops->read_mem((void*)addr, 4); 83 else 84 return *(volatile unsigned int __force *) addr; 85} 86#define readb_relaxed(addr) readb(addr) 87#define readw_relaxed(addr) readw(addr) 88#define readl_relaxed(addr) readl(addr) 89#define __raw_readb readb 90#define __raw_readw readw 91#define __raw_readl readl 92 93static inline void writeb(unsigned char b, volatile void __iomem *addr) 94{ 95 if (PCI_SPACE(addr) && cris_iops) 96 cris_iops->write_mem(b, 1, (void*)addr); 97 else 98 *(volatile unsigned char __force *) addr = b; 99} 100static inline void writew(unsigned short b, volatile void __iomem *addr) 101{ 102 if (PCI_SPACE(addr) && cris_iops) 103 cris_iops->write_mem(b, 2, (void*)addr); 104 else 105 *(volatile unsigned short __force *) addr = b; 106} 107static inline void writel(unsigned int b, volatile void __iomem *addr) 108{ 109 if (PCI_SPACE(addr) && cris_iops) 110 cris_iops->write_mem(b, 4, (void*)addr); 111 else 112 *(volatile unsigned int __force *) addr = b; 113} 114#define __raw_writeb writeb 115#define __raw_writew writew 116#define __raw_writel writel 117 118#define mmiowb() 119 120#define memset_io(a,b,c) memset((void *)(a),(b),(c)) 121#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c)) 122#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) 123 124 125/* I/O port access. Normally there is no I/O space on CRIS but when 126 * Cardbus/PCI is enabled the request is passed through the bridge. 127 */ 128 129#define IO_SPACE_LIMIT 0xffff 130#define inb(port) (cris_iops ? cris_iops->read_io(port,NULL,1,1) : 0) 131#define inw(port) (cris_iops ? cris_iops->read_io(port,NULL,2,1) : 0) 132#define inl(port) (cris_iops ? cris_iops->read_io(port,NULL,4,1) : 0) 133#define insb(port,addr,count) (cris_iops ? cris_iops->read_io(port,addr,1,count) : 0) 134#define insw(port,addr,count) (cris_iops ? cris_iops->read_io(port,addr,2,count) : 0) 135#define insl(port,addr,count) (cris_iops ? cris_iops->read_io(port,addr,4,count) : 0) 136#define outb(data,port) if (cris_iops) cris_iops->write_io(port,(void*)(unsigned)data,1,1) 137#define outw(data,port) if (cris_iops) cris_iops->write_io(port,(void*)(unsigned)data,2,1) 138#define outl(data,port) if (cris_iops) cris_iops->write_io(port,(void*)(unsigned)data,4,1) 139#define outsb(port,addr,count) if(cris_iops) cris_iops->write_io(port,(void*)addr,1,count) 140#define outsw(port,addr,count) if(cris_iops) cris_iops->write_io(port,(void*)addr,2,count) 141#define outsl(port,addr,count) if(cris_iops) cris_iops->write_io(port,(void*)addr,3,count) 142 143/* 144 * Convert a physical pointer to a virtual kernel pointer for /dev/mem 145 * access 146 */ 147#define xlate_dev_mem_ptr(p) __va(p) 148 149/* 150 * Convert a virtual cached pointer to an uncached pointer 151 */ 152#define xlate_dev_kmem_ptr(p) p 153 154#endif 155