1/* 2 * Copyright (C) 2000-2007, Axis Communications AB. 3 */ 4 5#include <linux/kernel.h> 6#include <linux/sched.h> 7#include <linux/mm.h> 8#include <linux/smp.h> 9#include <linux/errno.h> 10#include <linux/ptrace.h> 11#include <linux/user.h> 12#include <linux/signal.h> 13#include <linux/security.h> 14 15#include <asm/uaccess.h> 16#include <asm/page.h> 17#include <asm/pgtable.h> 18#include <asm/system.h> 19#include <asm/processor.h> 20#include <arch/hwregs/supp_reg.h> 21 22/* 23 * Determines which bits in CCS the user has access to. 24 * 1 = access, 0 = no access. 25 */ 26#define CCS_MASK 0x00087c00 /* SXNZVC */ 27 28#define SBIT_USER (1 << (S_CCS_BITNR + CCS_SHIFT)) 29 30static int put_debugreg(long pid, unsigned int regno, long data); 31static long get_debugreg(long pid, unsigned int regno); 32static unsigned long get_pseudo_pc(struct task_struct *child); 33void deconfigure_bp(long pid); 34 35extern unsigned long cris_signal_return_page; 36 37/* 38 * Get contents of register REGNO in task TASK. 39 */ 40long get_reg(struct task_struct *task, unsigned int regno) 41{ 42 /* USP is a special case, it's not in the pt_regs struct but 43 * in the tasks thread struct 44 */ 45 unsigned long ret; 46 47 if (regno <= PT_EDA) 48 ret = ((unsigned long *)task_pt_regs(task))[regno]; 49 else if (regno == PT_USP) 50 ret = task->thread.usp; 51 else if (regno == PT_PPC) 52 ret = get_pseudo_pc(task); 53 else if (regno <= PT_MAX) 54 ret = get_debugreg(task->pid, regno); 55 else 56 ret = 0; 57 58 return ret; 59} 60 61/* 62 * Write contents of register REGNO in task TASK. 63 */ 64int put_reg(struct task_struct *task, unsigned int regno, unsigned long data) 65{ 66 if (regno <= PT_EDA) 67 ((unsigned long *)task_pt_regs(task))[regno] = data; 68 else if (regno == PT_USP) 69 task->thread.usp = data; 70 else if (regno == PT_PPC) { 71 /* Write pseudo-PC to ERP only if changed. */ 72 if (data != get_pseudo_pc(task)) 73 task_pt_regs(task)->erp = data; 74 } else if (regno <= PT_MAX) 75 return put_debugreg(task->pid, regno, data); 76 else 77 return -1; 78 return 0; 79} 80 81void user_enable_single_step(struct task_struct *child) 82{ 83 unsigned long tmp; 84 85 /* 86 * Set up SPC if not set already (in which case we have no other 87 * choice but to trust it). 88 */ 89 if (!get_reg(child, PT_SPC)) { 90 /* In case we're stopped in a delay slot. */ 91 tmp = get_reg(child, PT_ERP) & ~1; 92 put_reg(child, PT_SPC, tmp); 93 } 94 tmp = get_reg(child, PT_CCS) | SBIT_USER; 95 put_reg(child, PT_CCS, tmp); 96} 97 98void user_disable_single_step(struct task_struct *child) 99{ 100 put_reg(child, PT_SPC, 0); 101 102 if (!get_debugreg(child->pid, PT_BP_CTRL)) { 103 unsigned long tmp; 104 /* If no h/w bp configured, disable S bit. */ 105 tmp = get_reg(child, PT_CCS) & ~SBIT_USER; 106 put_reg(child, PT_CCS, tmp); 107 } 108} 109 110/* 111 * Called by kernel/ptrace.c when detaching. 112 * 113 * Make sure the single step bit is not set. 114 */ 115void 116ptrace_disable(struct task_struct *child) 117{ 118 unsigned long tmp; 119 120 /* Deconfigure SPC and S-bit. */ 121 user_disable_single_step(child); 122 put_reg(child, PT_SPC, 0); 123 124 /* Deconfigure any watchpoints associated with the child. */ 125 deconfigure_bp(child->pid); 126} 127 128 129long arch_ptrace(struct task_struct *child, long request, long addr, long data) 130{ 131 int ret; 132 unsigned long __user *datap = (unsigned long __user *)data; 133 134 switch (request) { 135 /* Read word at location address. */ 136 case PTRACE_PEEKTEXT: 137 case PTRACE_PEEKDATA: { 138 unsigned long tmp; 139 int copied; 140 141 ret = -EIO; 142 143 /* The signal trampoline page is outside the normal user-addressable 144 * space but still accessible. This is hack to make it possible to 145 * access the signal handler code in GDB. 146 */ 147 if ((addr & PAGE_MASK) == cris_signal_return_page) { 148 /* The trampoline page is globally mapped, no page table to traverse.*/ 149 tmp = *(unsigned long*)addr; 150 } else { 151 copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0); 152 153 if (copied != sizeof(tmp)) 154 break; 155 } 156 157 ret = put_user(tmp,datap); 158 break; 159 } 160 161 /* Read the word at location address in the USER area. */ 162 case PTRACE_PEEKUSR: { 163 unsigned long tmp; 164 165 ret = -EIO; 166 if ((addr & 3) || addr < 0 || addr > PT_MAX << 2) 167 break; 168 169 tmp = get_reg(child, addr >> 2); 170 ret = put_user(tmp, datap); 171 break; 172 } 173 174 /* Write the word at location address. */ 175 case PTRACE_POKETEXT: 176 case PTRACE_POKEDATA: 177 ret = generic_ptrace_pokedata(child, addr, data); 178 break; 179 180 /* Write the word at location address in the USER area. */ 181 case PTRACE_POKEUSR: 182 ret = -EIO; 183 if ((addr & 3) || addr < 0 || addr > PT_MAX << 2) 184 break; 185 186 addr >>= 2; 187 188 if (addr == PT_CCS) { 189 /* don't allow the tracing process to change stuff like 190 * interrupt enable, kernel/user bit, dma enables etc. 191 */ 192 data &= CCS_MASK; 193 data |= get_reg(child, PT_CCS) & ~CCS_MASK; 194 } 195 if (put_reg(child, addr, data)) 196 break; 197 ret = 0; 198 break; 199 200 /* Get all GP registers from the child. */ 201 case PTRACE_GETREGS: { 202 int i; 203 unsigned long tmp; 204 205 for (i = 0; i <= PT_MAX; i++) { 206 tmp = get_reg(child, i); 207 208 if (put_user(tmp, datap)) { 209 ret = -EFAULT; 210 goto out_tsk; 211 } 212 213 datap++; 214 } 215 216 ret = 0; 217 break; 218 } 219 220 /* Set all GP registers in the child. */ 221 case PTRACE_SETREGS: { 222 int i; 223 unsigned long tmp; 224 225 for (i = 0; i <= PT_MAX; i++) { 226 if (get_user(tmp, datap)) { 227 ret = -EFAULT; 228 goto out_tsk; 229 } 230 231 if (i == PT_CCS) { 232 tmp &= CCS_MASK; 233 tmp |= get_reg(child, PT_CCS) & ~CCS_MASK; 234 } 235 236 put_reg(child, i, tmp); 237 datap++; 238 } 239 240 ret = 0; 241 break; 242 } 243 244 default: 245 ret = ptrace_request(child, request, addr, data); 246 break; 247 } 248 249out_tsk: 250 return ret; 251} 252 253void do_syscall_trace(void) 254{ 255 if (!test_thread_flag(TIF_SYSCALL_TRACE)) 256 return; 257 258 if (!(current->ptrace & PT_PTRACED)) 259 return; 260 261 /* the 0x80 provides a way for the tracing parent to distinguish 262 between a syscall stop and SIGTRAP delivery */ 263 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) 264 ? 0x80 : 0)); 265 266 /* 267 * This isn't the same as continuing with a signal, but it will do for 268 * normal use. 269 */ 270 if (current->exit_code) { 271 send_sig(current->exit_code, current, 1); 272 current->exit_code = 0; 273 } 274} 275 276/* Returns the size of an instruction that has a delay slot. */ 277 278static int insn_size(struct task_struct *child, unsigned long pc) 279{ 280 unsigned long opcode; 281 int copied; 282 int opsize = 0; 283 284 /* Read the opcode at pc (do what PTRACE_PEEKTEXT would do). */ 285 copied = access_process_vm(child, pc, &opcode, sizeof(opcode), 0); 286 if (copied != sizeof(opcode)) 287 return 0; 288 289 switch ((opcode & 0x0f00) >> 8) { 290 case 0x0: 291 case 0x9: 292 case 0xb: 293 opsize = 2; 294 break; 295 case 0xe: 296 case 0xf: 297 opsize = 6; 298 break; 299 case 0xd: 300 /* Could be 4 or 6; check more bits. */ 301 if ((opcode & 0xff) == 0xff) 302 opsize = 4; 303 else 304 opsize = 6; 305 break; 306 default: 307 panic("ERROR: Couldn't find size of opcode 0x%lx at 0x%lx\n", 308 opcode, pc); 309 } 310 311 return opsize; 312} 313 314static unsigned long get_pseudo_pc(struct task_struct *child) 315{ 316 /* Default value for PC is ERP. */ 317 unsigned long pc = get_reg(child, PT_ERP); 318 319 if (pc & 0x1) { 320 unsigned long spc = get_reg(child, PT_SPC); 321 /* Delay slot bit set. Report as stopped on proper 322 instruction. */ 323 if (spc) { 324 pc = spc; 325 } else { 326 /* Calculate the PC from the size of the instruction 327 that the delay slot we're in belongs to. */ 328 pc += insn_size(child, pc & ~1) - 1; 329 } 330 } 331 return pc; 332} 333 334static long bp_owner = 0; 335 336/* Reachable from exit_thread in signal.c, so not static. */ 337void deconfigure_bp(long pid) 338{ 339 int bp; 340 341 /* Only deconfigure if the pid is the owner. */ 342 if (bp_owner != pid) 343 return; 344 345 for (bp = 0; bp < 6; bp++) { 346 unsigned long tmp; 347 /* Deconfigure start and end address (also gets rid of ownership). */ 348 put_debugreg(pid, PT_BP + 3 + (bp * 2), 0); 349 put_debugreg(pid, PT_BP + 4 + (bp * 2), 0); 350 351 /* Deconfigure relevant bits in control register. */ 352 tmp = get_debugreg(pid, PT_BP_CTRL) & ~(3 << (2 + (bp * 4))); 353 put_debugreg(pid, PT_BP_CTRL, tmp); 354 } 355 /* No owner now. */ 356 bp_owner = 0; 357} 358 359static int put_debugreg(long pid, unsigned int regno, long data) 360{ 361 int ret = 0; 362 register int old_srs; 363 364#ifdef CONFIG_ETRAX_KGDB 365 /* Ignore write, but pretend it was ok if value is 0 366 (we don't want POKEUSR/SETREGS failing unnessecarily). */ 367 return (data == 0) ? ret : -1; 368#endif 369 370 /* Simple owner management. */ 371 if (!bp_owner) 372 bp_owner = pid; 373 else if (bp_owner != pid) { 374 /* Ignore write, but pretend it was ok if value is 0 375 (we don't want POKEUSR/SETREGS failing unnessecarily). */ 376 return (data == 0) ? ret : -1; 377 } 378 379 /* Remember old SRS. */ 380 SPEC_REG_RD(SPEC_REG_SRS, old_srs); 381 /* Switch to BP bank. */ 382 SUPP_BANK_SEL(BANK_BP); 383 384 switch (regno - PT_BP) { 385 case 0: 386 SUPP_REG_WR(0, data); break; 387 case 1: 388 case 2: 389 if (data) 390 ret = -1; 391 break; 392 case 3: 393 SUPP_REG_WR(3, data); break; 394 case 4: 395 SUPP_REG_WR(4, data); break; 396 case 5: 397 SUPP_REG_WR(5, data); break; 398 case 6: 399 SUPP_REG_WR(6, data); break; 400 case 7: 401 SUPP_REG_WR(7, data); break; 402 case 8: 403 SUPP_REG_WR(8, data); break; 404 case 9: 405 SUPP_REG_WR(9, data); break; 406 case 10: 407 SUPP_REG_WR(10, data); break; 408 case 11: 409 SUPP_REG_WR(11, data); break; 410 case 12: 411 SUPP_REG_WR(12, data); break; 412 case 13: 413 SUPP_REG_WR(13, data); break; 414 case 14: 415 SUPP_REG_WR(14, data); break; 416 default: 417 ret = -1; 418 break; 419 } 420 421 /* Restore SRS. */ 422 SPEC_REG_WR(SPEC_REG_SRS, old_srs); 423 /* Just for show. */ 424 NOP(); 425 NOP(); 426 NOP(); 427 428 return ret; 429} 430 431static long get_debugreg(long pid, unsigned int regno) 432{ 433 register int old_srs; 434 register long data; 435 436 if (pid != bp_owner) { 437 return 0; 438 } 439 440 /* Remember old SRS. */ 441 SPEC_REG_RD(SPEC_REG_SRS, old_srs); 442 /* Switch to BP bank. */ 443 SUPP_BANK_SEL(BANK_BP); 444 445 switch (regno - PT_BP) { 446 case 0: 447 SUPP_REG_RD(0, data); break; 448 case 1: 449 case 2: 450 /* error return value? */ 451 data = 0; 452 break; 453 case 3: 454 SUPP_REG_RD(3, data); break; 455 case 4: 456 SUPP_REG_RD(4, data); break; 457 case 5: 458 SUPP_REG_RD(5, data); break; 459 case 6: 460 SUPP_REG_RD(6, data); break; 461 case 7: 462 SUPP_REG_RD(7, data); break; 463 case 8: 464 SUPP_REG_RD(8, data); break; 465 case 9: 466 SUPP_REG_RD(9, data); break; 467 case 10: 468 SUPP_REG_RD(10, data); break; 469 case 11: 470 SUPP_REG_RD(11, data); break; 471 case 12: 472 SUPP_REG_RD(12, data); break; 473 case 13: 474 SUPP_REG_RD(13, data); break; 475 case 14: 476 SUPP_REG_RD(14, data); break; 477 default: 478 /* error return value? */ 479 data = 0; 480 } 481 482 /* Restore SRS. */ 483 SPEC_REG_WR(SPEC_REG_SRS, old_srs); 484 /* Just for show. */ 485 NOP(); 486 NOP(); 487 NOP(); 488 489 return data; 490} 491