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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/plat-samsung/include/plat/
1/* linux/arch/arm/plat-samsung/include/plat/clock-clksrc.h
2 *
3 * Parts taken from arch/arm/plat-s3c64xx/clock.c
4 *	Copyright 2008 Openmoko, Inc.
5 *	Copyright 2008 Simtec Electronics
6 *		Ben Dooks <ben@simtec.co.uk>
7 *		http://armlinux.simtec.co.uk/
8 *
9 * Copyright 2009 Ben Dooks <ben-linux@fluff.org>
10 * Copyright 2009 Harald Welte
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15*/
16
17/**
18 * struct clksrc_sources - list of sources for a given clock
19 * @sources: array of pointers to clocks
20 * @nr_sources: The size of @sources
21 */
22struct clksrc_sources {
23	unsigned int	nr_sources;
24	struct clk	**sources;
25};
26
27/**
28 * struct clksrc_reg - register definition for clock control bits
29 * @reg: pointer to the register in virtual memory.
30 * @shift: the shift in bits to where the bitfield is.
31 * @size: the size in bits of the bitfield.
32 *
33 * This specifies the size and position of the bits we are interested
34 * in within the register specified by @reg.
35 */
36struct clksrc_reg {
37	void __iomem		*reg;
38	unsigned short		shift;
39	unsigned short		size;
40};
41
42/**
43 * struct clksrc_clk - class of clock for newer style samsung devices.
44 * @clk: the standard clock representation
45 * @sources: the sources for this clock
46 * @reg_src: the register definition for selecting the clock's source
47 * @reg_div: the register definition for the clock's output divisor
48 *
49 * This clock implements the features required by the newer SoCs where
50 * the standard clock block provides an input mux and a post-mux divisor
51 * to provide the periperhal's clock.
52 *
53 * The array of @sources provides the mapping of mux position to the
54 * clock, and @reg_src shows the code where to modify to change the mux
55 * position. The @reg_div defines how to change the divider settings on
56 * the output.
57 */
58struct clksrc_clk {
59	struct clk		clk;
60	struct clksrc_sources	*sources;
61
62	struct clksrc_reg	reg_src;
63	struct clksrc_reg	reg_div;
64};
65
66/**
67 * s3c_set_clksrc() - setup the clock from the register settings
68 * @clk: The clock to setup.
69 * @announce: true to announce the setting to printk().
70 *
71 * Setup the clock from the current register settings, for when the
72 * kernel boots or if it is resuming from a possibly unknown state.
73 */
74extern void s3c_set_clksrc(struct clksrc_clk *clk, bool announce);
75
76/**
77 * s3c_register_clksrc() register clocks from an array of clksrc clocks
78 * @srcs: The array of clocks to register
79 * @size: The size of the @srcs array.
80 *
81 * Initialise and register the array of clocks described by @srcs.
82 */
83extern void s3c_register_clksrc(struct clksrc_clk *srcs, int size);
84