1/* 2 * Copyright (C) 1999 ARM Limited 3 * Copyright (C) 2000 Deep Blue Solutions Ltd 4 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved. 5 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de 6 * Copyright 2009 Ilya Yanok, Emcraft Systems Ltd, yanok@emcraft.com 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 */ 18 19#include <linux/kernel.h> 20#include <linux/clk.h> 21#include <linux/io.h> 22#include <linux/err.h> 23#include <linux/delay.h> 24 25#include <mach/hardware.h> 26#include <mach/common.h> 27#include <asm/proc-fns.h> 28#include <asm/system.h> 29 30static void __iomem *wdog_base; 31 32/* 33 * Reset the system. It is called by machine_restart(). 34 */ 35void arch_reset(char mode, const char *cmd) 36{ 37 unsigned int wcr_enable; 38 39#ifdef CONFIG_ARCH_MXC91231 40 if (cpu_is_mxc91231()) { 41 mxc91231_arch_reset(mode, cmd); 42 return; 43 } 44#endif 45 if (cpu_is_mx1()) { 46 wcr_enable = (1 << 0); 47 } else { 48 struct clk *clk; 49 50 clk = clk_get_sys("imx-wdt.0", NULL); 51 if (!IS_ERR(clk)) 52 clk_enable(clk); 53 wcr_enable = (1 << 2); 54 } 55 56 /* Assert SRS signal */ 57 __raw_writew(wcr_enable, wdog_base); 58 59 /* wait for reset to assert... */ 60 mdelay(500); 61 62 printk(KERN_ERR "Watchdog reset failed to assert reset\n"); 63 64 /* delay to allow the serial port to show the message */ 65 mdelay(50); 66 67 /* we'll take a jump through zero as a poor second */ 68 cpu_reset(0); 69} 70 71void mxc_arch_reset_init(void __iomem *base) 72{ 73 wdog_base = base; 74} 75