1/* 2 * linux/arch/arm/mach-pxa/mainstone.c 3 * 4 * Support for the Intel HCDDBBVA0 Development Platform. 5 * (go figure how they came up with such name...) 6 * 7 * Author: Nicolas Pitre 8 * Created: Nov 05, 2002 9 * Copyright: MontaVista Software Inc. 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License version 2 as 13 * published by the Free Software Foundation. 14 */ 15 16#include <linux/init.h> 17#include <linux/platform_device.h> 18#include <linux/sysdev.h> 19#include <linux/interrupt.h> 20#include <linux/sched.h> 21#include <linux/bitops.h> 22#include <linux/fb.h> 23#include <linux/ioport.h> 24#include <linux/mtd/mtd.h> 25#include <linux/mtd/partitions.h> 26#include <linux/input.h> 27#include <linux/gpio_keys.h> 28#include <linux/pwm_backlight.h> 29#include <linux/smc91x.h> 30 31#include <asm/types.h> 32#include <asm/setup.h> 33#include <asm/memory.h> 34#include <asm/mach-types.h> 35#include <mach/hardware.h> 36#include <asm/irq.h> 37#include <asm/sizes.h> 38 39#include <asm/mach/arch.h> 40#include <asm/mach/map.h> 41#include <asm/mach/irq.h> 42#include <asm/mach/flash.h> 43 44#include <mach/pxa27x.h> 45#include <mach/gpio.h> 46#include <mach/mainstone.h> 47#include <mach/audio.h> 48#include <mach/pxafb.h> 49#include <plat/i2c.h> 50#include <mach/mmc.h> 51#include <mach/irda.h> 52#include <mach/ohci.h> 53#include <mach/pxa27x_keypad.h> 54 55#include "generic.h" 56#include "devices.h" 57 58static unsigned long mainstone_pin_config[] = { 59 /* Chip Select */ 60 GPIO15_nCS_1, 61 62 /* LCD - 16bpp Active TFT */ 63 GPIOxx_LCD_TFT_16BPP, 64 GPIO16_PWM0_OUT, /* Backlight */ 65 66 /* MMC */ 67 GPIO32_MMC_CLK, 68 GPIO112_MMC_CMD, 69 GPIO92_MMC_DAT_0, 70 GPIO109_MMC_DAT_1, 71 GPIO110_MMC_DAT_2, 72 GPIO111_MMC_DAT_3, 73 74 /* USB Host Port 1 */ 75 GPIO88_USBH1_PWR, 76 GPIO89_USBH1_PEN, 77 78 /* PC Card */ 79 GPIO48_nPOE, 80 GPIO49_nPWE, 81 GPIO50_nPIOR, 82 GPIO51_nPIOW, 83 GPIO85_nPCE_1, 84 GPIO54_nPCE_2, 85 GPIO79_PSKTSEL, 86 GPIO55_nPREG, 87 GPIO56_nPWAIT, 88 GPIO57_nIOIS16, 89 90 /* AC97 */ 91 GPIO28_AC97_BITCLK, 92 GPIO29_AC97_SDATA_IN_0, 93 GPIO30_AC97_SDATA_OUT, 94 GPIO31_AC97_SYNC, 95 GPIO45_AC97_SYSCLK, 96 97 /* Keypad */ 98 GPIO93_KP_DKIN_0, 99 GPIO94_KP_DKIN_1, 100 GPIO95_KP_DKIN_2, 101 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, 102 GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, 103 GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, 104 GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH, 105 GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH, 106 GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH, 107 GPIO103_KP_MKOUT_0, 108 GPIO104_KP_MKOUT_1, 109 GPIO105_KP_MKOUT_2, 110 GPIO106_KP_MKOUT_3, 111 GPIO107_KP_MKOUT_4, 112 GPIO108_KP_MKOUT_5, 113 GPIO96_KP_MKOUT_6, 114 115 /* I2C */ 116 GPIO117_I2C_SCL, 117 GPIO118_I2C_SDA, 118 119 /* GPIO */ 120 GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, 121}; 122 123static unsigned long mainstone_irq_enabled; 124 125static void mainstone_mask_irq(unsigned int irq) 126{ 127 int mainstone_irq = (irq - MAINSTONE_IRQ(0)); 128 MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq)); 129} 130 131static void mainstone_unmask_irq(unsigned int irq) 132{ 133 int mainstone_irq = (irq - MAINSTONE_IRQ(0)); 134 /* the irq can be acknowledged only if deasserted, so it's done here */ 135 MST_INTSETCLR &= ~(1 << mainstone_irq); 136 MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq)); 137} 138 139static struct irq_chip mainstone_irq_chip = { 140 .name = "FPGA", 141 .ack = mainstone_mask_irq, 142 .mask = mainstone_mask_irq, 143 .unmask = mainstone_unmask_irq, 144}; 145 146static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc) 147{ 148 unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled; 149 do { 150 desc->chip->ack(irq); /* clear useless edge notification */ 151 if (likely(pending)) { 152 irq = MAINSTONE_IRQ(0) + __ffs(pending); 153 generic_handle_irq(irq); 154 } 155 pending = MST_INTSETCLR & mainstone_irq_enabled; 156 } while (pending); 157} 158 159static void __init mainstone_init_irq(void) 160{ 161 int irq; 162 163 pxa27x_init_irq(); 164 165 /* setup extra Mainstone irqs */ 166 for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) { 167 set_irq_chip(irq, &mainstone_irq_chip); 168 set_irq_handler(irq, handle_level_irq); 169 if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14)) 170 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN); 171 else 172 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 173 } 174 set_irq_flags(MAINSTONE_IRQ(8), 0); 175 set_irq_flags(MAINSTONE_IRQ(12), 0); 176 177 MST_INTMSKENA = 0; 178 MST_INTSETCLR = 0; 179 180 set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler); 181 set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); 182} 183 184#ifdef CONFIG_PM 185 186static int mainstone_irq_resume(struct sys_device *dev) 187{ 188 MST_INTMSKENA = mainstone_irq_enabled; 189 return 0; 190} 191 192static struct sysdev_class mainstone_irq_sysclass = { 193 .name = "cpld_irq", 194 .resume = mainstone_irq_resume, 195}; 196 197static struct sys_device mainstone_irq_device = { 198 .cls = &mainstone_irq_sysclass, 199}; 200 201static int __init mainstone_irq_device_init(void) 202{ 203 int ret = -ENODEV; 204 205 if (machine_is_mainstone()) { 206 ret = sysdev_class_register(&mainstone_irq_sysclass); 207 if (ret == 0) 208 ret = sysdev_register(&mainstone_irq_device); 209 } 210 return ret; 211} 212 213device_initcall(mainstone_irq_device_init); 214 215#endif 216 217 218static struct resource smc91x_resources[] = { 219 [0] = { 220 .start = (MST_ETH_PHYS + 0x300), 221 .end = (MST_ETH_PHYS + 0xfffff), 222 .flags = IORESOURCE_MEM, 223 }, 224 [1] = { 225 .start = MAINSTONE_IRQ(3), 226 .end = MAINSTONE_IRQ(3), 227 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 228 } 229}; 230 231static struct smc91x_platdata mainstone_smc91x_info = { 232 .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT | 233 SMC91X_NOWAIT | SMC91X_USE_DMA, 234}; 235 236static struct platform_device smc91x_device = { 237 .name = "smc91x", 238 .id = 0, 239 .num_resources = ARRAY_SIZE(smc91x_resources), 240 .resource = smc91x_resources, 241 .dev = { 242 .platform_data = &mainstone_smc91x_info, 243 }, 244}; 245 246static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv) 247{ 248 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 249 MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF; 250 return 0; 251} 252 253static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv) 254{ 255 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 256 MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; 257} 258 259static long mst_audio_suspend_mask; 260 261static void mst_audio_suspend(void *priv) 262{ 263 mst_audio_suspend_mask = MST_MSCWR2; 264 MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; 265} 266 267static void mst_audio_resume(void *priv) 268{ 269 MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF; 270} 271 272static pxa2xx_audio_ops_t mst_audio_ops = { 273 .startup = mst_audio_startup, 274 .shutdown = mst_audio_shutdown, 275 .suspend = mst_audio_suspend, 276 .resume = mst_audio_resume, 277}; 278 279static struct resource flash_resources[] = { 280 [0] = { 281 .start = PXA_CS0_PHYS, 282 .end = PXA_CS0_PHYS + SZ_64M - 1, 283 .flags = IORESOURCE_MEM, 284 }, 285 [1] = { 286 .start = PXA_CS1_PHYS, 287 .end = PXA_CS1_PHYS + SZ_64M - 1, 288 .flags = IORESOURCE_MEM, 289 }, 290}; 291 292static struct mtd_partition mainstoneflash0_partitions[] = { 293 { 294 .name = "Bootloader", 295 .size = 0x00040000, 296 .offset = 0, 297 .mask_flags = MTD_WRITEABLE /* force read-only */ 298 },{ 299 .name = "Kernel", 300 .size = 0x00400000, 301 .offset = 0x00040000, 302 },{ 303 .name = "Filesystem", 304 .size = MTDPART_SIZ_FULL, 305 .offset = 0x00440000 306 } 307}; 308 309static struct flash_platform_data mst_flash_data[2] = { 310 { 311 .map_name = "cfi_probe", 312 .parts = mainstoneflash0_partitions, 313 .nr_parts = ARRAY_SIZE(mainstoneflash0_partitions), 314 }, { 315 .map_name = "cfi_probe", 316 .parts = NULL, 317 .nr_parts = 0, 318 } 319}; 320 321static struct platform_device mst_flash_device[2] = { 322 { 323 .name = "pxa2xx-flash", 324 .id = 0, 325 .dev = { 326 .platform_data = &mst_flash_data[0], 327 }, 328 .resource = &flash_resources[0], 329 .num_resources = 1, 330 }, 331 { 332 .name = "pxa2xx-flash", 333 .id = 1, 334 .dev = { 335 .platform_data = &mst_flash_data[1], 336 }, 337 .resource = &flash_resources[1], 338 .num_resources = 1, 339 }, 340}; 341 342#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) 343static struct platform_pwm_backlight_data mainstone_backlight_data = { 344 .pwm_id = 0, 345 .max_brightness = 1023, 346 .dft_brightness = 1023, 347 .pwm_period_ns = 78770, 348}; 349 350static struct platform_device mainstone_backlight_device = { 351 .name = "pwm-backlight", 352 .dev = { 353 .parent = &pxa27x_device_pwm0.dev, 354 .platform_data = &mainstone_backlight_data, 355 }, 356}; 357 358static void __init mainstone_backlight_register(void) 359{ 360 int ret = platform_device_register(&mainstone_backlight_device); 361 if (ret) 362 printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret); 363} 364#else 365#define mainstone_backlight_register() do { } while (0) 366#endif 367 368static struct pxafb_mode_info toshiba_ltm04c380k_mode = { 369 .pixclock = 50000, 370 .xres = 640, 371 .yres = 480, 372 .bpp = 16, 373 .hsync_len = 1, 374 .left_margin = 0x9f, 375 .right_margin = 1, 376 .vsync_len = 44, 377 .upper_margin = 0, 378 .lower_margin = 0, 379 .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, 380}; 381 382static struct pxafb_mode_info toshiba_ltm035a776c_mode = { 383 .pixclock = 110000, 384 .xres = 240, 385 .yres = 320, 386 .bpp = 16, 387 .hsync_len = 4, 388 .left_margin = 8, 389 .right_margin = 20, 390 .vsync_len = 3, 391 .upper_margin = 1, 392 .lower_margin = 10, 393 .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, 394}; 395 396static struct pxafb_mach_info mainstone_pxafb_info = { 397 .num_modes = 1, 398 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, 399}; 400 401static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data) 402{ 403 int err; 404 405 /* make sure SD/Memory Stick multiplexer's signals 406 * are routed to MMC controller 407 */ 408 MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL; 409 410 err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED, 411 "MMC card detect", data); 412 if (err) 413 printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); 414 415 return err; 416} 417 418static void mainstone_mci_setpower(struct device *dev, unsigned int vdd) 419{ 420 struct pxamci_platform_data* p_d = dev->platform_data; 421 422 if (( 1 << vdd) & p_d->ocr_mask) { 423 printk(KERN_DEBUG "%s: on\n", __func__); 424 MST_MSCWR1 |= MST_MSCWR1_MMC_ON; 425 MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL; 426 } else { 427 printk(KERN_DEBUG "%s: off\n", __func__); 428 MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON; 429 } 430} 431 432static void mainstone_mci_exit(struct device *dev, void *data) 433{ 434 free_irq(MAINSTONE_MMC_IRQ, data); 435} 436 437static struct pxamci_platform_data mainstone_mci_platform_data = { 438 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 439 .init = mainstone_mci_init, 440 .setpower = mainstone_mci_setpower, 441 .exit = mainstone_mci_exit, 442 .gpio_card_detect = -1, 443 .gpio_card_ro = -1, 444 .gpio_power = -1, 445}; 446 447static void mainstone_irda_transceiver_mode(struct device *dev, int mode) 448{ 449 unsigned long flags; 450 451 local_irq_save(flags); 452 if (mode & IR_SIRMODE) { 453 MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR; 454 } else if (mode & IR_FIRMODE) { 455 MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR; 456 } 457 pxa2xx_transceiver_mode(dev, mode); 458 if (mode & IR_OFF) { 459 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF; 460 } else { 461 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL; 462 } 463 local_irq_restore(flags); 464} 465 466static struct pxaficp_platform_data mainstone_ficp_platform_data = { 467 .gpio_pwdown = -1, 468 .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, 469 .transceiver_mode = mainstone_irda_transceiver_mode, 470}; 471 472static struct gpio_keys_button gpio_keys_button[] = { 473 [0] = { 474 .desc = "wakeup", 475 .code = KEY_SUSPEND, 476 .type = EV_KEY, 477 .gpio = 1, 478 .wakeup = 1, 479 }, 480}; 481 482static struct gpio_keys_platform_data mainstone_gpio_keys = { 483 .buttons = gpio_keys_button, 484 .nbuttons = 1, 485}; 486 487static struct platform_device mst_gpio_keys_device = { 488 .name = "gpio-keys", 489 .id = -1, 490 .dev = { 491 .platform_data = &mainstone_gpio_keys, 492 }, 493}; 494 495static struct platform_device *platform_devices[] __initdata = { 496 &smc91x_device, 497 &mst_flash_device[0], 498 &mst_flash_device[1], 499 &mst_gpio_keys_device, 500}; 501 502static struct pxaohci_platform_data mainstone_ohci_platform_data = { 503 .port_mode = PMM_PERPORT_MODE, 504 .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, 505}; 506 507#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) 508static unsigned int mainstone_matrix_keys[] = { 509 KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C), 510 KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F), 511 KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I), 512 KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L), 513 KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O), 514 KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R), 515 KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U), 516 KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X), 517 KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z), 518 519 KEY(0, 4, KEY_DOT), /* . */ 520 KEY(1, 4, KEY_CLOSE), /* @ */ 521 KEY(4, 4, KEY_SLASH), 522 KEY(5, 4, KEY_BACKSLASH), 523 KEY(0, 5, KEY_HOME), 524 KEY(1, 5, KEY_LEFTSHIFT), 525 KEY(2, 5, KEY_SPACE), 526 KEY(3, 5, KEY_SPACE), 527 KEY(4, 5, KEY_ENTER), 528 KEY(5, 5, KEY_BACKSPACE), 529 530 KEY(0, 6, KEY_UP), 531 KEY(1, 6, KEY_DOWN), 532 KEY(2, 6, KEY_LEFT), 533 KEY(3, 6, KEY_RIGHT), 534 KEY(4, 6, KEY_SELECT), 535}; 536 537struct pxa27x_keypad_platform_data mainstone_keypad_info = { 538 .matrix_key_rows = 6, 539 .matrix_key_cols = 7, 540 .matrix_key_map = mainstone_matrix_keys, 541 .matrix_key_map_size = ARRAY_SIZE(mainstone_matrix_keys), 542 543 .enable_rotary0 = 1, 544 .rotary0_up_key = KEY_UP, 545 .rotary0_down_key = KEY_DOWN, 546 547 .debounce_interval = 30, 548}; 549 550static void __init mainstone_init_keypad(void) 551{ 552 pxa_set_keypad_info(&mainstone_keypad_info); 553} 554#else 555static inline void mainstone_init_keypad(void) {} 556#endif 557 558static void __init mainstone_init(void) 559{ 560 int SW7 = 0; 561 562 pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config)); 563 564 pxa_set_ffuart_info(NULL); 565 pxa_set_btuart_info(NULL); 566 pxa_set_stuart_info(NULL); 567 568 mst_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4; 569 mst_flash_data[1].width = 4; 570 571 /* Compensate for SW7 which swaps the flash banks */ 572 mst_flash_data[SW7].name = "processor-flash"; 573 mst_flash_data[SW7 ^ 1].name = "mainboard-flash"; 574 575 printk(KERN_NOTICE "Mainstone configured to boot from %s\n", 576 mst_flash_data[0].name); 577 578 /* system bus arbiter setting 579 * - Core_Park 580 * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4 581 */ 582 ARB_CNTRL = ARB_CORE_PARK | 0x234; 583 584 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 585 586 /* reading Mainstone's "Virtual Configuration Register" 587 might be handy to select LCD type here */ 588 if (0) 589 mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode; 590 else 591 mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode; 592 593 set_pxa_fb_info(&mainstone_pxafb_info); 594 mainstone_backlight_register(); 595 596 pxa_set_mci_info(&mainstone_mci_platform_data); 597 pxa_set_ficp_info(&mainstone_ficp_platform_data); 598 pxa_set_ohci_info(&mainstone_ohci_platform_data); 599 pxa_set_i2c_info(NULL); 600 pxa_set_ac97_info(&mst_audio_ops); 601 602 mainstone_init_keypad(); 603} 604 605 606static struct map_desc mainstone_io_desc[] __initdata = { 607 { /* CPLD */ 608 .virtual = MST_FPGA_VIRT, 609 .pfn = __phys_to_pfn(MST_FPGA_PHYS), 610 .length = 0x00100000, 611 .type = MT_DEVICE 612 } 613}; 614 615static void __init mainstone_map_io(void) 616{ 617 pxa_map_io(); 618 iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc)); 619 620 /* for use I SRAM as framebuffer. */ 621 PSLR |= 0xF04; 622 PCFR = 0x66; 623} 624 625MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") 626 /* Maintainer: MontaVista Software Inc. */ 627 .phys_io = 0x40000000, 628 .boot_params = 0xa0000100, /* BLOB boot parameter setting */ 629 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, 630 .map_io = mainstone_map_io, 631 .init_irq = mainstone_init_irq, 632 .timer = &pxa_timer, 633 .init_machine = mainstone_init, 634MACHINE_END 635