1/****************************************************************************
2*
3*						Realmode X86 Emulator Library
4*
5*            	Copyright (C) 1996-1999 SciTech Software, Inc.
6* 				     Copyright (C) David Mosberger-Tang
7* 					   Copyright (C) 1999 Egbert Eich
8*
9*  ========================================================================
10*
11*  Permission to use, copy, modify, distribute, and sell this software and
12*  its documentation for any purpose is hereby granted without fee,
13*  provided that the above copyright notice appear in all copies and that
14*  both that copyright notice and this permission notice appear in
15*  supporting documentation, and that the name of the authors not be used
16*  in advertising or publicity pertaining to distribution of the software
17*  without specific, written prior permission.  The authors makes no
18*  representations about the suitability of this software for any purpose.
19*  It is provided "as is" without express or implied warranty.
20*
21*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
22*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
23*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
24*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
25*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
26*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
27*  PERFORMANCE OF THIS SOFTWARE.
28*
29*  ========================================================================
30*
31* Language:		ANSI C
32* Environment:	Any
33* Developer:    Kendall Bennett
34*
35* Description:  Header file for x86 register definitions.
36*
37****************************************************************************/
38
39#ifndef __X86EMU_REGS_H
40#define __X86EMU_REGS_H
41
42#ifdef __mips
43#if defined(__MIPSEB)
44#define __BIG_ENDIAN__
45#elif defined(__MIPSEL)
46#define __LITTLE_ENDIAN__
47#else
48#error "You must define either __MIPSEB or __MIPSEL"
49#endif
50#endif
51
52/*---------------------- Macros and type definitions ----------------------*/
53
54#ifndef __mips
55#pragma pack(1)
56#endif
57
58/*
59 * General EAX, EBX, ECX, EDX type registers.  Note that for
60 * portability, and speed, the issue of byte swapping is not addressed
61 * in the registers.  All registers are stored in the default format
62 * available on the host machine.  The only critical issue is that the
63 * registers should line up EXACTLY in the same manner as they do in
64 * the 386.  That is:
65 *
66 * EAX & 0xff  === AL
67 * EAX & 0xffff == AX
68 *
69 * etc.  The result is that alot of the calculations can then be
70 * done using the native instruction set fully.
71 */
72
73#ifdef	__BIG_ENDIAN__
74
75typedef struct {
76    u32 e_reg;
77	} I32_reg_t;
78
79typedef struct {
80	u16 filler0, x_reg;
81	} I16_reg_t;
82
83typedef struct {
84	u8 filler0, filler1, h_reg, l_reg;
85	} I8_reg_t;
86
87#else /* !__BIG_ENDIAN__ */
88
89typedef struct {
90    u32 e_reg;
91	} I32_reg_t;
92
93typedef struct {
94	u16 x_reg;
95	} I16_reg_t;
96
97typedef struct {
98	u8 l_reg, h_reg;
99	} I8_reg_t;
100
101#endif /* BIG_ENDIAN */
102
103typedef union {
104	I32_reg_t   I32_reg;
105	I16_reg_t   I16_reg;
106	I8_reg_t    I8_reg;
107	} i386_general_register;
108
109struct i386_general_regs {
110	i386_general_register A, B, C, D;
111	};
112
113typedef struct i386_general_regs Gen_reg_t;
114
115struct i386_special_regs {
116	i386_general_register SP, BP, SI, DI, IP;
117	u32 FLAGS;
118	};
119
120/*
121 * Segment registers here represent the 16 bit quantities
122 * CS, DS, ES, SS.
123 */
124
125struct i386_segment_regs {
126    u16 CS, DS, SS, ES, FS, GS;
127	};
128
129/* 8 bit registers */
130#define R_AH  gen.A.I8_reg.h_reg
131#define R_AL  gen.A.I8_reg.l_reg
132#define R_BH  gen.B.I8_reg.h_reg
133#define R_BL  gen.B.I8_reg.l_reg
134#define R_CH  gen.C.I8_reg.h_reg
135#define R_CL  gen.C.I8_reg.l_reg
136#define R_DH  gen.D.I8_reg.h_reg
137#define R_DL  gen.D.I8_reg.l_reg
138
139/* 16 bit registers */
140#define R_AX  gen.A.I16_reg.x_reg
141#define R_BX  gen.B.I16_reg.x_reg
142#define R_CX  gen.C.I16_reg.x_reg
143#define R_DX  gen.D.I16_reg.x_reg
144
145/* 32 bit extended registers */
146#define R_EAX  gen.A.I32_reg.e_reg
147#define R_EBX  gen.B.I32_reg.e_reg
148#define R_ECX  gen.C.I32_reg.e_reg
149#define R_EDX  gen.D.I32_reg.e_reg
150
151/* special registers */
152#define R_SP  spc.SP.I16_reg.x_reg
153#define R_BP  spc.BP.I16_reg.x_reg
154#define R_SI  spc.SI.I16_reg.x_reg
155#define R_DI  spc.DI.I16_reg.x_reg
156#define R_IP  spc.IP.I16_reg.x_reg
157#define R_FLG spc.FLAGS
158
159/* special registers */
160#define R_SP  spc.SP.I16_reg.x_reg
161#define R_BP  spc.BP.I16_reg.x_reg
162#define R_SI  spc.SI.I16_reg.x_reg
163#define R_DI  spc.DI.I16_reg.x_reg
164#define R_IP  spc.IP.I16_reg.x_reg
165#define R_FLG spc.FLAGS
166
167/* special registers */
168#define R_ESP  spc.SP.I32_reg.e_reg
169#define R_EBP  spc.BP.I32_reg.e_reg
170#define R_ESI  spc.SI.I32_reg.e_reg
171#define R_EDI  spc.DI.I32_reg.e_reg
172#define R_EIP  spc.IP.I32_reg.e_reg
173#define R_EFLG spc.FLAGS
174
175/* segment registers */
176#define R_CS  seg.CS
177#define R_DS  seg.DS
178#define R_SS  seg.SS
179#define R_ES  seg.ES
180#define R_FS  seg.FS
181#define R_GS  seg.GS
182
183/* flag conditions   */
184#define FB_CF 0x0001            /* CARRY flag  */
185#define FB_PF 0x0004            /* PARITY flag */
186#define FB_AF 0x0010            /* AUX  flag   */
187#define FB_ZF 0x0040            /* ZERO flag   */
188#define FB_SF 0x0080            /* SIGN flag   */
189#define FB_TF 0x0100            /* TRAP flag   */
190#define FB_IF 0x0200            /* INTERRUPT ENABLE flag */
191#define FB_DF 0x0400            /* DIR flag    */
192#define FB_OF 0x0800            /* OVERFLOW flag */
193
194/* 80286 and above always have bit#1 set */
195#define F_ALWAYS_ON  (0x0002)   /* flag bits always on */
196
197/*
198 * Define a mask for only those flag bits we will ever pass back
199 * (via PUSHF)
200 */
201#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
202
203/* following bits masked in to a 16bit quantity */
204
205#define F_CF 0x0001             /* CARRY flag  */
206#define F_PF 0x0004             /* PARITY flag */
207#define F_AF 0x0010             /* AUX  flag   */
208#define F_ZF 0x0040             /* ZERO flag   */
209#define F_SF 0x0080             /* SIGN flag   */
210#define F_TF 0x0100             /* TRAP flag   */
211#define F_IF 0x0200             /* INTERRUPT ENABLE flag */
212#define F_DF 0x0400             /* DIR flag    */
213#define F_OF 0x0800             /* OVERFLOW flag */
214
215#define TOGGLE_FLAG(flag)     	(M.x86.R_FLG ^= (flag))
216#define SET_FLAG(flag)        	(M.x86.R_FLG |= (flag))
217#define CLEAR_FLAG(flag)      	(M.x86.R_FLG &= ~(flag))
218#define ACCESS_FLAG(flag)     	(M.x86.R_FLG & (flag))
219#define CLEARALL_FLAG(m)    	(M.x86.R_FLG = 0)
220
221#define CONDITIONAL_SET_FLAG(COND,FLAG) \
222  if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
223
224#define F_PF_CALC 0x010000      /* PARITY flag has been calced    */
225#define F_ZF_CALC 0x020000      /* ZERO flag has been calced      */
226#define F_SF_CALC 0x040000      /* SIGN flag has been calced      */
227
228#define F_ALL_CALC      0xff0000        /* All have been calced   */
229
230/*
231 * Emulator machine state.
232 * Segment usage control.
233 */
234#define SYSMODE_SEG_DS_SS       0x00000001
235#define SYSMODE_SEGOVR_CS       0x00000002
236#define SYSMODE_SEGOVR_DS       0x00000004
237#define SYSMODE_SEGOVR_ES       0x00000008
238#define SYSMODE_SEGOVR_FS       0x00000010
239#define SYSMODE_SEGOVR_GS       0x00000020
240#define SYSMODE_SEGOVR_SS       0x00000040
241#define SYSMODE_PREFIX_REPE     0x00000080
242#define SYSMODE_PREFIX_REPNE    0x00000100
243#define SYSMODE_PREFIX_DATA     0x00000200
244#define SYSMODE_PREFIX_ADDR     0x00000400
245#define SYSMODE_INTR_PENDING    0x10000000
246#define SYSMODE_EXTRN_INTR      0x20000000
247#define SYSMODE_HALTED          0x40000000
248
249#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS      | \
250						 SYSMODE_SEGOVR_CS      | \
251						 SYSMODE_SEGOVR_DS      | \
252						 SYSMODE_SEGOVR_ES      | \
253						 SYSMODE_SEGOVR_FS      | \
254						 SYSMODE_SEGOVR_GS      | \
255						 SYSMODE_SEGOVR_SS)
256#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS      | \
257						 SYSMODE_SEGOVR_CS      | \
258						 SYSMODE_SEGOVR_DS      | \
259						 SYSMODE_SEGOVR_ES      | \
260						 SYSMODE_SEGOVR_FS      | \
261						 SYSMODE_SEGOVR_GS      | \
262						 SYSMODE_SEGOVR_SS      | \
263						 SYSMODE_PREFIX_DATA    | \
264						 SYSMODE_PREFIX_ADDR)
265
266#define  INTR_SYNCH           0x1
267#define  INTR_ASYNCH          0x2
268#define  INTR_HALTED          0x4
269
270typedef struct {
271    struct i386_general_regs    gen;
272    struct i386_special_regs    spc;
273    struct i386_segment_regs    seg;
274    /*
275     * MODE contains information on:
276     *  REPE prefix             2 bits  repe,repne
277     *  SEGMENT overrides       5 bits  normal,DS,SS,CS,ES
278     *  Delayed flag set        3 bits  (zero, signed, parity)
279     *  reserved                6 bits
280     *  interrupt #             8 bits  instruction raised interrupt
281     *  BIOS video segregs      4 bits
282     *  Interrupt Pending       1 bits
283     *  Extern interrupt        1 bits
284     *  Halted                  1 bits
285     */
286    long                        mode;
287    u8                          intno;
288    volatile int                intr;   /* mask of pending interrupts */
289	int                         debug;
290#ifdef DEBUG
291	int                         check;
292    u16                         saved_ip;
293    u16                         saved_cs;
294    int                         enc_pos;
295    int                         enc_str_pos;
296    char                        decode_buf[32]; /* encoded byte stream  */
297    char                        decoded_buf[256]; /* disassembled strings */
298#endif
299	} X86EMU_regs;
300
301/****************************************************************************
302REMARKS:
303Structure maintaining the emulator machine state.
304
305MEMBERS:
306x86				- X86 registers
307mem_base		- Base real mode memory for the emulator
308mem_size		- Size of the real mode memory block for the emulator
309****************************************************************************/
310typedef struct {
311	X86EMU_regs		x86;
312	unsigned long	mem_base;
313	unsigned long	mem_size;
314	void*        	private;
315	} X86EMU_sysEnv;
316
317#ifndef __mips
318#pragma pack()
319#endif
320
321/*----------------------------- Global Variables --------------------------*/
322
323#ifdef  __cplusplus
324extern "C" {            			/* Use "C" linkage when in C++ mode */
325#endif
326
327/* Global emulator machine state.
328 *
329 * We keep it global to avoid pointer dereferences in the code for speed.
330 */
331
332extern    X86EMU_sysEnv	_X86EMU_env;
333#define   M             _X86EMU_env
334
335/*-------------------------- Function Prototypes --------------------------*/
336
337/* Function to log information at runtime */
338
339#ifdef _CFE_
340#include "lib_printf.h"
341#define printk xprintf
342#define sprintf xsprintf
343#else
344void	printk(const char *fmt, ...);
345#endif
346
347#ifdef  __cplusplus
348}                       			/* End of "C" linkage for C++   	*/
349#endif
350
351#endif /* __X86EMU_REGS_H */
352