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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/board/bcm91125c/src/
1/*  *********************************************************************
2    *  Broadcom Common Firmware Environment (CFE)
3    *
4    *  Board device initialization		File: bcm91125c_pci.c
5    *
6    *  This is the part of the board support package for boards
7    *  that support PCI. It describes the board-specific slots/devices
8    *  and wiring thereof.
9    *
10    *********************************************************************
11    *
12    *  Copyright 2000,2001,2002,2003
13    *  Broadcom Corporation. All rights reserved.
14    *
15    *  This software is furnished under license and may be used and
16    *  copied only in accordance with the following terms and
17    *  conditions.  Subject to these conditions, you may download,
18    *  copy, install, use, modify and distribute modified or unmodified
19    *  copies of this software in source and/or binary form.  No title
20    *  or ownership is transferred hereby.
21    *
22    *  1) Any source code used, modified or distributed must reproduce
23    *     and retain this copyright notice and list of conditions
24    *     as they appear in the source file.
25    *
26    *  2) No right is granted to use any trade name, trademark, or
27    *     logo of Broadcom Corporation.  The "Broadcom Corporation"
28    *     name may not be used to endorse or promote products derived
29    *     from this software without the prior written permission of
30    *     Broadcom Corporation.
31    *
32    *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
33    *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
34    *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
35    *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
36    *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
37    *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
38    *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
39    *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
40    *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
41    *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
42    *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
43    *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
44    *     THE POSSIBILITY OF SUCH DAMAGE.
45    ********************************************************************* */
46
47#include "lib_types.h"
48
49#include "pcireg.h"
50#include "pcivar.h"
51
52/* PCI interrupt mapping on the BCM91125C board:
53   Only device ids 5 and 6 are implemented as PCI connectors, and
54   the only on-board device has id 7 (USB bridge).
55
56   Slot    IDSEL   DevID  INT{A,B,C,D}   shift
57  (PHB)      -       0       {A,-,-,-}     0
58  (LHB)      -       1       {-,-,-,-}     0
59    0       16       5       {A,B,C,D}     0 (identity)
60    1       17       6       {B,C,D,A}     1 (A->B, B->C, C->D, D->A)
61  (USB)     18       7       {C,D,-,-}     2 (A->C, B->D, C->A, D->B)
62    -                                      3 (A->D, B->A, C->B, D->C)
63
64   Device 1 is the LDT host bridge.  By giving it a shift of 0,
65   the normal rotation algorithm gives the correct result for devices
66   on the secondary bus of the LDT host bridge (bus 1).  Firmware
67   must program the API 10ll LDT-PCI bridge so that the normal
68   rotation algorithm gives correct results for its secondary (bus 2):
69
70    0       16       0       {A,B,C,D}     0 (identity)
71    1       17       1       {B,C,D,A}     1 (A->B, B->C, C->D, D->A)
72*/
73
74extern int _pciverbose;
75
76/* Return the base shift of a slot or device on the motherboard.
77   This is board specific, for the BCM91125C board only. */
78uint8_t
79pci_int_shift_0(pcitag_t tag)
80{
81    int bus, device;
82
83    pci_break_tag(tag, NULL, &bus, &device, NULL);
84
85    if (bus != 0)
86	return 0;
87    switch (device) {
88    case 0:
89	return 0;
90    case 5: case 6: case 7:
91        return ((device - 5) % 4);
92    default:
93	return 0;
94    }
95}
96
97/* Return the mapping of a BCM91125C device/function interrupt to an
98   interrupt line.  For the SB-1150, return 1-4 to indicate the
99   pci_inta - pci_intd inputs to the interrupt mapper, respectively,
100   or 0 if there is no mapping.  This is board specific, and the
101   version below is for BCM91125C, 32-bit slots only. */
102uint8_t
103pci_int_map_0(pcitag_t tag)
104{
105    pcireg_t data;
106    int pin, bus, device;
107
108    data = pci_conf_read(tag, PCI_BPARAM_INTERRUPT_REG);
109    pin = PCI_INTERRUPT_PIN(data);
110    if (pin == 0) {
111	/* No IRQ used. */
112	return 0;
113    }
114    if (pin > 4) {
115	if (_pciverbose >= 1)
116	    pci_tagprintf(tag, "pci_map_int: bad interrupt pin %d\n", pin);
117	return 0;
118    }
119
120    pci_break_tag(tag, NULL, &bus, &device, NULL);
121
122    if (bus != 0)
123	return 0;
124
125    switch (device) {
126    case 0:
127    case 5: case 6: case 7:
128        return (((pin - 1) + pci_int_shift_0(tag)) % 4) + 1;
129    default:
130        return 0;
131    }
132}
133