1/* ********************************************************************* 2 * SB1125 Board Support Package 3 * 4 * BCM11xx Checkout Board definitions File: bcm91125c.h 5 * 6 * This file contains I/O, chip select, and GPIO assignments 7 * for the BCM91125c checkout board. 8 * 9 * Author: Mitch Lichtenberg (mpl@broadcom.com) 10 * Binh Vo (binh@broadcom.com) 11 * 12 ********************************************************************* 13 * 14 * Copyright 2000,2001,2002,2003 15 * Broadcom Corporation. All rights reserved. 16 * 17 * This software is furnished under license and may be used and 18 * copied only in accordance with the following terms and 19 * conditions. Subject to these conditions, you may download, 20 * copy, install, use, modify and distribute modified or unmodified 21 * copies of this software in source and/or binary form. No title 22 * or ownership is transferred hereby. 23 * 24 * 1) Any source code used, modified or distributed must reproduce 25 * and retain this copyright notice and list of conditions 26 * as they appear in the source file. 27 * 28 * 2) No right is granted to use any trade name, trademark, or 29 * logo of Broadcom Corporation. The "Broadcom Corporation" 30 * name may not be used to endorse or promote products derived 31 * from this software without the prior written permission of 32 * Broadcom Corporation. 33 * 34 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR 35 * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED 36 * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR 37 * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT 38 * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN 39 * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, 40 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 41 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 42 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 43 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 44 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 45 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF 46 * THE POSSIBILITY OF SUCH DAMAGE. 47 ********************************************************************* */ 48 49 50/* 51 * I/O Address assignments for the bcm91125c board 52 * 53 * Summary of address map: 54 * 55 * Address Size CSel Description 56 * --------------- ---- ------ -------------------------------- 57 * 0x1FC00000 2MB CS0 Boot ROM 58 * 0x1F800000 2MB CS1 Alternate boot ROM (PromICE) 59 * 0x1E000000 16MB CS2 Big Flash 60 * 0x100A0000 64KB CS3 LED display 61 * CS4 Unused 62 * CS5 Unused 63 * CS6 Unused 64 * CS7 Unused 65 * 66 * GPIO assignments 67 * 68 * GPIO# Direction Description 69 * ------- --------- ------------------------------------------ 70 * GPIO0 Input Not used 71 * GPIO1 Input RTC Out (interrupt) 72 * GPIO2 Input Not used 73 * GPIO3 Input Not used 74 * GPIO4 Input Not used 75 * GPIO5 Input Temperature Sensor Alert (interrupt) 76 * GPIO6 Input HT Interrupt (interrupt) 77 * GPIO7 Input PHY Interrupt (interrupt) 78 * GPIO8 Input Not used 79 * GPIO9 Input Not used 80 * GPIO10 Input Not used 81 * GPIO11 Input Not used 82 * GPIO12 Input Not used 83 * GPIO13 Input Not used 84 * GPIO14 Output Serial port 1 Loopback Enable 85 * GPIO15 Output Serial port 0 Loopback Enable 86 */ 87 88/* ********************************************************************* 89 * Macros 90 ********************************************************************* */ 91 92#define MB (1024*1024) 93#define K64 65536 94#define NUM64K(x) (((x)+(K64-1))/K64) 95 96 97/* ********************************************************************* 98 * GPIO pins 99 ********************************************************************* */ 100 101#define GPIO_PHY_INTERRUPT 7 102#define GPIO_HT_INTERRUPT 6 103#define GPIO_TEMP_SENSOR_INT 5 104#define GPIO_RTC_OUT_INT 1 105 106#define GPIO_SERIAL1_LOOPBACK 14 107#define GPIO_SERIAL0_LOOPBACK 15 108 109 110#define M_GPIO_SERIAL1_LOOPBACK _SB_MAKEMASK1(GPIO_SERIAL1_LOOPBACK) 111#define M_GPIO_SERIAL0_LOOPBACK _SB_MAKEMASK1(GPIO_SERIAL0_LOOPBACK) 112#define M_GPIO_PHY_INTERRUPT _SB_MAKEMASK1(GPIO_PHY_INTERRUPT) 113#define M_GPIO_TEMP_SENSOR_INT _SB_MAKEMASK1(GPIO_TEMP_SENSOR_INT) 114#define M_GPIO_HT_INTERRUPT _SB_MAKEMASK1(GPIO_HT_INTERRUPT) 115#define M_GPIO_RTC_OUT_INT _SB_MAKEMASK1(GPIO_RTC_OUT_INT) 116 117#define GPIO_OUTPUT_MASK (_SB_MAKEMASK1(GPIO_SERIAL0_LOOPBACK) | \ 118 _SB_MAKEMASK1(GPIO_SERIAL1_LOOPBACK) ) 119 120#define GPIO_INTERRUPT_MASK ((V_GPIO_INTR_TYPEX(GPIO_PHY_INTERRUPT,K_GPIO_INTR_LEVEL)) | \ 121 (V_GPIO_INTR_TYPEX(GPIO_TEMP_SENSOR_INT,K_GPIO_INTR_LEVEL)) | \ 122 (V_GPIO_INTR_TYPEX(GPIO_HT_INTERRUPT,K_GPIO_INTR_LEVEL)) | \ 123 (V_GPIO_INTR_TYPEX(GPIO_RTC_OUT_INT,K_GPIO_INTR_LEVEL))) 124 125 126/* ********************************************************************* 127 * Generic Bus 128 ********************************************************************* */ 129 130#define BOOTROM_CS 0 131#define BOOTROM_PHYS 0x1FC00000 /* address of boot ROM (CS0) */ 132#define BOOTROM_SIZE NUM64K(2*MB) /* size of boot ROM */ 133#define BOOTROM_TIMING0 V_IO_ALE_WIDTH(4) | \ 134 V_IO_ALE_TO_CS(2) | \ 135 V_IO_CS_WIDTH(24) | \ 136 V_IO_RDY_SMPLE(1) 137#define BOOTROM_TIMING1 V_IO_ALE_TO_WRITE(7) | \ 138 V_IO_WRITE_WIDTH(7) | \ 139 V_IO_IDLE_CYCLE(6) | \ 140 V_IO_CS_TO_OE(0) | \ 141 V_IO_OE_TO_CS(0) 142#define BOOTROM_CONFIG V_IO_WIDTH_SEL(K_IO_WIDTH_SEL_1) | M_IO_NONMUX 143 144#define ALT_BOOTROM_CS 1 145#define ALT_BOOTROM_PHYS 0x1F800000 /* address of alternate boot ROM (CS1) */ 146#define ALT_BOOTROM_SIZE NUM64K(2*MB) /* size of alternate boot ROM */ 147#define ALT_BOOTROM_TIMING0 V_IO_ALE_WIDTH(4) | \ 148 V_IO_ALE_TO_CS(2) | \ 149 V_IO_CS_WIDTH(24) | \ 150 V_IO_RDY_SMPLE(1) 151#define ALT_BOOTROM_TIMING1 V_IO_ALE_TO_WRITE(7) | \ 152 V_IO_WRITE_WIDTH(7) | \ 153 V_IO_IDLE_CYCLE(6) | \ 154 V_IO_CS_TO_OE(0) | \ 155 V_IO_OE_TO_CS(0) 156#define ALT_BOOTROM_CONFIG V_IO_WIDTH_SEL(K_IO_WIDTH_SEL_1) | M_IO_NONMUX 157 158 159#define BIG_FLASH_CS 2 160#define BIG_FLASH_PHYS 0x1E000000 /* address of big flash ROM (CS2) */ 161#define BIG_FLASH_SIZE NUM64K(16*MB) /* size of big flash ROM */ 162#define BIG_FLASH_TIMING0 V_IO_ALE_WIDTH(4) | \ 163 V_IO_ALE_TO_CS(2) | \ 164 V_IO_CS_WIDTH(24) | \ 165 V_IO_RDY_SMPLE(1) 166#define BIG_FLASH_TIMING1 V_IO_ALE_TO_WRITE(7) | \ 167 V_IO_WRITE_WIDTH(7) | \ 168 V_IO_IDLE_CYCLE(6) | \ 169 V_IO_CS_TO_OE(0) | \ 170 V_IO_OE_TO_CS(0) 171#define BIG_FLASH_CONFIG V_IO_WIDTH_SEL(K_IO_WIDTH_SEL_1) | M_IO_NONMUX 172 173/* 174 * LEDs: non-multiplexed, byte width, no parity, no ack 175 */ 176#define LEDS_CS 3 177#define LEDS_PHYS 0x100A0000 178#define LEDS_SIZE NUM64K(4) 179#define LEDS_TIMING0 V_IO_ALE_WIDTH(4) | \ 180 V_IO_ALE_TO_CS(2) | \ 181 V_IO_CS_WIDTH(13) | \ 182 V_IO_RDY_SMPLE(1) 183#define LEDS_TIMING1 V_IO_ALE_TO_WRITE(2) | \ 184 V_IO_WRITE_WIDTH(8) | \ 185 V_IO_IDLE_CYCLE(6) | \ 186 V_IO_CS_TO_OE(0) | \ 187 V_IO_OE_TO_CS(0) 188#define LEDS_CONFIG V_IO_WIDTH_SEL(K_IO_WIDTH_SEL_1) | M_IO_NONMUX 189 190 191 192/* ********************************************************************* 193 * SMBus Devices 194 ********************************************************************* */ 195 196#define TEMPSENSOR_SMBUS_CHAN 0 197#define TEMPSENSOR_SMBUS_DEV 0x2A 198#define BIGEEPROM0_SMBUS_CHAN 0 199#define BIGEEPROM0_SMBUS_DEV 0x50 200#define BIGEEPROM1_SMBUS_CHAN 1 201#define BIGEEPROM1_SMBUS_DEV 0x50 202 203#define M41T81_SMBUS_CHAN 1 204#define M41T81_SMBUS_DEV 0x68 205