1/*
2 *  include/asm-s390/smp.h
3 *
4 *  S390 version
5 *    Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 *    Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
7 *               Martin Schwidefsky (schwidefsky@de.ibm.com)
8 */
9#ifndef __ASM_SMP_H
10#define __ASM_SMP_H
11
12#include <linux/config.h>
13
14#if defined(__KERNEL__) && defined(CONFIG_SMP) && !defined(__ASSEMBLY__)
15
16#include <asm/lowcore.h>
17
18/*
19  s390 specific smp.c headers
20 */
21typedef struct
22{
23	int        intresting;
24	sigp_ccode ccode;
25	__u32      status;
26	__u16      cpu;
27} sigp_info;
28
29extern unsigned long cpu_online_map;
30
31#define NO_PROC_ID		0xFF		/* No processor magic marker */
32
33/*
34 *	This magic constant controls our willingness to transfer
35 *	a process across CPUs. Such a transfer incurs misses on the L1
36 *	cache, and on a P6 or P5 with multiple L2 caches L2 hits. My
37 *	gut feeling is this will vary by board in value. For a board
38 *	with separate L2 cache it probably depends also on the RSS, and
39 *	for a board with shared L2 cache it ought to decay fast as other
40 *	processes are run.
41 */
42
43#define PROC_CHANGE_PENALTY	20		/* Schedule penalty */
44
45#define smp_processor_id() (current->processor)
46
47extern __inline__ int cpu_logical_map(int cpu)
48{
49        return cpu;
50}
51
52extern __inline__ int cpu_number_map(int cpu)
53{
54        return cpu;
55}
56
57extern __inline__ __u16 hard_smp_processor_id(void)
58{
59        __u16 cpu_address;
60
61        __asm__ ("stap %0\n" : "=m" (cpu_address));
62        return cpu_address;
63}
64
65#define cpu_logical_map(cpu) (cpu)
66
67#endif
68#endif
69