1/* 2 * include/asm-s390/ptrace.h 3 * 4 * S390 version 5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation 6 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) 7 */ 8 9#ifndef _S390_PTRACE_H 10#define _S390_PTRACE_H 11 12/* 13 * Offsets in the user_regs_struct. They are used for the ptrace 14 * system call and in entry.S 15 */ 16#define PT_PSWMASK 0x00 17#define PT_PSWADDR 0x08 18#define PT_GPR0 0x10 19#define PT_GPR1 0x18 20#define PT_GPR2 0x20 21#define PT_GPR3 0x28 22#define PT_GPR4 0x30 23#define PT_GPR5 0x38 24#define PT_GPR6 0x40 25#define PT_GPR7 0x48 26#define PT_GPR8 0x50 27#define PT_GPR9 0x58 28#define PT_GPR10 0x60 29#define PT_GPR11 0x68 30#define PT_GPR12 0x70 31#define PT_GPR13 0x78 32#define PT_GPR14 0x80 33#define PT_GPR15 0x88 34#define PT_ACR0 0x90 35#define PT_ACR1 0x94 36#define PT_ACR2 0x98 37#define PT_ACR3 0x9C 38#define PT_ACR4 0xA0 39#define PT_ACR5 0xA4 40#define PT_ACR6 0xA8 41#define PT_ACR7 0xAC 42#define PT_ACR8 0xB0 43#define PT_ACR9 0xB4 44#define PT_ACR10 0xB8 45#define PT_ACR11 0xBC 46#define PT_ACR12 0xC0 47#define PT_ACR13 0xC4 48#define PT_ACR14 0xC8 49#define PT_ACR15 0xCC 50#define PT_ORIGGPR2 0xD0 51#define PT_FPC 0xD8 52#define PT_FPR0 0xE0 53#define PT_FPR1 0xE8 54#define PT_FPR2 0xF0 55#define PT_FPR3 0xF8 56#define PT_FPR4 0x100 57#define PT_FPR5 0x108 58#define PT_FPR6 0x110 59#define PT_FPR7 0x118 60#define PT_FPR8 0x120 61#define PT_FPR9 0x128 62#define PT_FPR10 0x130 63#define PT_FPR11 0x138 64#define PT_FPR12 0x140 65#define PT_FPR13 0x148 66#define PT_FPR14 0x150 67#define PT_FPR15 0x158 68#define PT_CR_9 0x160 69#define PT_CR_10 0x168 70#define PT_CR_11 0x170 71#define PT_IEEE_IP 0x1A8 72#define PT_LASTOFF PT_IEEE_IP 73#define PT_ENDREGS 0x1B0-1 74 75#define NUM_GPRS 16 76#define NUM_FPRS 16 77#define NUM_CRS 16 78#define NUM_ACRS 16 79#define GPR_SIZE 8 80#define FPR_SIZE 8 81#define FPC_SIZE 4 82#define FPC_PAD_SIZE 4 /* gcc insists on aligning the fpregs */ 83#define CR_SIZE 8 84#define ACR_SIZE 4 85 86#define STACK_FRAME_OVERHEAD 160 /* size of minimum stack frame */ 87 88#ifndef __ASSEMBLY__ 89#include <linux/config.h> 90#include <linux/stddef.h> 91#include <linux/types.h> 92 93#include <asm/current.h> 94#include <asm/setup.h> 95 96/* this typedef defines how a Program Status Word looks like */ 97typedef struct 98{ 99 __u64 mask; 100 __u64 addr; 101} __attribute__ ((aligned(8))) psw_t; 102 103#ifdef __KERNEL__ 104#define FIX_PSW(addr) ((unsigned long)(addr)) 105#define ADDR_BITS_REMOVE(addr) ((addr)) 106#endif 107 108typedef union 109{ 110 float f; 111 double d; 112 __u64 ui; 113 struct 114 { 115 __u32 hi; 116 __u32 lo; 117 } fp; 118} freg_t; 119 120typedef struct 121{ 122 __u32 fpc; 123 freg_t fprs[NUM_FPRS]; 124} s390_fp_regs; 125 126#define FPC_EXCEPTION_MASK 0xF8000000 127#define FPC_FLAGS_MASK 0x00F80000 128#define FPC_DXC_MASK 0x0000FF00 129#define FPC_RM_MASK 0x00000003 130#define FPC_VALID_MASK 0xF8F8FF03 131 132/* 133 * The first entries in pt_regs and user_regs_struct 134 * are common for the two structures. The s390_regs structure 135 * covers the common parts. It simplifies copying the common part 136 * between the three structures. 137 */ 138typedef struct 139{ 140 psw_t psw; 141 __u64 gprs[NUM_GPRS]; 142 __u32 acrs[NUM_ACRS]; 143 __u64 orig_gpr2; 144} s390_regs; 145 146/* 147 * The pt_regs struct defines the way the registers are stored on 148 * the stack during a system call. 149 */ 150struct pt_regs 151{ 152 psw_t psw; 153 __u64 gprs[NUM_GPRS]; 154 __u32 acrs[NUM_ACRS]; 155 __u64 orig_gpr2; 156 __u32 trap; 157} __attribute__ ((packed)); 158 159/* 160 * Now for the program event recording (trace) definitions. 161 */ 162typedef struct 163{ 164 __u64 cr[3]; 165} per_cr_words; 166 167#define PER_EM_MASK 0x00000000E8000000UL 168 169typedef struct 170{ 171 unsigned : 32; 172 unsigned em_branching : 1; 173 unsigned em_instruction_fetch : 1; 174 /* 175 * Switching on storage alteration automatically fixes 176 * the storage alteration event bit in the users std. 177 */ 178 unsigned em_storage_alteration : 1; 179 unsigned em_gpr_alt_unused : 1; 180 unsigned em_store_real_address : 1; 181 unsigned : 3; 182 unsigned branch_addr_ctl : 1; 183 unsigned : 1; 184 unsigned storage_alt_space_ctl : 1; 185 unsigned : 21; 186 addr_t starting_addr; 187 addr_t ending_addr; 188} per_cr_bits; 189 190typedef struct 191{ 192 __u16 perc_atmid; 193 addr_t address; 194 __u8 access_id; 195} per_lowcore_words; 196 197typedef struct 198{ 199 unsigned perc_branching : 1; /* 0x096 */ 200 unsigned perc_instruction_fetch : 1; 201 unsigned perc_storage_alteration : 1; 202 unsigned perc_gpr_alt_unused : 1; 203 unsigned perc_store_real_address : 1; 204 unsigned : 3; 205 unsigned atmid_psw_bit_31 : 1; 206 unsigned atmid_validity_bit : 1; 207 unsigned atmid_psw_bit_32 : 1; 208 unsigned atmid_psw_bit_5 : 1; 209 unsigned atmid_psw_bit_16 : 1; 210 unsigned atmid_psw_bit_17 : 1; 211 unsigned si : 2; 212 addr_t address; /* 0x098 */ 213 unsigned : 4; /* 0x0a1 */ 214 unsigned access_id : 4; 215} per_lowcore_bits; 216 217typedef struct 218{ 219 union { 220 per_cr_words words; 221 per_cr_bits bits; 222 } control_regs; 223 /* 224 * Use these flags instead of setting em_instruction_fetch 225 * directly they are used so that single stepping can be 226 * switched on & off while not affecting other tracing 227 */ 228 unsigned single_step : 1; 229 unsigned instruction_fetch : 1; 230 unsigned : 30; 231 /* 232 * These addresses are copied into cr10 & cr11 if single 233 * stepping is switched off 234 */ 235 addr_t starting_addr; 236 addr_t ending_addr; 237 union { 238 per_lowcore_words words; 239 per_lowcore_bits bits; 240 } lowcore; 241} per_struct; 242 243typedef struct 244{ 245 __u32 len; 246 addr_t kernel_addr; 247 addr_t process_addr; 248} ptrace_area; 249 250/* 251 * S/390 specific non posix ptrace requests. I chose unusual values so 252 * they are unlikely to clash with future ptrace definitions. 253 */ 254#define PTRACE_PEEKUSR_AREA 0x5000 255#define PTRACE_POKEUSR_AREA 0x5001 256#define PTRACE_PEEKTEXT_AREA 0x5002 257#define PTRACE_PEEKDATA_AREA 0x5003 258#define PTRACE_POKETEXT_AREA 0x5004 259#define PTRACE_POKEDATA_AREA 0x5005 260/* 261 * PT_PROT definition is loosely based on hppa bsd definition in 262 * gdb/hppab-nat.c 263 */ 264#define PTRACE_PROT 21 265 266typedef enum 267{ 268 ptprot_set_access_watchpoint, 269 ptprot_set_write_watchpoint, 270 ptprot_disable_watchpoint 271} ptprot_flags; 272 273typedef struct 274{ 275 addr_t lowaddr; 276 addr_t hiaddr; 277 ptprot_flags prot; 278} ptprot_area; 279 280/* Sequence of bytes for breakpoint illegal instruction. */ 281#define S390_BREAKPOINT {0x0,0x1} 282#define S390_BREAKPOINT_U16 ((__u16)0x0001) 283#define S390_SYSCALL_OPCODE ((__u16)0x0a00) 284#define S390_SYSCALL_SIZE 2 285 286/* 287 * The user_regs_struct defines the way the user registers are 288 * store on the stack for signal handling. 289 */ 290struct user_regs_struct 291{ 292 psw_t psw; 293 __u64 gprs[NUM_GPRS]; 294 __u32 acrs[NUM_ACRS]; 295 __u64 orig_gpr2; 296 s390_fp_regs fp_regs; 297 /* 298 * These per registers are in here so that gdb can modify them 299 * itself as there is no "official" ptrace interface for hardware 300 * watchpoints. This is the way intel does it. 301 */ 302 per_struct per_info; 303 addr_t ieee_instruction_pointer; 304 /* Used to give failing instruction back to user for ieee exceptions */ 305}; 306 307#ifdef __KERNEL__ 308#define user_mode(regs) (((regs)->psw.mask & PSW_PROBLEM_STATE) != 0) 309#define instruction_pointer(regs) ((regs)->psw.addr) 310extern void show_regs(struct pt_regs * regs); 311extern char *task_show_regs(struct task_struct *task, char *buffer); 312#endif 313 314#endif /* __ASSEMBLY__ */ 315 316#endif /* _S390X_PTRACE_H */ 317