1/* 2 * include/asm-s390/pgtable.h 3 * 4 * S390 version 5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation 6 * Author(s): Hartmut Penner (hp@de.ibm.com) 7 * Ulrich Weigand (weigand@de.ibm.com) 8 * Martin Schwidefsky (schwidefsky@de.ibm.com) 9 * 10 * Derived from "include/asm-i386/pgtable.h" 11 */ 12 13#ifndef _ASM_S390_PGTABLE_H 14#define _ASM_S390_PGTABLE_H 15 16/* 17 * The Linux memory management assumes a three-level page table setup. On 18 * the S390, we use that, but "fold" the mid level into the top-level page 19 * table, so that we physically have the same two-level page table as the 20 * S390 mmu expects. 21 * 22 * The "pgd_xxx()" functions are trivial for a folded two-level 23 * setup: the pgd is never bad, and a pmd always exists (as it's folded 24 * into the pgd entry) 25 * 26 * This file contains the functions and defines necessary to modify and use 27 * the S390 page table tree. 28 */ 29#ifndef __ASSEMBLY__ 30#include <asm/processor.h> 31#include <linux/threads.h> 32 33extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096))); 34extern void paging_init(void); 35 36/* Caches aren't brain-dead on S390. */ 37#define flush_cache_all() do { } while (0) 38#define flush_cache_mm(mm) do { } while (0) 39#define flush_cache_range(mm, start, end) do { } while (0) 40#define flush_cache_page(vma, vmaddr) do { } while (0) 41#define flush_page_to_ram(page) do { } while (0) 42#define flush_dcache_page(page) do { } while (0) 43#define flush_icache_range(start, end) do { } while (0) 44#define flush_icache_page(vma,pg) do { } while (0) 45#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) 46 47/* 48 * The S390 doesn't have any external MMU info: the kernel page 49 * tables contain all the necessary information. 50 */ 51#define update_mmu_cache(vma, address, pte) do { } while (0) 52 53/* 54 * ZERO_PAGE is a global shared page that is always zero: used 55 * for zero-mapped memory areas etc.. 56 */ 57extern char empty_zero_page[PAGE_SIZE]; 58#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) 59#endif /* !__ASSEMBLY__ */ 60 61/* 62 * PMD_SHIFT determines the size of the area a second-level page 63 * table can map 64 */ 65#define PMD_SHIFT 22 66#define PMD_SIZE (1UL << PMD_SHIFT) 67#define PMD_MASK (~(PMD_SIZE-1)) 68 69/* PGDIR_SHIFT determines what a third-level page table entry can map */ 70#define PGDIR_SHIFT 22 71#define PGDIR_SIZE (1UL << PGDIR_SHIFT) 72#define PGDIR_MASK (~(PGDIR_SIZE-1)) 73 74/* 75 * entries per page directory level: the S390 is two-level, so 76 * we don't really have any PMD directory physically. 77 * for S390 segment-table entries are combined to one PGD 78 * that leads to 1024 pte per pgd 79 */ 80#define PTRS_PER_PTE 1024 81#define PTRS_PER_PMD 1 82#define PTRS_PER_PGD 512 83 84/* 85 * pgd entries used up by user/kernel: 86 */ 87#define USER_PTRS_PER_PGD 512 88#define USER_PGD_PTRS 512 89#define KERNEL_PGD_PTRS 512 90#define FIRST_USER_PGD_NR 0 91 92#define pte_ERROR(e) \ 93 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) 94#define pmd_ERROR(e) \ 95 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e)) 96#define pgd_ERROR(e) \ 97 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) 98 99#ifndef __ASSEMBLY__ 100/* 101 * Just any arbitrary offset to the start of the vmalloc VM area: the 102 * current 8MB value just means that there will be a 8MB "hole" after the 103 * physical memory until the kernel virtual memory starts. That means that 104 * any out-of-bounds memory accesses will hopefully be caught. 105 * The vmalloc() routines leaves a hole of 4kB between each vmalloced 106 * area for the same reason. ;) 107 */ 108#define VMALLOC_OFFSET (8*1024*1024) 109#define VMALLOC_START (((unsigned long) high_memory + VMALLOC_OFFSET) \ 110 & ~(VMALLOC_OFFSET-1)) 111#define VMALLOC_VMADDR(x) ((unsigned long)(x)) 112#define VMALLOC_END (0x7fffffffL) 113 114 115/* 116 * A pagetable entry of S390 has following format: 117 * | PFRA | | OS | 118 * 0 0IP0 119 * 00000000001111111111222222222233 120 * 01234567890123456789012345678901 121 * 122 * I Page-Invalid Bit: Page is not available for address-translation 123 * P Page-Protection Bit: Store access not possible for page 124 * 125 * A segmenttable entry of S390 has following format: 126 * | P-table origin | |PTL 127 * 0 IC 128 * 00000000001111111111222222222233 129 * 01234567890123456789012345678901 130 * 131 * I Segment-Invalid Bit: Segment is not available for address-translation 132 * C Common-Segment Bit: Segment is not private (PoP 3-30) 133 * PTL Page-Table-Length: Page-table length (PTL+1*16 entries -> up to 256) 134 * 135 * The segmenttable origin of S390 has following format: 136 * 137 * |S-table origin | | STL | 138 * X **GPS 139 * 00000000001111111111222222222233 140 * 01234567890123456789012345678901 141 * 142 * X Space-Switch event: 143 * G Segment-Invalid Bit: * 144 * P Private-Space Bit: Segment is not private (PoP 3-30) 145 * S Storage-Alteration: 146 * STL Segment-Table-Length: Segment-table length (STL+1*16 entries -> up to 2048) 147 * 148 * A storage key has the following format: 149 * | ACC |F|R|C|0| 150 * 0 3 4 5 6 7 151 * ACC: access key 152 * F : fetch protection bit 153 * R : referenced bit 154 * C : changed bit 155 */ 156 157/* Bits in the page table entry */ 158#define _PAGE_PRESENT 0x001 /* Software */ 159#define _PAGE_MKCLEAN 0x002 /* Software */ 160#define _PAGE_ISCLEAN 0x004 /* Software */ 161#define _PAGE_RO 0x200 /* HW read-only */ 162#define _PAGE_INVALID 0x400 /* HW invalid */ 163 164/* Bits in the segment table entry */ 165#define _PAGE_TABLE_LEN 0xf /* only full page-tables */ 166#define _PAGE_TABLE_COM 0x10 /* common page-table */ 167#define _PAGE_TABLE_INV 0x20 /* invalid page-table */ 168#define _SEG_PRESENT 0x001 /* Software (overlap with PTL) */ 169 170/* Bits int the storage key */ 171#define _PAGE_CHANGED 0x02 /* HW changed bit */ 172#define _PAGE_REFERENCED 0x04 /* HW referenced bit */ 173 174#define _USER_SEG_TABLE_LEN 0x7f /* user-segment-table up to 2 GB */ 175#define _KERNEL_SEG_TABLE_LEN 0x7f /* kernel-segment-table up to 2 GB */ 176 177/* 178 * User and Kernel pagetables are identical 179 */ 180#define _PAGE_TABLE (_PAGE_TABLE_LEN ) 181#define _KERNPG_TABLE (_PAGE_TABLE_LEN ) 182 183/* 184 * The Kernel segment-tables includes the User segment-table 185 */ 186 187#define _SEGMENT_TABLE (_USER_SEG_TABLE_LEN|0x80000000|0x100) 188#define _KERNSEG_TABLE (_KERNEL_SEG_TABLE_LEN) 189 190/* 191 * No mapping available 192 */ 193#define PAGE_INVALID __pgprot(_PAGE_INVALID) 194#define PAGE_NONE_SHARED __pgprot(_PAGE_PRESENT|_PAGE_INVALID) 195#define PAGE_NONE_PRIVATE __pgprot(_PAGE_PRESENT|_PAGE_INVALID|_PAGE_ISCLEAN) 196#define PAGE_RO_SHARED __pgprot(_PAGE_PRESENT|_PAGE_RO) 197#define PAGE_RO_PRIVATE __pgprot(_PAGE_PRESENT|_PAGE_RO|_PAGE_ISCLEAN) 198#define PAGE_COPY __pgprot(_PAGE_PRESENT|_PAGE_RO|_PAGE_ISCLEAN) 199#define PAGE_SHARED __pgprot(_PAGE_PRESENT) 200#define PAGE_KERNEL __pgprot(_PAGE_PRESENT) 201 202/* 203 * The S390 can't do page protection for execute, and considers that the 204 * same are read. Also, write permissions imply read permissions. This is 205 * the closest we can get.. 206 */ 207 /*xwr*/ 208#define __P000 PAGE_NONE_PRIVATE 209#define __P001 PAGE_RO_PRIVATE 210#define __P010 PAGE_COPY 211#define __P011 PAGE_COPY 212#define __P100 PAGE_RO_PRIVATE 213#define __P101 PAGE_RO_PRIVATE 214#define __P110 PAGE_COPY 215#define __P111 PAGE_COPY 216 217#define __S000 PAGE_NONE_SHARED 218#define __S001 PAGE_RO_SHARED 219#define __S010 PAGE_SHARED 220#define __S011 PAGE_SHARED 221#define __S100 PAGE_RO_SHARED 222#define __S101 PAGE_RO_SHARED 223#define __S110 PAGE_SHARED 224#define __S111 PAGE_SHARED 225 226/* 227 * Certain architectures need to do special things when PTEs 228 * within a page table are directly modified. Thus, the following 229 * hook is made available. 230 */ 231extern inline void set_pte(pte_t *pteptr, pte_t pteval) 232{ 233 if ((pte_val(pteval) & (_PAGE_MKCLEAN|_PAGE_INVALID)) 234 == _PAGE_MKCLEAN) 235 { 236 pte_val(pteval) &= ~_PAGE_MKCLEAN; 237 238 asm volatile ("sske %0,%1" 239 : : "d" (0), "a" (pte_val(pteval))); 240 } 241 242 *pteptr = pteval; 243} 244 245#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) 246 247/* 248 * pgd/pmd/pte query functions 249 */ 250extern inline int pgd_present(pgd_t pgd) { return 1; } 251extern inline int pgd_none(pgd_t pgd) { return 0; } 252extern inline int pgd_bad(pgd_t pgd) { return 0; } 253 254extern inline int pmd_present(pmd_t pmd) { return pmd_val(pmd) & _SEG_PRESENT; } 255extern inline int pmd_none(pmd_t pmd) { return pmd_val(pmd) & _PAGE_TABLE_INV; } 256extern inline int pmd_bad(pmd_t pmd) 257{ 258 return (pmd_val(pmd) & (~PAGE_MASK & ~_PAGE_TABLE_INV)) != _PAGE_TABLE; 259} 260 261extern inline int pte_present(pte_t pte) { return pte_val(pte) & _PAGE_PRESENT; } 262extern inline int pte_none(pte_t pte) 263{ 264 return ((pte_val(pte) & 265 (_PAGE_INVALID | _PAGE_RO | _PAGE_PRESENT)) == _PAGE_INVALID); 266} 267 268#define pte_same(a,b) (pte_val(a) == pte_val(b)) 269 270/* 271 * query functions pte_write/pte_dirty/pte_young only work if 272 * pte_present() is true. Undefined behaviour if not.. 273 */ 274extern inline int pte_write(pte_t pte) 275{ 276 return (pte_val(pte) & _PAGE_RO) == 0; 277} 278 279extern inline int pte_dirty(pte_t pte) 280{ 281 int skey; 282 283 if (pte_val(pte) & _PAGE_ISCLEAN) 284 return 0; 285 asm volatile ("iske %0,%1" : "=d" (skey) : "a" (pte_val(pte))); 286 return skey & _PAGE_CHANGED; 287} 288 289extern inline int pte_young(pte_t pte) 290{ 291 int skey; 292 293 asm volatile ("iske %0,%1" : "=d" (skey) : "a" (pte_val(pte))); 294 return skey & _PAGE_REFERENCED; 295} 296 297/* 298 * pgd/pmd/pte modification functions 299 */ 300extern inline void pgd_clear(pgd_t * pgdp) { } 301 302extern inline void pmd_clear(pmd_t * pmdp) 303{ 304 pmd_val(pmdp[0]) = _PAGE_TABLE_INV; 305 pmd_val(pmdp[1]) = _PAGE_TABLE_INV; 306 pmd_val(pmdp[2]) = _PAGE_TABLE_INV; 307 pmd_val(pmdp[3]) = _PAGE_TABLE_INV; 308} 309 310extern inline void pte_clear(pte_t *ptep) 311{ 312 pte_val(*ptep) = _PAGE_INVALID; 313} 314 315#define PTE_INIT(x) pte_clear(x) 316 317/* 318 * The following pte modification functions only work if 319 * pte_present() is true. Undefined behaviour if not.. 320 */ 321extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 322{ 323 pte_val(pte) &= PAGE_MASK | _PAGE_ISCLEAN; 324 pte_val(pte) |= pgprot_val(newprot) & ~_PAGE_ISCLEAN; 325 return pte; 326} 327 328extern inline pte_t pte_wrprotect(pte_t pte) 329{ 330 pte_val(pte) |= _PAGE_RO; 331 return pte; 332} 333 334extern inline pte_t pte_mkwrite(pte_t pte) 335{ 336 pte_val(pte) &= ~_PAGE_RO; 337 return pte; 338} 339 340extern inline pte_t pte_mkclean(pte_t pte) 341{ 342 /* The only user of pte_mkclean is the fork() code. 343 We must *not* clear the *physical* page dirty bit 344 just because fork() wants to clear the dirty bit in 345 *one* of the page's mappings. So we just do nothing. */ 346 return pte; 347} 348 349extern inline pte_t pte_mkdirty(pte_t pte) 350{ 351 /* We do not explicitly set the dirty bit because the 352 * sske instruction is slow. It is faster to let the 353 * next instruction set the dirty bit. 354 */ 355 pte_val(pte) &= ~(_PAGE_MKCLEAN | _PAGE_ISCLEAN); 356 return pte; 357} 358 359extern inline pte_t pte_mkold(pte_t pte) 360{ 361 asm volatile ("rrbe 0,%0" : : "a" (pte_val(pte)) : "cc" ); 362 return pte; 363} 364 365extern inline pte_t pte_mkyoung(pte_t pte) 366{ 367 /* To set the referenced bit we read the first word from the real 368 * page with a special instruction: load using real address (lura). 369 * Isn't S/390 a nice architecture ?! */ 370 asm volatile ("lura 0,%0" : : "a" (pte_val(pte) & PAGE_MASK) : "0" ); 371 return pte; 372} 373 374static inline int ptep_test_and_clear_young(pte_t *ptep) 375{ 376 int ccode; 377 378 asm volatile ("rrbe 0,%1\n\t" 379 "ipm %0\n\t" 380 "srl %0,28\n\t" 381 : "=d" (ccode) : "a" (pte_val(*ptep)) : "cc" ); 382 return ccode & 2; 383} 384 385static inline int ptep_test_and_clear_dirty(pte_t *ptep) 386{ 387 int skey; 388 389 if (pte_val(*ptep) & _PAGE_ISCLEAN) 390 return 0; 391 asm volatile ("iske %0,%1" : "=d" (skey) : "a" (*ptep)); 392 if ((skey & _PAGE_CHANGED) == 0) 393 return 0; 394 /* We can't clear the changed bit atomically. For now we 395 * clear (!) the page referenced bit. */ 396 asm volatile ("sske %0,%1" 397 : : "d" (0), "a" (*ptep)); 398 return 1; 399} 400 401static inline pte_t ptep_get_and_clear(pte_t *ptep) 402{ 403 pte_t pte = *ptep; 404 pte_clear(ptep); 405 return pte; 406} 407 408static inline void ptep_set_wrprotect(pte_t *ptep) 409{ 410 pte_t old_pte = *ptep; 411 set_pte(ptep, pte_wrprotect(old_pte)); 412} 413 414static inline void ptep_mkdirty(pte_t *ptep) 415{ 416 pte_mkdirty(*ptep); 417} 418 419/* 420 * Conversion functions: convert a page and protection to a page entry, 421 * and a page entry and page directory to the page they refer to. 422 */ 423static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot) 424{ 425 pte_t __pte; 426 pte_val(__pte) = physpage + pgprot_val(pgprot); 427 return __pte; 428} 429 430#define mk_pte(pg, pgprot) \ 431({ \ 432 struct page *__page = (pg); \ 433 pgprot_t __pgprot = (pgprot); \ 434 unsigned long __physpage = __pa((__page-mem_map) << PAGE_SHIFT); \ 435 pte_t __pte = mk_pte_phys(__physpage, __pgprot); \ 436 \ 437 if (!(pgprot_val(__pgprot) & _PAGE_ISCLEAN)) { \ 438 int __users = !!__page->buffers + !!__page->mapping; \ 439 if (__users + page_count(__page) == 1) \ 440 pte_val(__pte) |= _PAGE_MKCLEAN; \ 441 } \ 442 __pte; \ 443}) 444 445#define pte_page(x) (mem_map+(unsigned long)((pte_val(x) >> PAGE_SHIFT))) 446 447#define pmd_page(pmd) \ 448 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) 449 450/* to find an entry in a page-table-directory */ 451#define pgd_index(address) ((address >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) 452#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address)) 453 454/* to find an entry in a kernel page-table-directory */ 455#define pgd_offset_k(address) pgd_offset(&init_mm, address) 456 457/* Find an entry in the second-level page table.. */ 458extern inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address) 459{ 460 return (pmd_t *) dir; 461} 462 463/* Find an entry in the third-level page table.. */ 464#define pte_offset(pmd, address) \ 465 ((pte_t *) (pmd_page(*pmd) + ((address>>10) & ((PTRS_PER_PTE-1)<<2)))) 466 467/* 468 * A page-table entry has some bits we have to treat in a special way. 469 * Bits 0, 20 and bit 23 have to be zero, otherwise an specification 470 * exception will occur instead of a page translation exception. The 471 * specifiation exception has the bad habit not to store necessary 472 * information in the lowcore. 473 * Bit 21 and bit 22 are the page invalid bit and the page protection 474 * bit. We set both to indicate a swapped page. 475 * Bit 31 is used as the software page present bit. If a page is 476 * swapped this obviously has to be zero. 477 * This leaves the bits 1-19 and bits 24-30 to store type and offset. 478 * We use the 7 bits from 24-30 for the type and the 19 bits from 1-19 479 * for the offset. 480 * 0| offset |0110|type |0 481 * 00000000001111111111222222222233 482 * 01234567890123456789012345678901 483 */ 484extern inline pte_t mk_swap_pte(unsigned long type, unsigned long offset) 485{ 486 pte_t pte; 487 pte_val(pte) = (type << 1) | (offset << 12) | _PAGE_INVALID | _PAGE_RO; 488 pte_val(pte) &= 0x7ffff6fe; /* better to be paranoid */ 489 return pte; 490} 491 492#define SWP_TYPE(entry) (((entry).val >> 1) & 0x3f) 493#define SWP_OFFSET(entry) (((entry).val >> 12) & 0x7FFFF ) 494#define SWP_ENTRY(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) }) 495 496#define pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) 497#define swp_entry_to_pte(x) ((pte_t) { (x).val }) 498 499#endif /* !__ASSEMBLY__ */ 500 501/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ 502#define PageSkip(page) (0) 503#define kern_addr_valid(addr) (1) 504 505/* 506 * No page table caches to initialise 507 */ 508#define pgtable_cache_init() do { } while (0) 509 510#endif /* _S390_PAGE_H */ 511 512