1#ifdef __KERNEL__
2#ifndef _ASM_PCI_BRIDGE_H
3#define _ASM_PCI_BRIDGE_H
4
5/*
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12struct device_node;
13struct pci_controller;
14
15/*
16 * pci_io_base returns the memory address at which you can access
17 * the I/O space for PCI bus number `bus' (or NULL on error).
18 */
19extern void *pci_bus_io_base(unsigned int bus);
20extern unsigned long pci_bus_io_base_phys(unsigned int bus);
21extern unsigned long pci_bus_mem_base_phys(unsigned int bus);
22
23/* Get the PCI host controller for a bus */
24extern struct pci_controller* pci_bus_to_hose(int bus);
25
26/* Get the PCI host controller for an OF device */
27extern struct pci_controller*
28pci_find_hose_for_OF_device(struct device_node* node);
29
30enum phb_types {
31	phb_type_unknown    = 0x0,
32	phb_type_hypervisor = 0x1,
33	phb_type_python     = 0x10,
34	phb_type_speedwagon = 0x11
35};
36
37/*
38 * Structure of a PCI controller (host bridge)
39 */
40struct pci_controller {
41	char what[8];                     /* Eye catcher      */
42	enum phb_types type;              /* Type of hardware */
43	struct pci_controller *next;
44	struct pci_bus *bus;
45	void *arch_data;
46
47	int first_busno;
48	int last_busno;
49
50	void *io_base_virt;
51	unsigned long io_base_phys;
52
53	/* Some machines (PReP) have a non 1:1 mapping of
54	 * the PCI memory space in the CPU bus space
55	 */
56	unsigned long pci_mem_offset;
57	unsigned long pci_io_offset;
58
59	struct pci_ops *ops;
60	volatile unsigned long *cfg_addr;
61	volatile unsigned char *cfg_data;
62	volatile unsigned long *phb_regs;
63	volatile unsigned long *chip_regs;
64
65	/* Currently, we limit ourselves to 1 IO range and 3 mem
66	 * ranges since the common pci_bus structure can't handle more
67	 */
68	struct resource io_resource;
69	struct resource mem_resources[3];
70	int mem_resource_count;
71	int    global_number;
72	int    local_number;
73	int    system_bus_number;
74	unsigned long buid;
75	unsigned long dma_window_base_cur;
76	unsigned long dma_window_size;
77};
78
79
80/* This version handles the new Uni-N host bridge, the iobase is now
81 * a per-device thing. I also added the memory base so PReP can
82 * be fixed to return 0xc0000000 (I didn't actually implement it)
83 *
84 * pci_dev_io_base() returns either a virtual (ioremap'ed) address or
85 * a physical address. In-kernel clients will use logical while the
86 * sys_pciconfig_iobase syscall returns a physical one to userland.
87 */
88void *pci_dev_io_base(unsigned char bus, unsigned char devfn, int physical);
89void *pci_dev_mem_base(unsigned char bus, unsigned char devfn);
90
91/* Returns the root-bridge number (Uni-N number) of a device */
92int pci_dev_root_bridge(unsigned char bus, unsigned char devfn);
93
94/*
95 * pci_device_loc returns the bus number and device/function number
96 * for a device on a PCI bus, given its device_node struct.
97 * It returns 0 if OK, -1 on error.
98 */
99int pci_device_loc(struct device_node *dev, unsigned char *bus_ptr,
100		   unsigned char *devfn_ptr);
101
102struct bridge_data {
103	volatile unsigned int *cfg_addr;
104	volatile unsigned char *cfg_data;
105	void *io_base;		/* virtual */
106	unsigned long io_base_phys;
107	int bus_number;
108	int max_bus;
109	struct bridge_data *next;
110	struct device_node *node;
111};
112
113#endif
114#endif /* __KERNEL__ */
115