1/* 2 * AMD Alchemy DB1x00 Reference Boards 3 * 4 * Copyright 2001 MontaVista Software Inc. 5 * Author: MontaVista Software, Inc. 6 * ppopov@mvista.com or source@mvista.com 7 * 8 * ######################################################################## 9 * 10 * This program is free software; you can distribute it and/or modify it 11 * under the terms of the GNU General Public License (Version 2) as 12 * published by the Free Software Foundation. 13 * 14 * This program is distributed in the hope it will be useful, but WITHOUT 15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 17 * for more details. 18 * 19 * You should have received a copy of the GNU General Public License along 20 * with this program; if not, write to the Free Software Foundation, Inc., 21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 22 * 23 * ######################################################################## 24 * 25 * 26 */ 27#ifndef __ASM_DB1X00_H 28#define __ASM_DB1X00_H 29 30 31/* 32 * Overlay data structure of the Db1x00 board registers. 33 * Registers located at physical 1E0000xx, KSEG1 0xAE0000xx 34 */ 35typedef volatile struct 36{ 37 /*00*/ unsigned long whoami; 38 /*04*/ unsigned long status; 39 /*08*/ unsigned long switches; 40 /*0C*/ unsigned long resets; 41 /*10*/ unsigned long pcmcia; 42 /*14*/ unsigned long specific; 43 /*18*/ unsigned long leds; 44 /*1C*/ unsigned long swreset; 45 46} BCSR; 47 48/* 49 * Register/mask bit definitions for the BCSRs 50 */ 51#define BCSR_WHOAMI_DCID 0x000F 52#define BCSR_WHOAMI_CPLD 0x00F0 53#define BCSR_WHOAMI_BOARD 0x0F00 54 55#define BCSR_STATUS_PC0VS 0x0003 56#define BCSR_STATUS_PC1VS 0x000C 57#define BCSR_STATUS_PC0FI 0x0010 58#define BCSR_STATUS_PC1FI 0x0020 59#define BCSR_STATUS_FLASHBUSY 0x0100 60#define BCSR_STATUS_ROMBUSY 0x0400 61#define BCSR_STATUS_SWAPBOOT 0x2000 62#define BCSR_STATUS_FLASHDEN 0xC000 63 64#define BCSR_SWITCHES_DIP 0x00FF 65#define BCSR_SWITCHES_DIP_1 0x0080 66#define BCSR_SWITCHES_DIP_2 0x0040 67#define BCSR_SWITCHES_DIP_3 0x0020 68#define BCSR_SWITCHES_DIP_4 0x0010 69#define BCSR_SWITCHES_DIP_5 0x0008 70#define BCSR_SWITCHES_DIP_6 0x0004 71#define BCSR_SWITCHES_DIP_7 0x0002 72#define BCSR_SWITCHES_DIP_8 0x0001 73#define BCSR_SWITCHES_ROTARY 0x0F00 74 75#define BCSR_RESETS_PHY0 0x0001 76#define BCSR_RESETS_PHY1 0x0002 77#define BCSR_RESETS_DC 0x0004 78 79#define BCSR_PCMCIA_PC0VPP 0x0003 80#define BCSR_PCMCIA_PC0VCC 0x000C 81#define BCSR_PCMCIA_PC0DRVEN 0x0010 82#define BCSR_PCMCIA_PC0RST 0x0080 83#define BCSR_PCMCIA_PC1VPP 0x0300 84#define BCSR_PCMCIA_PC1VCC 0x0C00 85#define BCSR_PCMCIA_PC1DRVEN 0x1000 86#define BCSR_PCMCIA_PC1RST 0x8000 87 88#define BCSR_BOARD_PCIM66EN 0x0001 89#define BCSR_BOARD_PCIM33 0x0100 90#define BCSR_BOARD_GPIO200RST 0x0400 91#define BCSR_BOARD_PCICFG 0x1000 92 93#define BCSR_LEDS_DECIMALS 0x0003 94#define BCSR_LEDS_LED0 0x0100 95#define BCSR_LEDS_LED1 0x0200 96#define BCSR_LEDS_LED2 0x0400 97#define BCSR_LEDS_LED3 0x0800 98 99#define BCSR_SWRESET_RESET 0x0080 100 101/* PCMCIA Db1x00 specific defines */ 102#define PCMCIA_MAX_SOCK 1 103#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) 104 105/* VPP/VCC */ 106#define SET_VCC_VPP(VCC, VPP, SLOT)\ 107 ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8)) 108 109#endif /* __ASM_DB1X00_H */ 110