1#ifndef __ARCH_M68K_ATOMIC__ 2#define __ARCH_M68K_ATOMIC__ 3 4/* 5 * Atomic operations that C can't guarantee us. Useful for 6 * resource counting etc.. 7 */ 8 9/* 10 * We do not have SMP m68k systems, so we don't have to deal with that. 11 */ 12 13typedef struct { int counter; } atomic_t; 14#define ATOMIC_INIT(i) { (i) } 15 16#define atomic_read(v) ((v)->counter) 17#define atomic_set(v, i) (((v)->counter) = i) 18 19static __inline__ void atomic_add(int i, atomic_t *v) 20{ 21 __asm__ __volatile__("addl %1,%0" : "=m" (*v) : "id" (i), "0" (*v)); 22} 23 24static __inline__ void atomic_sub(int i, atomic_t *v) 25{ 26 __asm__ __volatile__("subl %1,%0" : "=m" (*v) : "id" (i), "0" (*v)); 27} 28 29static __inline__ void atomic_inc(volatile atomic_t *v) 30{ 31 __asm__ __volatile__("addql #1,%0" : "=m" (*v): "0" (*v)); 32} 33 34static __inline__ void atomic_dec(volatile atomic_t *v) 35{ 36 __asm__ __volatile__("subql #1,%0" : "=m" (*v): "0" (*v)); 37} 38 39static __inline__ int atomic_dec_and_test(volatile atomic_t *v) 40{ 41 char c; 42 __asm__ __volatile__("subql #1,%1; seq %0" : "=d" (c), "=m" (*v): "1" (*v)); 43 return c != 0; 44} 45 46#define atomic_clear_mask(mask, v) \ 47 __asm__ __volatile__("andl %1,%0" : "=m" (*v) : "id" (~(mask)),"0"(*v)) 48 49#define atomic_set_mask(mask, v) \ 50 __asm__ __volatile__("orl %1,%0" : "=m" (*v) : "id" (mask),"0"(*v)) 51 52/* Atomic operations are already serializing */ 53#define smp_mb__before_atomic_dec() barrier() 54#define smp_mb__after_atomic_dec() barrier() 55#define smp_mb__before_atomic_inc() barrier() 56#define smp_mb__after_atomic_inc() barrier() 57 58#endif /* __ARCH_M68K_ATOMIC __ */ 59