1 2/* $Id: router.h,v 1.1.1.1 2008/10/15 03:29:03 james26_jang Exp $ 3 * 4 * This file is subject to the terms and conditions of the GNU General Public 5 * License. See the file "COPYING" in the main directory of this archive 6 * for more details. 7 * 8 * Copyright (C) 1992 - 1997, 2000-2002 Silicon Graphics, Inc. All rights reserved. 9 */ 10 11#ifndef _ASM_IA64_SN_ROUTER_H 12#define _ASM_IA64_SN_ROUTER_H 13 14/* 15 * Router Register definitions 16 * 17 * Macro argument _L always stands for a link number (1 to 8, inclusive). 18 */ 19 20#ifndef __ASSEMBLY__ 21 22#include <linux/devfs_fs_kernel.h> 23#include <asm/sn/vector.h> 24#include <asm/sn/slotnum.h> 25#include <asm/sn/arch.h> 26 27typedef uint64_t router_reg_t; 28 29#define MAX_ROUTERS 64 30 31#define MAX_ROUTER_PATH 80 32 33#define ROUTER_REG_CAST (volatile router_reg_t *) 34#define PS_UINT_CAST (__psunsigned_t) 35#define UINT64_CAST (uint64_t) 36typedef signed char port_no_t; /* Type for router port number */ 37 38#else 39 40#define ROUTERREG_CAST 41#define PS_UINT_CAST 42#define UINT64_CAST 43 44#endif /* __ASSEMBLY__ */ 45 46#define MAX_ROUTER_PORTS (8) /* Max. number of ports on a router */ 47 48#define ALL_PORTS ((1 << MAX_ROUTER_PORTS) - 1) /* for 0 based references */ 49 50#define PORT_INVALID (-1) /* Invalid port number */ 51 52#define IS_META(_rp) ((_rp)->flags & PCFG_ROUTER_META) 53 54#define IS_REPEATER(_rp)((_rp)->flags & PCFG_ROUTER_REPEATER) 55 56/* 57 * RR_TURN makes a given number of clockwise turns (0 to 7) from an inport 58 * port to generate an output port. 59 * 60 * RR_DISTANCE returns the number of turns necessary (0 to 7) to go from 61 * an input port (_L1 = 1 to 8) to an output port ( _L2 = 1 to 8). 62 * 63 * These are written to work on unsigned data. 64 */ 65 66#define RR_TURN(_L, count) ((_L) + (count) > MAX_ROUTER_PORTS ? \ 67 (_L) + (count) - MAX_ROUTER_PORTS : \ 68 (_L) + (count)) 69 70#define RR_DISTANCE(_LS, _LD) ((_LD) >= (_LS) ? \ 71 (_LD) - (_LS) : \ 72 (_LD) + MAX_ROUTER_PORTS - (_LS)) 73 74/* Router register addresses */ 75 76#define RR_STATUS_REV_ID 0x00000 /* Status register and Revision ID */ 77#define RR_PORT_RESET 0x00008 /* Multiple port reset */ 78#define RR_PROT_CONF 0x00010 /* Inter-partition protection conf. */ 79#define RR_GLOBAL_PORT_DEF 0x00018 /* Global Port definitions */ 80#define RR_GLOBAL_PARMS0 0x00020 /* Parameters shared by all 8 ports */ 81#define RR_GLOBAL_PARMS1 0x00028 /* Parameters shared by all 8 ports */ 82#define RR_DIAG_PARMS 0x00030 /* Parameters for diag. testing */ 83#define RR_DEBUG_ADDR 0x00038 /* Debug address select - debug port*/ 84#define RR_LB_TO_L2 0x00040 /* Local Block to L2 cntrl intf reg */ 85#define RR_L2_TO_LB 0x00048 /* L2 cntrl intf to Local Block reg */ 86#define RR_JBUS_CONTROL 0x00050 /* read/write timing for JBUS intf */ 87 88#define RR_SCRATCH_REG0 0x00100 /* Scratch 0 is 64 bits */ 89#define RR_SCRATCH_REG1 0x00108 /* Scratch 1 is 64 bits */ 90#define RR_SCRATCH_REG2 0x00110 /* Scratch 2 is 64 bits */ 91#define RR_SCRATCH_REG3 0x00118 /* Scratch 3 is 1 bit */ 92#define RR_SCRATCH_REG4 0x00120 /* Scratch 4 is 1 bit */ 93 94#define RR_JBUS0(_D) (((_D) & 0x7) << 3 | 0x00200) /* JBUS0 addresses */ 95#define RR_JBUS1(_D) (((_D) & 0x7) << 3 | 0x00240) /* JBUS1 addresses */ 96 97#define RR_SCRATCH_REG0_WZ 0x00500 /* Scratch 0 is 64 bits */ 98#define RR_SCRATCH_REG1_WZ 0x00508 /* Scratch 1 is 64 bits */ 99#define RR_SCRATCH_REG2_WZ 0x00510 /* Scratch 2 is 64 bits */ 100#define RR_SCRATCH_REG3_SZ 0x00518 /* Scratch 3 is 1 bit */ 101#define RR_SCRATCH_REG4_SZ 0x00520 /* Scratch 4 is 1 bit */ 102 103#define RR_VECTOR_HW_BAR(context) (0x08000 | (context)<<3) /* barrier config registers */ 104/* Port-specific registers (_L is the link number from 1 to 8) */ 105 106#define RR_PORT_PARMS(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0000) /* LLP parameters */ 107#define RR_STATUS_ERROR(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0008) /* Port-related errs */ 108#define RR_CHANNEL_TEST(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0010) /* Port LLP chan test */ 109#define RR_RESET_MASK(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0018) /* Remote reset mask */ 110#define RR_HISTOGRAM0(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0020) /* Port usage histgrm */ 111#define RR_HISTOGRAM1(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0028) /* Port usage histgrm */ 112#define RR_HISTOGRAM0_WC(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0030) /* Port usage histgrm */ 113#define RR_HISTOGRAM1_WC(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0038) /* Port usage histgrm */ 114#define RR_ERROR_CLEAR(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0088) /* Read/clear errors */ 115#define RR_GLOBAL_TABLE0(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0100) /* starting address of global table for this port */ 116#define RR_GLOBAL_TABLE(_L, _x) (RR_GLOBAL_TABLE0(_L) + ((_x) << 3)) 117#define RR_LOCAL_TABLE0(_L) (((_L+1) & 0xe) << 15 | ((_L+1) & 0x1) << 11 | 0x0200) /* starting address of local table for this port */ 118#define RR_LOCAL_TABLE(_L, _x) (RR_LOCAL_TABLE0(_L) + ((_x) << 3)) 119 120#define RR_META_ENTRIES 16 121 122#define RR_LOCAL_ENTRIES 128 123 124/* 125 * RR_STATUS_REV_ID mask and shift definitions 126 */ 127 128#define RSRI_INPORT_SHFT 52 129#define RSRI_INPORT_MASK (UINT64_CAST 0xf << 52) 130#define RSRI_LINKWORKING_BIT(_L) (35 + 2 * (_L)) 131#define RSRI_LINKWORKING(_L) (UINT64_CAST 1 << (35 + 2 * (_L))) 132#define RSRI_LINKRESETFAIL(_L) (UINT64_CAST 1 << (34 + 2 * (_L))) 133#define RSRI_LSTAT_SHFT(_L) (34 + 2 * (_L)) 134#define RSRI_LSTAT_MASK(_L) (UINT64_CAST 0x3 << 34 + 2 * (_L)) 135#define RSRI_LOCALSBERROR (UINT64_CAST 1 << 35) 136#define RSRI_LOCALSTUCK (UINT64_CAST 1 << 34) 137#define RSRI_LOCALBADVEC (UINT64_CAST 1 << 33) 138#define RSRI_LOCALTAILERR (UINT64_CAST 1 << 32) 139#define RSRI_LOCAL_SHFT 32 140#define RSRI_LOCAL_MASK (UINT64_CAST 0xf << 32) 141#define RSRI_CHIPREV_SHFT 28 142#define RSRI_CHIPREV_MASK (UINT64_CAST 0xf << 28) 143#define RSRI_CHIPID_SHFT 12 144#define RSRI_CHIPID_MASK (UINT64_CAST 0xffff << 12) 145#define RSRI_MFGID_SHFT 1 146#define RSRI_MFGID_MASK (UINT64_CAST 0x7ff << 1) 147 148#define RSRI_LSTAT_WENTDOWN 0 149#define RSRI_LSTAT_RESETFAIL 1 150#define RSRI_LSTAT_LINKUP 2 151#define RSRI_LSTAT_NOTUSED 3 152 153/* 154 * RR_PORT_RESET mask definitions 155 */ 156 157#define RPRESET_WARM (UINT64_CAST 1 << 9) 158#define RPRESET_LINK(_L) (UINT64_CAST 1 << (_L)) 159#define RPRESET_LOCAL (UINT64_CAST 1) 160 161/* 162 * RR_PROT_CONF mask and shift definitions 163 */ 164 165#define RPCONF_DIRCMPDIS_SHFT 13 166#define RPCONF_DIRCMPDIS_MASK (UINT64_CAST 1 << 13) 167#define RPCONF_FORCELOCAL (UINT64_CAST 1 << 12) 168#define RPCONF_FLOCAL_SHFT 12 169#define RPCONF_METAID_SHFT 8 170#define RPCONF_METAID_MASK (UINT64_CAST 0xf << 8) 171#define RPCONF_RESETOK(_L) (UINT64_CAST 1 << ((_L) - 1)) 172 173/* 174 * RR_GLOBAL_PORT_DEF mask and shift definitions 175 */ 176 177#define RGPD_MGLBLNHBR_ID_SHFT 12 /* -global neighbor ID */ 178#define RGPD_MGLBLNHBR_ID_MASK (UINT64_CAST 0xf << 12) 179#define RGPD_MGLBLNHBR_VLD_SHFT 11 /* -global neighbor Valid */ 180#define RGPD_MGLBLNHBR_VLD_MASK (UINT64_CAST 0x1 << 11) 181#define RGPD_MGLBLPORT_SHFT 8 /* -global neighbor Port */ 182#define RGPD_MGLBLPORT_MASK (UINT64_CAST 0x7 << 8) 183#define RGPD_PGLBLNHBR_ID_SHFT 4 /* +global neighbor ID */ 184#define RGPD_PGLBLNHBR_ID_MASK (UINT64_CAST 0xf << 4) 185#define RGPD_PGLBLNHBR_VLD_SHFT 3 /* +global neighbor Valid */ 186#define RGPD_PGLBLNHBR_VLD_MASK (UINT64_CAST 0x1 << 3) 187#define RGPD_PGLBLPORT_SHFT 0 /* +global neighbor Port */ 188#define RGPD_PGLBLPORT_MASK (UINT64_CAST 0x7 << 0) 189 190#define GLBL_PARMS_REGS 2 /* Two Global Parms registers */ 191 192/* 193 * RR_GLOBAL_PARMS0 mask and shift definitions 194 */ 195 196#define RGPARM0_ARB_VALUE_SHFT 54 /* Local Block Arbitration State */ 197#define RGPARM0_ARB_VALUE_MASK (UINT64_CAST 0x7 << 54) 198#define RGPARM0_ROTATEARB_SHFT 53 /* Rotate Local Block Arbitration */ 199#define RGPARM0_ROTATEARB_MASK (UINT64_CAST 0x1 << 53) 200#define RGPARM0_FAIREN_SHFT 52 /* Fairness logic Enable */ 201#define RGPARM0_FAIREN_MASK (UINT64_CAST 0x1 << 52) 202#define RGPARM0_LOCGNTTO_SHFT 40 /* Local grant timeout */ 203#define RGPARM0_LOCGNTTO_MASK (UINT64_CAST 0xfff << 40) 204#define RGPARM0_DATELINE_SHFT 38 /* Dateline crossing router */ 205#define RGPARM0_DATELINE_MASK (UINT64_CAST 0x1 << 38) 206#define RGPARM0_MAXRETRY_SHFT 28 /* Max retry count */ 207#define RGPARM0_MAXRETRY_MASK (UINT64_CAST 0x3ff << 28) 208#define RGPARM0_URGWRAP_SHFT 20 /* Urgent wrap */ 209#define RGPARM0_URGWRAP_MASK (UINT64_CAST 0xff << 20) 210#define RGPARM0_DEADLKTO_SHFT 16 /* Deadlock timeout */ 211#define RGPARM0_DEADLKTO_MASK (UINT64_CAST 0xf << 16) 212#define RGPARM0_URGVAL_SHFT 12 /* Urgent value */ 213#define RGPARM0_URGVAL_MASK (UINT64_CAST 0xf << 12) 214#define RGPARM0_VCHSELEN_SHFT 11 /* VCH_SEL_EN */ 215#define RGPARM0_VCHSELEN_MASK (UINT64_CAST 0x1 << 11) 216#define RGPARM0_LOCURGTO_SHFT 9 /* Local urgent timeout */ 217#define RGPARM0_LOCURGTO_MASK (UINT64_CAST 0x3 << 9) 218#define RGPARM0_TAILVAL_SHFT 5 /* Tail value */ 219#define RGPARM0_TAILVAL_MASK (UINT64_CAST 0xf << 5) 220#define RGPARM0_CLOCK_SHFT 1 /* Global clock select */ 221#define RGPARM0_CLOCK_MASK (UINT64_CAST 0xf << 1) 222#define RGPARM0_BYPEN_SHFT 0 223#define RGPARM0_BYPEN_MASK (UINT64_CAST 1) /* Bypass enable */ 224 225/* 226 * RR_GLOBAL_PARMS1 shift and mask definitions 227 */ 228 229#define RGPARM1_TTOWRAP_SHFT 12 /* Tail timeout wrap */ 230#define RGPARM1_TTOWRAP_MASK (UINT64_CAST 0xfffff << 12) 231#define RGPARM1_AGERATE_SHFT 8 /* Age rate */ 232#define RGPARM1_AGERATE_MASK (UINT64_CAST 0xf << 8) 233#define RGPARM1_JSWSTAT_SHFT 0 /* JTAG Sw Register bits */ 234#define RGPARM1_JSWSTAT_MASK (UINT64_CAST 0xff << 0) 235 236/* 237 * RR_DIAG_PARMS mask and shift definitions 238 */ 239 240#define RDPARM_ABSHISTOGRAM (UINT64_CAST 1 << 17) /* Absolute histgrm */ 241#define RDPARM_DEADLOCKRESET (UINT64_CAST 1 << 16) /* Reset on deadlck */ 242#define RDPARM_DISABLE(_L) (UINT64_CAST 1 << ((_L) + 7)) 243#define RDPARM_SENDERROR(_L) (UINT64_CAST 1 << ((_L) - 1)) 244 245/* 246 * RR_DEBUG_ADDR mask and shift definitions 247 */ 248 249#define RDA_DATA_SHFT 10 /* Observed debug data */ 250#define RDA_DATA_MASK (UINT64_CAST 0xffff << 10) 251#define RDA_ADDR_SHFT 0 /* debug address for data */ 252#define RDA_ADDR_MASK (UINT64_CAST 0x3ff << 0) 253 254/* 255 * RR_LB_TO_L2 mask and shift definitions 256 */ 257 258#define RLBTOL2_DATA_VLD_SHFT 32 /* data is valid for JTAG controller */ 259#define RLBTOL2_DATA_VLD_MASK (UINT64_CAST 0x1 << 32) 260#define RLBTOL2_DATA_SHFT 0 /* data bits for JTAG controller */ 261#define RLBTOL2_DATA_MASK (UINT64_CAST 0xffffffff) 262 263/* 264 * RR_L2_TO_LB mask and shift definitions 265 */ 266 267#define RL2TOLB_DATA_VLD_SHFT 33 /* data is valid from JTAG controller */ 268#define RL2TOLB_DATA_VLD_MASK (UINT64_CAST 0x1 << 33) 269#define RL2TOLB_PARITY_SHFT 32 /* sw implemented parity for data */ 270#define RL2TOLB_PARITY_MASK (UINT64_CAST 0x1 << 32) 271#define RL2TOLB_DATA_SHFT 0 /* data bits from JTAG controller */ 272#define RL2TOLB_DATA_MASK (UINT64_CAST 0xffffffff) 273 274/* 275 * RR_JBUS_CONTROL mask and shift definitions 276 */ 277 278#define RJC_POS_BITS_SHFT 20 /* Router position bits */ 279#define RJC_POS_BITS_MASK (UINT64_CAST 0xf << 20) 280#define RJC_RD_DATA_STROBE_SHFT 16 /* count when read data is strobed in */ 281#define RJC_RD_DATA_STROBE_MASK (UINT64_CAST 0xf << 16) 282#define RJC_WE_OE_HOLD_SHFT 8 /* time OE or WE is held */ 283#define RJC_WE_OE_HOLD_MASK (UINT64_CAST 0xff << 8) 284#define RJC_ADDR_SET_HLD_SHFT 0 /* time address driven around OE/WE */ 285#define RJC_ADDR_SET_HLD_MASK (UINT64_CAST 0xff) 286 287/* 288 * RR_SCRATCH_REGx mask and shift definitions 289 * note: these fields represent a software convention, and are not 290 * understood/interpreted by the hardware. 291 */ 292 293#define RSCR0_BOOTED_SHFT 63 294#define RSCR0_BOOTED_MASK (UINT64_CAST 0x1 << RSCR0_BOOTED_SHFT) 295#define RSCR0_LOCALID_SHFT 56 296#define RSCR0_LOCALID_MASK (UINT64_CAST 0x7f << RSCR0_LOCALID_SHFT) 297#define RSCR0_UNUSED_SHFT 48 298#define RSCR0_UNUSED_MASK (UINT64_CAST 0xff << RSCR0_UNUSED_SHFT) 299#define RSCR0_NIC_SHFT 0 300#define RSCR0_NIC_MASK (UINT64_CAST 0xffffffffffff) 301 302#define RSCR1_MODID_SHFT 0 303#define RSCR1_MODID_MASK (UINT64_CAST 0xffff) 304 305/* 306 * RR_VECTOR_HW_BAR mask and shift definitions 307 */ 308 309#define BAR_TX_SHFT 27 /* Barrier in trans(m)it when read */ 310#define BAR_TX_MASK (UINT64_CAST 1 << BAR_TX_SHFT) 311#define BAR_VLD_SHFT 26 /* Valid Configuration */ 312#define BAR_VLD_MASK (UINT64_CAST 1 << BAR_VLD_SHFT) 313#define BAR_SEQ_SHFT 24 /* Sequence number */ 314#define BAR_SEQ_MASK (UINT64_CAST 3 << BAR_SEQ_SHFT) 315#define BAR_LEAFSTATE_SHFT 18 /* Leaf State */ 316#define BAR_LEAFSTATE_MASK (UINT64_CAST 0x3f << BAR_LEAFSTATE_SHFT) 317#define BAR_PARENT_SHFT 14 /* Parent Port */ 318#define BAR_PARENT_MASK (UINT64_CAST 0xf << BAR_PARENT_SHFT) 319#define BAR_CHILDREN_SHFT 6 /* Child Select port bits */ 320#define BAR_CHILDREN_MASK (UINT64_CAST 0xff << BAR_CHILDREN_SHFT) 321#define BAR_LEAFCOUNT_SHFT 0 /* Leaf Count to trigger parent */ 322#define BAR_LEAFCOUNT_MASK (UINT64_CAST 0x3f) 323 324/* 325 * RR_PORT_PARMS(_L) mask and shift definitions 326 */ 327 328#define RPPARM_MIPRESETEN_SHFT 29 /* Message In Progress reset enable */ 329#define RPPARM_MIPRESETEN_MASK (UINT64_CAST 0x1 << 29) 330#define RPPARM_UBAREN_SHFT 28 /* Enable user barrier requests */ 331#define RPPARM_UBAREN_MASK (UINT64_CAST 0x1 << 28) 332#define RPPARM_OUTPDTO_SHFT 24 /* Output Port Deadlock TO value */ 333#define RPPARM_OUTPDTO_MASK (UINT64_CAST 0xf << 24) 334#define RPPARM_PORTMATE_SHFT 21 /* Port Mate for the port */ 335#define RPPARM_PORTMATE_MASK (UINT64_CAST 0x7 << 21) 336#define RPPARM_HISTEN_SHFT 20 /* Histogram counter enable */ 337#define RPPARM_HISTEN_MASK (UINT64_CAST 0x1 << 20) 338#define RPPARM_HISTSEL_SHFT 18 339#define RPPARM_HISTSEL_MASK (UINT64_CAST 0x3 << 18) 340#define RPPARM_DAMQHS_SHFT 16 341#define RPPARM_DAMQHS_MASK (UINT64_CAST 0x3 << 16) 342#define RPPARM_NULLTO_SHFT 10 343#define RPPARM_NULLTO_MASK (UINT64_CAST 0x3f << 10) 344#define RPPARM_MAXBURST_SHFT 0 345#define RPPARM_MAXBURST_MASK (UINT64_CAST 0x3ff) 346 347/* 348 * NOTE: Normally the kernel tracks only UTILIZATION statistics. 349 * The other 2 should not be used, except during any experimentation 350 * with the router. 351 */ 352#define RPPARM_HISTSEL_AGE 0 /* Histogram age characterization. */ 353#define RPPARM_HISTSEL_UTIL 1 /* Histogram link utilization */ 354#define RPPARM_HISTSEL_DAMQ 2 /* Histogram DAMQ characterization. */ 355 356/* 357 * RR_STATUS_ERROR(_L) and RR_ERROR_CLEAR(_L) mask and shift definitions 358 */ 359#define RSERR_POWERNOK (UINT64_CAST 1 << 38) 360#define RSERR_PORT_DEADLOCK (UINT64_CAST 1 << 37) 361#define RSERR_WARMRESET (UINT64_CAST 1 << 36) 362#define RSERR_LINKRESET (UINT64_CAST 1 << 35) 363#define RSERR_RETRYTIMEOUT (UINT64_CAST 1 << 34) 364#define RSERR_FIFOOVERFLOW (UINT64_CAST 1 << 33) 365#define RSERR_ILLEGALPORT (UINT64_CAST 1 << 32) 366#define RSERR_DEADLOCKTO_SHFT 28 367#define RSERR_DEADLOCKTO_MASK (UINT64_CAST 0xf << 28) 368#define RSERR_RECVTAILTO_SHFT 24 369#define RSERR_RECVTAILTO_MASK (UINT64_CAST 0xf << 24) 370#define RSERR_RETRYCNT_SHFT 16 371#define RSERR_RETRYCNT_MASK (UINT64_CAST 0xff << 16) 372#define RSERR_CBERRCNT_SHFT 8 373#define RSERR_CBERRCNT_MASK (UINT64_CAST 0xff << 8) 374#define RSERR_SNERRCNT_SHFT 0 375#define RSERR_SNERRCNT_MASK (UINT64_CAST 0xff << 0) 376 377 378#define PORT_STATUS_UP (1 << 0) /* Router link up */ 379#define PORT_STATUS_FENCE (1 << 1) /* Router link fenced */ 380#define PORT_STATUS_RESETFAIL (1 << 2) /* Router link didnot 381 * come out of reset */ 382#define PORT_STATUS_DISCFAIL (1 << 3) /* Router link failed after 383 * out of reset but before 384 * router tables were 385 * programmed 386 */ 387#define PORT_STATUS_KERNFAIL (1 << 4) /* Router link failed 388 * after reset and the 389 * router tables were 390 * programmed 391 */ 392#define PORT_STATUS_UNDEF (1 << 5) /* Unable to pinpoint 393 * why the router link 394 * went down 395 */ 396#define PROBE_RESULT_BAD (-1) /* Set if any of the router 397 * links failed after reset 398 */ 399#define PROBE_RESULT_GOOD (0) /* Set if all the router links 400 * which came out of reset 401 * are up 402 */ 403 404/* Should be enough for 256 CPUs */ 405#define MAX_RTR_BREADTH 64 /* Max # of routers possible */ 406 407/* Get the require set of bits in a var. corr to a sequence of bits */ 408#define GET_FIELD(var, fname) \ 409 ((var) >> fname##_SHFT & fname##_MASK >> fname##_SHFT) 410/* Set the require set of bits in a var. corr to a sequence of bits */ 411#define SET_FIELD(var, fname, fval) \ 412 ((var) = (var) & ~fname##_MASK | (uint64_t) (fval) << fname##_SHFT) 413 414 415#ifndef __ASSEMBLY__ 416 417typedef struct router_map_ent_s { 418 uint64_t nic; 419 moduleid_t module; 420 slotid_t slot; 421} router_map_ent_t; 422 423struct rr_status_error_fmt { 424 uint64_t rserr_unused : 30, 425 rserr_fifooverflow : 1, 426 rserr_illegalport : 1, 427 rserr_deadlockto : 4, 428 rserr_recvtailto : 4, 429 rserr_retrycnt : 8, 430 rserr_cberrcnt : 8, 431 rserr_snerrcnt : 8; 432}; 433 434/* 435 * This type is used to store "absolute" counts of router events 436 */ 437typedef int router_count_t; 438 439/* All utilizations are on a scale from 0 - 1023. */ 440#define RP_BYPASS_UTIL 0 441#define RP_RCV_UTIL 1 442#define RP_SEND_UTIL 2 443#define RP_TOTAL_PKTS 3 /* Free running clock/packet counter */ 444 445#define RP_NUM_UTILS 3 446 447#define RP_HIST_REGS 2 448#define RP_NUM_BUCKETS 4 449#define RP_HIST_TYPES 3 450 451#define RP_AGE0 0 452#define RP_AGE1 1 453#define RP_AGE2 2 454#define RP_AGE3 3 455 456 457#define RR_UTIL_SCALE 1024 458 459/* 460 * Router port-oriented information 461 */ 462typedef struct router_port_info_s { 463 router_reg_t rp_histograms[RP_HIST_REGS];/* Port usage info */ 464 router_reg_t rp_port_error; /* Port error info */ 465 router_count_t rp_retry_errors; /* Total retry errors */ 466 router_count_t rp_sn_errors; /* Total sn errors */ 467 router_count_t rp_cb_errors; /* Total cb errors */ 468 int rp_overflows; /* Total count overflows */ 469 int rp_excess_err; /* Port has excessive errors */ 470 ushort rp_util[RP_NUM_BUCKETS];/* Port utilization */ 471} router_port_info_t; 472 473#define ROUTER_INFO_VERSION 7 474 475struct lboard_s; 476 477/* 478 * Router information 479 */ 480typedef struct router_info_s { 481 char ri_version; /* structure version */ 482 cnodeid_t ri_cnode; /* cnode of its legal guardian hub */ 483 nasid_t ri_nasid; /* Nasid of same */ 484 char ri_ledcache; /* Last LED bitmap */ 485 char ri_leds; /* Current LED bitmap */ 486 char ri_portmask; /* Active port bitmap */ 487 router_reg_t ri_stat_rev_id; /* Status rev ID value */ 488 net_vec_t ri_vector; /* vector from guardian to router */ 489 int ri_writeid; /* router's vector write ID */ 490 int64_t ri_timebase; /* Time of first sample */ 491 int64_t ri_timestamp; /* Time of last sample */ 492 router_port_info_t ri_port[MAX_ROUTER_PORTS]; /* per port info */ 493 moduleid_t ri_module; /* Which module are we in? */ 494 slotid_t ri_slotnum; /* Which slot are we in? */ 495 router_reg_t ri_glbl_parms[GLBL_PARMS_REGS]; 496 /* Global parms0&1 register contents*/ 497 devfs_handle_t ri_vertex; /* hardware graph vertex */ 498 router_reg_t ri_prot_conf; /* protection config. register */ 499 int64_t ri_per_minute; /* Ticks per minute */ 500 501 /* 502 * Everything below here is for kernel use only and may change at 503 * at any time with or without a change in teh revision number 504 * 505 * Any pointers or things that come and go with DEBUG must go at 506 * the bottom of the structure, below the user stuff. 507 */ 508 char ri_hist_type; /* histogram type */ 509 devfs_handle_t ri_guardian; /* guardian node for the router */ 510 int64_t ri_last_print; /* When did we last print */ 511 char ri_print; /* Should we print */ 512 char ri_just_blink; /* Should we blink the LEDs */ 513 514#ifdef DEBUG 515 int64_t ri_deltatime; /* Time it took to sample */ 516#endif 517 spinlock_t ri_lock; /* Lock for access to router info */ 518 net_vec_t *ri_vecarray; /* Pointer to array of vectors */ 519 struct lboard_s *ri_brd; /* Pointer to board structure */ 520 char * ri_name; /* This board's hwg path */ 521 unsigned char ri_port_maint[MAX_ROUTER_PORTS]; /* should we send a 522 message to availmon */ 523} router_info_t; 524 525 526/* Router info location specifiers */ 527 528#define RIP_PROMLOG 2 /* Router info in promlog */ 529#define RIP_CONSOLE 4 /* Router info on console */ 530 531#define ROUTER_INFO_PRINT(_rip,_where) (_rip->ri_print |= _where) 532 /* Set the field used to check if a 533 * router info can be printed 534 */ 535#define IS_ROUTER_INFO_PRINTED(_rip,_where) \ 536 (_rip->ri_print & _where) 537 /* Was the router info printed to 538 * the given location (_where) ? 539 * Mainly used to prevent duplicate 540 * router error states. 541 */ 542#define ROUTER_INFO_LOCK(_rip,_s) _s = mutex_spinlock(&(_rip->ri_lock)) 543 /* Take the lock on router info 544 * to gain exclusive access 545 */ 546#define ROUTER_INFO_UNLOCK(_rip,_s) mutex_spinunlock(&(_rip->ri_lock),_s) 547 /* Release the lock on router info */ 548/* 549 * Router info hanging in the nodepda 550 */ 551typedef struct nodepda_router_info_s { 552 devfs_handle_t router_vhdl; /* vertex handle of the router */ 553 short router_port; /* port thru which we entered */ 554 short router_portmask; 555 moduleid_t router_module; /* module in which router is there */ 556 slotid_t router_slot; /* router slot */ 557 unsigned char router_type; /* kind of router */ 558 net_vec_t router_vector; /* vector from the guardian node */ 559 560 router_info_t *router_infop; /* info hanging off the hwg vertex */ 561 struct nodepda_router_info_s *router_next; 562 /* pointer to next element */ 563} nodepda_router_info_t; 564 565#define ROUTER_NAME_SIZE 20 /* Max size of a router name */ 566 567#define NORMAL_ROUTER_NAME "normal_router" 568#define NULL_ROUTER_NAME "null_router" 569#define META_ROUTER_NAME "meta_router" 570#define REPEATER_ROUTER_NAME "repeater_router" 571#define UNKNOWN_ROUTER_NAME "unknown_router" 572 573/* The following definitions are needed by the router traversing 574 * code either using the hardware graph or using vector operations. 575 */ 576/* Structure of the router queue element */ 577typedef struct router_elt_s { 578 union { 579 /* queue element structure during router probing */ 580 struct { 581 /* number-in-a-can (unique) for the router */ 582 nic_t nic; 583 /* vector route from the master hub to 584 * this router. 585 */ 586 net_vec_t vec; 587 /* port status */ 588 uint64_t status; 589 char port_status[MAX_ROUTER_PORTS + 1]; 590 } r_elt; 591 /* queue element structure during router guardian 592 * assignment 593 */ 594 struct { 595 /* vertex handle for the router */ 596 devfs_handle_t vhdl; 597 /* guardian for this router */ 598 devfs_handle_t guard; 599 /* vector router from the guardian to the router */ 600 net_vec_t vec; 601 } k_elt; 602 } u; 603 /* easy to use port status interpretation */ 604} router_elt_t; 605 606/* structure of the router queue */ 607 608typedef struct router_queue_s { 609 char head; /* Point where a queue element is inserted */ 610 char tail; /* Point where a queue element is removed */ 611 int type; 612 router_elt_t array[MAX_RTR_BREADTH]; 613 /* Entries for queue elements */ 614} router_queue_t; 615 616 617#endif /* __ASSEMBLY__ */ 618 619/* 620 * RR_HISTOGRAM(_L) mask and shift definitions 621 * There are two 64 bit histogram registers, so the following macros take 622 * into account dealing with an array of 4 32 bit values indexed by _x 623 */ 624 625#define RHIST_BUCKET_SHFT(_x) (32 * ((_x) & 0x1)) 626#define RHIST_BUCKET_MASK(_x) (UINT64_CAST 0xffffffff << RHIST_BUCKET_SHFT((_x) & 0x1)) 627#define RHIST_GET_BUCKET(_x, _reg) \ 628 ((RHIST_BUCKET_MASK(_x) & ((_reg)[(_x) >> 1])) >> RHIST_BUCKET_SHFT(_x)) 629 630/* 631 * RR_RESET_MASK(_L) mask and shift definitions 632 */ 633 634#define RRM_RESETOK(_L) (UINT64_CAST 1 << ((_L) - 1)) 635#define RRM_RESETOK_ALL ALL_PORTS 636 637/* 638 * RR_META_TABLE(_x) and RR_LOCAL_TABLE(_x) mask and shift definitions 639 */ 640 641#define RTABLE_SHFT(_L) (4 * ((_L) - 1)) 642#define RTABLE_MASK(_L) (UINT64_CAST 0x7 << RTABLE_SHFT(_L)) 643 644 645#define ROUTERINFO_STKSZ 4096 646 647#ifndef __ASSEMBLY__ 648 649int router_reg_read(router_info_t *rip, int regno, router_reg_t *val); 650int router_reg_write(router_info_t *rip, int regno, router_reg_t val); 651int router_get_info(devfs_handle_t routerv, router_info_t *, int); 652int router_init(cnodeid_t cnode,int writeid, nodepda_router_info_t *npda_rip); 653int router_set_leds(router_info_t *rip); 654void router_print_state(router_info_t *rip, int level, 655 void (*pf)(int, char *, ...),int print_where); 656void capture_router_stats(router_info_t *rip); 657 658 659int probe_routers(void); 660void get_routername(unsigned char brd_type,char *rtrname); 661void router_guardians_set(devfs_handle_t hwgraph_root); 662int router_hist_reselect(router_info_t *, int64_t); 663#endif /* __ASSEMBLY__ */ 664 665#endif /* _ASM_IA64_SN_ROUTER_H */ 666