1/* $Id: eeprom.h,v 1.1.1.1 2008/10/15 03:29:03 james26_jang Exp $ 2 * 3 * This file is subject to the terms and conditions of the GNU General Public 4 * License. See the file "COPYING" in the main directory of this archive 5 * for more details. 6 * 7 * Public interface for reading Atmel EEPROMs via L1 system controllers 8 * 9 * Copyright (C) 1992 - 1997, 2000-2002 Silicon Graphics, Inc. All rights reserved. 10 */ 11#ifndef _ASM_IA64_SN_EEPROM_H 12#define _ASM_IA64_SN_EEPROM_H 13 14#include <asm/sn/sgi.h> 15#include <asm/sn/vector.h> 16#include <asm/sn/xtalk/xbow.h> 17#include <asm/sn/pci/bridge.h> 18#include <asm/sn/nic.h> 19 20/* 21 * The following structures are an implementation of the EEPROM info 22 * areas described in the SN1 EEPROM spec and the IPMI FRU Information 23 * Storage definition 24 */ 25 26/* Maximum lengths for EEPROM fields 27 */ 28#define EEPROM_PARTNUM_LEN 20 29#define EEPROM_SERNUM_LEN 10 30#define EEPROM_MANUF_NAME_LEN 10 31#define EEPROM_PROD_NAME_LEN 14 32 33 34 35/* The EEPROM "common header", which contains offsets to the other 36 * info areas in the EEPROM 37 */ 38typedef struct eeprom_common_hdr_t 39{ 40 uchar_t format; /* common header format byte */ 41 uchar_t internal_use; /* offsets to various info areas */ 42 uchar_t chassis; /* (in doubleword units) */ 43 uchar_t board; 44 uchar_t product; 45 uchar_t multi_record; 46 uchar_t pad; 47 uchar_t checksum; 48} eeprom_common_hdr_t; 49 50 51/* The chassis (brick) info area 52 */ 53typedef struct eeprom_chassis_ia_t 54{ 55 uchar_t format; /* format byte */ 56 uchar_t length; /* info area length in doublewords */ 57 uchar_t type; /* chassis type (always 0x17 "rack mount") */ 58 uchar_t part_num_tl; /* type/length of part number field */ 59 60 char part_num[EEPROM_PARTNUM_LEN]; 61 /* ASCII part number */ 62 63 uchar_t serial_num_tl; /* type/length of serial number field */ 64 65 char serial_num[EEPROM_SERNUM_LEN]; 66 /* ASCII serial number */ 67 68 uchar_t checksum; 69 70} eeprom_chassis_ia_t; 71 72 73/* The board info area 74 */ 75typedef struct eeprom_board_ia_t 76{ 77 uchar_t format; /* format byte */ 78 uchar_t length; /* info area length in doublewords */ 79 uchar_t language; /* language code, always 0x00 "English" */ 80 int mfg_date; /* date & time of manufacture, in minutes 81 since 0:00 1/1/96 */ 82 uchar_t manuf_tl; /* type/length of manufacturer name field */ 83 84 char manuf[EEPROM_MANUF_NAME_LEN]; 85 /* ASCII manufacturer name */ 86 87 uchar_t product_tl; /* type/length of product name field */ 88 89 char product[EEPROM_PROD_NAME_LEN]; 90 /* ASCII product name */ 91 92 uchar_t serial_num_tl; /* type/length of board serial number */ 93 94 char serial_num[EEPROM_SERNUM_LEN]; 95 /* ASCII serial number */ 96 97 uchar_t part_num_tl; /* type/length of board part number */ 98 99 char part_num[EEPROM_PARTNUM_LEN]; 100 /* ASCII part number */ 101 102 /* 103 * "custom" fields -- see SN1 EEPROM Spec 104 */ 105 uchar_t board_rev_tl; /* type/length of board rev (always 0xC2) */ 106 107 char board_rev[2]; /* ASCII board revision */ 108 109 uchar_t eeprom_size_tl; /* type/length of eeprom size field */ 110 uchar_t eeprom_size; /* size code for eeprom */ 111 uchar_t temp_waiver_tl; /* type/length of temp waiver field (0xC2) */ 112 char temp_waiver[2]; /* temp waiver */ 113 114 115 /* 116 * these fields only appear in main boards' EEPROMs 117 */ 118 uchar_t ekey_G_tl; /* type/length of encryption key "G" */ 119 uint32_t ekey_G; /* encryption key "G" */ 120 uchar_t ekey_P_tl; /* type/length of encryption key "P" */ 121 uint32_t ekey_P; /* encryption key "P" */ 122 uchar_t ekey_Y_tl; /* type/length of encryption key "Y" */ 123 uint32_t ekey_Y; /* encryption key "Y" */ 124 125 126 /* 127 * these fields are used for I bricks only 128 */ 129 uchar_t mac_addr_tl; /* type/length of MAC address */ 130 char mac_addr[12]; /* MAC address */ 131 uchar_t ieee1394_cfg_tl; /* type/length of IEEE 1394 info */ 132 uchar_t ieee1394_cfg[32]; /* IEEE 1394 config info */ 133 134 135 /* 136 * all boards have a checksum 137 */ 138 uchar_t checksum; 139 140} eeprom_board_ia_t; 141 142/* given a pointer to the three-byte little-endian EEPROM representation 143 * of date-of-manufacture, this function translates to a big-endian 144 * integer format 145 */ 146int eeprom_xlate_board_mfr_date( uchar_t *src ); 147 148 149/* EEPROM Serial Presence Detect record (used for DIMMs in IP35) 150 */ 151typedef struct eeprom_spd_t 152{ 153 /* 0*/ uchar_t spd_used; /* # of bytes written to serial memory by manufacturer */ 154 /* 1*/ uchar_t spd_size; /* Total # of bytes of SPD memory device */ 155 /* 2*/ uchar_t mem_type; /* Fundamental memory type (FPM, EDO, SDRAM..) */ 156 /* 3*/ uchar_t num_rows; /* # of row addresses on this assembly */ 157 /* 4*/ uchar_t num_cols; /* # Column Addresses on this assembly */ 158 /* 5*/ uchar_t mod_rows; /* # Module Rows on this assembly */ 159 /* 6*/ uchar_t data_width[2]; /* Data Width of this assembly (16b little-endian) */ 160 /* 8*/ uchar_t volt_if; /* Voltage interface standard of this assembly */ 161 /* 9*/ uchar_t cyc_time; /* SDRAM Cycle time, CL=X (highest CAS latency) */ 162 /* A*/ uchar_t acc_time; /* SDRAM Access from Clock (highest CAS latency) */ 163 /* B*/ uchar_t dimm_cfg; /* DIMM Configuration type (non-parity, ECC) */ 164 /* C*/ uchar_t refresh_rt; /* Refresh Rate/Type */ 165 /* D*/ uchar_t prim_width; /* Primary SDRAM Width */ 166 /* E*/ uchar_t ec_width; /* Error Checking SDRAM width */ 167 /* F*/ uchar_t min_delay; /* Min Clock Delay Back to Back Random Col Address */ 168 /*10*/ uchar_t burst_len; /* Burst Lengths Supported */ 169 /*11*/ uchar_t num_banks; /* # of Banks on Each SDRAM Device */ 170 /*12*/ uchar_t cas_latencies; /* CAS# Latencies Supported */ 171 /*13*/ uchar_t cs_latencies; /* CS# Latencies Supported */ 172 /*14*/ uchar_t we_latencies; /* Write Latencies Supported */ 173 /*15*/ uchar_t mod_attrib; /* SDRAM Module Attributes */ 174 /*16*/ uchar_t dev_attrib; /* SDRAM Device Attributes: General */ 175 /*17*/ uchar_t cyc_time2; /* Min SDRAM Cycle time at CL X-1 (2nd highest CAS latency) */ 176 /*18*/ uchar_t acc_time2; /* SDRAM Access from Clock at CL X-1 (2nd highest CAS latency) */ 177 /*19*/ uchar_t cyc_time3; /* Min SDRAM Cycle time at CL X-2 (3rd highest CAS latency) */ 178 /*1A*/ uchar_t acc_time3; /* Max SDRAM Access from Clock at CL X-2 (3nd highest CAS latency) */ 179 /*1B*/ uchar_t min_row_prechg; /* Min Row Precharge Time (Trp) */ 180 /*1C*/ uchar_t min_ra_to_ra; /* Min Row Active to Row Active (Trrd) */ 181 /*1D*/ uchar_t min_ras_to_cas; /* Min RAS to CAS Delay (Trcd) */ 182 /*1E*/ uchar_t min_ras_pulse; /* Minimum RAS Pulse Width (Tras) */ 183 /*1F*/ uchar_t row_density; /* Density of each row on module */ 184 /*20*/ uchar_t ca_setup; /* Command and Address signal input setup time */ 185 /*21*/ uchar_t ca_hold; /* Command and Address signal input hold time */ 186 /*22*/ uchar_t d_setup; /* Data signal input setup time */ 187 /*23*/ uchar_t d_hold; /* Data signal input hold time */ 188 189 /*24*/ uchar_t pad0[26]; /* unused */ 190 191 /*3E*/ uchar_t data_rev; /* SPD Data Revision Code */ 192 /*3F*/ uchar_t checksum; /* Checksum for bytes 0-62 */ 193 /*40*/ uchar_t jedec_id[8]; /* Manufacturer's JEDEC ID code */ 194 195 /*48*/ uchar_t mfg_loc; /* Manufacturing Location */ 196 /*49*/ uchar_t part_num[18]; /* Manufacturer's Part Number */ 197 198 /*5B*/ uchar_t rev_code[2]; /* Revision Code */ 199 200 /*5D*/ uchar_t mfg_date[2]; /* Manufacturing Date */ 201 202 /*5F*/ uchar_t ser_num[4]; /* Assembly Serial Number */ 203 204 /*63*/ uchar_t manuf_data[27]; /* Manufacturer Specific Data */ 205 206 /*7E*/ uchar_t intel_freq; /* Intel specification frequency */ 207 /*7F*/ uchar_t intel_100MHz; /* Intel spec details for 100MHz support */ 208 209} eeprom_spd_t; 210 211 212#define EEPROM_SPD_RECORD_MAXLEN 256 213 214typedef union eeprom_spd_u 215{ 216 eeprom_spd_t fields; 217 char bytes[EEPROM_SPD_RECORD_MAXLEN]; 218 219} eeprom_spd_u; 220 221 222/* EEPROM board record 223 */ 224typedef struct eeprom_brd_record_t 225{ 226 eeprom_chassis_ia_t *chassis_ia; 227 eeprom_board_ia_t *board_ia; 228 eeprom_spd_u *spd; 229 230} eeprom_brd_record_t; 231 232 233/* End-of-fields marker 234 */ 235#define EEPROM_EOF 0xc1 236 237 238/* masks for dissecting the type/length bytes 239 */ 240#define FIELD_FORMAT_MASK 0xc0 241#define FIELD_LENGTH_MASK 0x3f 242 243 244/* field format codes (used in type/length bytes) 245 */ 246#define FIELD_FORMAT_BINARY 0x00 /* binary format */ 247#define FIELD_FORMAT_BCD 0x40 /* BCD */ 248#define FIELD_FORMAT_PACKED 0x80 /* packed 6-bit ASCII */ 249#define FIELD_FORMAT_ASCII 0xC0 /* 8-bit ASCII */ 250 251 252 253 254/* codes specifying brick and board type 255 */ 256#define C_BRICK 0x100 257 258#define C_PIMM (C_BRICK | 0x10) 259#define C_PIMM_0 (C_PIMM) /* | 0x0 */ 260#define C_PIMM_1 (C_PIMM | 0x1) 261 262#define C_DIMM (C_BRICK | 0x20) 263#define C_DIMM_0 (C_DIMM) /* | 0x0 */ 264#define C_DIMM_1 (C_DIMM | 0x1) 265#define C_DIMM_2 (C_DIMM | 0x2) 266#define C_DIMM_3 (C_DIMM | 0x3) 267#define C_DIMM_4 (C_DIMM | 0x4) 268#define C_DIMM_5 (C_DIMM | 0x5) 269#define C_DIMM_6 (C_DIMM | 0x6) 270#define C_DIMM_7 (C_DIMM | 0x7) 271 272#define R_BRICK 0x200 273#define R_POWER (R_BRICK | 0x10) 274 275#define VECTOR 0x300 /* used in vector ops when the destination 276 * could be a cbrick or an rbrick */ 277 278#define IO_BRICK 0x400 279#define IO_POWER (IO_BRICK | 0x10) 280 281#define BRICK_MASK 0xf00 282#define SUBORD_MASK 0xf0 /* AND with component specification; if the 283 the result is non-zero, then the component 284 is a subordinate board of some kind */ 285#define COMPT_MASK 0xf /* if there's more than one instance of a 286 particular type of subordinate board, this 287 masks out which one we're talking about */ 288 289 290 291/* functions & macros for obtaining "NIC-like" strings from EEPROMs 292 */ 293 294int eeprom_str( char *nic_str, nasid_t nasid, int component ); 295int vector_eeprom_str( char *nic_str, nasid_t nasid, 296 int component, net_vec_t path ); 297 298#define CBRICK_EEPROM_STR(s,n) eeprom_str((s),(n),C_BRICK) 299#define IOBRICK_EEPROM_STR(s,n) eeprom_str((s),(n),IO_BRICK) 300#define RBRICK_EEPROM_STR(s,n,p) vector_eeprom_str((s),(n),R_BRICK,p) 301#define VECTOR_EEPROM_STR(s,n,p) vector_eeprom_str((s),(n),VECTOR,p) 302 303 304 305/* functions for obtaining formatted records from EEPROMs 306 */ 307 308int cbrick_eeprom_read( eeprom_brd_record_t *buf, nasid_t nasid, 309 int component ); 310int iobrick_eeprom_read( eeprom_brd_record_t *buf, nasid_t nasid, 311 int component ); 312int vector_eeprom_read( eeprom_brd_record_t *buf, nasid_t nasid, 313 net_vec_t path, int component ); 314 315 316/* functions providing unique id's for duplonet and i/o discovery 317 */ 318 319int cbrick_uid_get( nasid_t nasid, uint64_t *uid ); 320int rbrick_uid_get( nasid_t nasid, net_vec_t path, uint64_t *uid ); 321int iobrick_uid_get( nasid_t nasid, uint64_t *uid ); 322 323 324/* retrieve the ethernet MAC address for an I-brick 325 */ 326 327int ibrick_mac_addr_get( nasid_t nasid, char *eaddr ); 328 329 330/* error codes 331 */ 332 333#define EEP_OK 0 334#define EEP_L1 1 335#define EEP_FAIL 2 336#define EEP_BAD_CHECKSUM 3 337#define EEP_NICIFY 4 338#define EEP_PARAM 6 339#define EEP_NOMEM 7 340 341 342 343/* given a hardware graph vertex and an indication of the brick type, 344 * brick and board to be read, this functions reads the eeprom and 345 * attaches a "NIC"-format string of manufacturing information to the 346 * vertex. If the vertex already has the string, just returns the 347 * string. If component is not VECTOR or R_BRICK, the path parameter 348 * is ignored. 349 */ 350 351#ifdef LATER 352char *eeprom_vertex_info_set( int component, int nasid, devfs_handle_t v, 353 net_vec_t path ); 354#endif 355 356 357 358/* We may need to differentiate between an XBridge and other types of 359 * bridges during discovery to tell whether the bridge in question 360 * is part of an IO brick. The following function reads the WIDGET_ID 361 * register of the bridge under examination and returns a positive value 362 * if the part and mfg numbers stored there indicate that this widget 363 * is an XBridge (and so must be part of a brick). 364 */ 365#ifdef LATER 366int is_iobrick( int nasid, int widget_num ); 367#endif 368 369/* the following macro derives the widget number from the register 370 * address passed to it and uses is_iobrick to determine whether 371 * the widget in question is part of an SN1 IO brick. 372 */ 373#define IS_IOBRICK(rg) is_iobrick( NASID_GET((rg)), SWIN_WIDGETNUM((rg)) ) 374 375 376 377/* macros for NIC compatability */ 378/* always invoked on "this" cbrick */ 379#define HUB_VERTEX_MFG_INFO(v) \ 380 eeprom_vertex_info_set( C_BRICK, get_nasid(), (v), 0 ) 381 382#define BRIDGE_VERTEX_MFG_INFO(v, r) \ 383 ( IS_IOBRICK((r)) ? eeprom_vertex_info_set \ 384 ( IO_BRICK, NASID_GET((r)), (v), 0 ) \ 385 : nic_bridge_vertex_info((v), (r)) ) 386 387#define HUB_UID_GET(n,v,p) cbrick_uid_get((n),(p)) 388#define ROUTER_UID_GET(d,p) rbrick_uid_get(get_nasid(),(d),(p)) 389#define XBOW_UID_GET(n,p) iobrick_uid_get((n),(p)) 390 391#endif /* _ASM_IA64_SN_EEPROM_H */ 392