1#ifndef _ASM_CRIS_IO_H 2#define _ASM_CRIS_IO_H 3 4#include <asm/page.h> /* for __va, __pa */ 5#include <asm/svinto.h> 6#include <linux/config.h> 7 8/* Console I/O for simulated etrax100. Use #ifdef so erroneous 9 use will be evident. */ 10#ifdef CONFIG_SVINTO_SIM 11 /* Let's use the ucsim interface since it lets us do write(2, ...) */ 12#define SIMCOUT(s,len) \ 13 asm ("moveq 4,$r9 \n\t" \ 14 "moveq 2,$r10 \n\t" \ 15 "move.d %0,$r11 \n\t" \ 16 "move.d %1,$r12 \n\t" \ 17 "push $irp \n\t" \ 18 "move 0f,$irp \n\t" \ 19 "jump -6809 \n" \ 20 "0: \n\t" \ 21 "pop $irp" \ 22 : : "rm" (s), "rm" (len) : "r9","r10","r11","r12","memory") 23#define TRACE_ON() __extension__ \ 24 ({ int _Foofoo; __asm__ volatile ("bmod [%0],%0" : "=r" (_Foofoo) : "0" \ 25 (255)); _Foofoo; }) 26 27#define TRACE_OFF() do { __asm__ volatile ("bmod [%0],%0" :: "r" (254)); } while (0) 28#define SIM_END() do { __asm__ volatile ("bmod [%0],%0" :: "r" (28)); } while (0) 29#define CRIS_CYCLES() __extension__ \ 30 ({ unsigned long c; asm ("bmod [%1],%0" : "=r" (c) : "r" (27)); c;}) 31#else /* ! defined CONFIG_SVINTO_SIM */ 32#define CRIS_CYCLES() 0 33#endif /* ! defined CONFIG_SVINTO_SIM */ 34 35/* Etrax shadow registers - which live in arch/cris/kernel/shadows.c */ 36 37extern unsigned long port_g_data_shadow; 38extern unsigned char port_pa_dir_shadow; 39extern unsigned char port_pa_data_shadow; 40extern unsigned char port_pb_i2c_shadow; 41extern unsigned char port_pb_config_shadow; 42extern unsigned char port_pb_dir_shadow; 43extern unsigned char port_pb_data_shadow; 44extern unsigned long r_timer_ctrl_shadow; 45 46extern unsigned long port_cse1_shadow; 47extern unsigned long port_csp0_shadow; 48extern unsigned long port_csp4_shadow; 49 50extern volatile unsigned long *port_cse1_addr; 51extern volatile unsigned long *port_csp0_addr; 52extern volatile unsigned long *port_csp4_addr; 53 54/* macro for setting regs through a shadow - 55 * r = register name (like R_PORT_PA_DATA) 56 * s = shadow name (like port_pa_data_shadow) 57 * b = bit number 58 * v = value (0 or 1) 59 */ 60 61#define REG_SHADOW_SET(r,s,b,v) *r = s = (s & ~(1 << (b))) | ((v) << (b)) 62 63/* The LED's on various Etrax-based products are set differently. */ 64 65#if defined(CONFIG_ETRAX_NO_LEDS) || defined(CONFIG_SVINTO_SIM) 66#undef CONFIG_ETRAX_PA_LEDS 67#undef CONFIG_ETRAX_PB_LEDS 68#undef CONFIG_ETRAX_CSP0_LEDS 69#define LED_NETWORK_SET_G(x) 70#define LED_NETWORK_SET_R(x) 71#define LED_ACTIVE_SET_G(x) 72#define LED_ACTIVE_SET_R(x) 73#define LED_DISK_WRITE(x) 74#define LED_DISK_READ(x) 75#endif 76 77#if !defined(CONFIG_ETRAX_CSP0_LEDS) 78#define LED_BIT_SET(x) 79#define LED_BIT_CLR(x) 80#endif 81 82#define LED_OFF 0x00 83#define LED_GREEN 0x01 84#define LED_RED 0x02 85#define LED_ORANGE (LED_GREEN | LED_RED) 86 87#if CONFIG_ETRAX_LED1G == CONFIG_ETRAX_LED1R 88#define LED_NETWORK_SET(x) \ 89 do { \ 90 LED_NETWORK_SET_G((x) & LED_GREEN); \ 91 } while (0) 92#else 93#define LED_NETWORK_SET(x) \ 94 do { \ 95 LED_NETWORK_SET_G((x) & LED_GREEN); \ 96 LED_NETWORK_SET_R((x) & LED_RED); \ 97 } while (0) 98#endif 99#if CONFIG_ETRAX_LED2G == CONFIG_ETRAX_LED2R 100#define LED_ACTIVE_SET(x) \ 101 do { \ 102 LED_ACTIVE_SET_G((x) & LED_GREEN); \ 103 } while (0) 104#else 105#define LED_ACTIVE_SET(x) \ 106 do { \ 107 LED_ACTIVE_SET_G((x) & LED_GREEN); \ 108 LED_ACTIVE_SET_R((x) & LED_RED); \ 109 } while (0) 110#endif 111 112#ifdef CONFIG_ETRAX_PA_LEDS 113#define LED_NETWORK_SET_G(x) \ 114 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1G, !(x)) 115#define LED_NETWORK_SET_R(x) \ 116 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1R, !(x)) 117#define LED_ACTIVE_SET_G(x) \ 118 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2G, !(x)) 119#define LED_ACTIVE_SET_R(x) \ 120 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2R, !(x)) 121#define LED_DISK_WRITE(x) \ 122 do{\ 123 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3G, !(x));\ 124 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3R, !(x));\ 125 }while(0) 126#define LED_DISK_READ(x) \ 127 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3G, !(x)) 128#endif 129 130#ifdef CONFIG_ETRAX_PB_LEDS 131#define LED_NETWORK_SET_G(x) \ 132 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1G, !(x)) 133#define LED_NETWORK_SET_R(x) \ 134 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1R, !(x)) 135#define LED_ACTIVE_SET_G(x) \ 136 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2G, !(x)) 137#define LED_ACTIVE_SET_R(x) \ 138 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2R, !(x)) 139#define LED_DISK_WRITE(x) \ 140 do{\ 141 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3G, !(x));\ 142 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3R, !(x));\ 143 }while(0) 144#define LED_DISK_READ(x) \ 145 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3G, !(x)) 146#endif 147 148#ifdef CONFIG_ETRAX_CSP0_LEDS 149#define CONFIGURABLE_LEDS\ 150 ((1 << CONFIG_ETRAX_LED1G ) | (1 << CONFIG_ETRAX_LED1R ) |\ 151 (1 << CONFIG_ETRAX_LED2G ) | (1 << CONFIG_ETRAX_LED2R ) |\ 152 (1 << CONFIG_ETRAX_LED3G ) | (1 << CONFIG_ETRAX_LED3R ) |\ 153 (1 << CONFIG_ETRAX_LED4G ) | (1 << CONFIG_ETRAX_LED4R ) |\ 154 (1 << CONFIG_ETRAX_LED5G ) | (1 << CONFIG_ETRAX_LED5R ) |\ 155 (1 << CONFIG_ETRAX_LED6G ) | (1 << CONFIG_ETRAX_LED6R ) |\ 156 (1 << CONFIG_ETRAX_LED7G ) | (1 << CONFIG_ETRAX_LED7R ) |\ 157 (1 << CONFIG_ETRAX_LED8Y ) | (1 << CONFIG_ETRAX_LED9Y ) |\ 158 (1 << CONFIG_ETRAX_LED10Y ) |(1 << CONFIG_ETRAX_LED11Y )|\ 159 (1 << CONFIG_ETRAX_LED12R )) 160 161#define LED_NETWORK_SET_G(x) \ 162 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1G, !(x)) 163#define LED_NETWORK_SET_R(x) \ 164 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1R, !(x)) 165#define LED_ACTIVE_SET_G(x) \ 166 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2G, !(x)) 167#define LED_ACTIVE_SET_R(x) \ 168 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2R, !(x)) 169#define LED_DISK_WRITE(x) \ 170 do{\ 171 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x));\ 172 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3R, !(x));\ 173 }while(0) 174#define LED_DISK_READ(x) \ 175 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x)) 176#define LED_BIT_SET(x)\ 177 do{\ 178 if((( 1 << x) & CONFIGURABLE_LEDS) != 0)\ 179 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 1);\ 180 }while(0) 181#define LED_BIT_CLR(x)\ 182 do{\ 183 if((( 1 << x) & CONFIGURABLE_LEDS) != 0)\ 184 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 0);\ 185 }while(0) 186#endif 187 188# 189#ifdef CONFIG_ETRAX_SOFT_SHUTDOWN 190#define SOFT_SHUTDOWN() \ 191 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_SHUTDOWN_BIT, 1) 192#else 193#define SOFT_SHUTDOWN() 194#endif 195 196/* 197 * Change virtual addresses to physical addresses and vv. 198 */ 199 200static inline unsigned long virt_to_phys(volatile void * address) 201{ 202 return __pa(address); 203} 204 205static inline void * phys_to_virt(unsigned long address) 206{ 207 return __va(address); 208} 209 210extern void * __ioremap(unsigned long offset, unsigned long size, unsigned long flags); 211 212extern inline void * ioremap (unsigned long offset, unsigned long size) 213{ 214 return __ioremap(offset, size, 0); 215} 216 217/* 218 * IO bus memory addresses are also 1:1 with the physical address 219 */ 220#define virt_to_bus virt_to_phys 221#define bus_to_virt phys_to_virt 222 223/* 224 * readX/writeX() are used to access memory mapped devices. On some 225 * architectures the memory mapped IO stuff needs to be accessed 226 * differently. On the CRIS architecture, we just read/write the 227 * memory location directly. 228 */ 229#define readb(addr) (*(volatile unsigned char *) (addr)) 230#define readw(addr) (*(volatile unsigned short *) (addr)) 231#define readl(addr) (*(volatile unsigned int *) (addr)) 232 233#define writeb(b,addr) ((*(volatile unsigned char *) (addr)) = (b)) 234#define writew(b,addr) ((*(volatile unsigned short *) (addr)) = (b)) 235#define writel(b,addr) ((*(volatile unsigned int *) (addr)) = (b)) 236 237#define memset_io(a,b,c) memset((void *)(a),(b),(c)) 238#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c)) 239#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) 240 241/* 242 * Again, CRIS does not require mem IO specific function. 243 */ 244 245#define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void *)(b),(c),(d)) 246 247/* The following is junk needed for the arch-independant code but which 248 * we never use in the CRIS port 249 */ 250 251#define IO_SPACE_LIMIT 0xffff 252#define inb(x) (0) 253#define outb(x,y) 254#define outw(x,y) 255#define outl(x,y) 256#define insb(x,y,z) 257#define insw(x,y,z) 258#define insl(x,y,z) 259#define outsb(x,y,z) 260#define outsw(x,y,z) 261#define outsl(x,y,z) 262 263#endif 264