1/*
2 * Hardware info about DECstation 5000/200 systems (otherwise known as
3 * 3max or KN02).
4 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License.  See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
10 * are by courtesy of Chris Fraser.
11 * Copyright (C) 2002  Maciej W. Rozycki
12 */
13#ifndef __ASM_MIPS_DEC_KN02_H
14#define __ASM_MIPS_DEC_KN02_H
15
16#ifndef __ASSEMBLY__
17#include <linux/spinlock.h>
18#include <linux/types.h>
19#endif
20
21#include <asm/addrspace.h>
22
23
24/*
25 * Motherboard regs (kseg1 addresses)
26 */
27#define KN02_CSR_ADDR	KSEG1ADDR(0x1ff00000)	/* system control & status reg */
28
29/*
30 * Some port addresses...
31 */
32#define KN02_SLOT_SIZE	0x00080000
33
34#define KN02_RTC_BASE	KSEG1ADDR(0x1fe80000)
35#define KN02_DZ11_BASE	KSEG1ADDR(0x1fe00000)
36
37#define KN02_CSR_BNK32M	(1<<10)			/* 32M stride */
38
39
40/*
41 * CPU interrupt bits.
42 */
43#define KN02_CPU_INR_RES_6	6	/* unused */
44#define KN02_CPU_INR_MEMORY	5	/* memory, I/O bus write errors */
45#define KN02_CPU_INR_RES_4	4	/* unused */
46#define KN02_CPU_INR_RTC	3	/* DS1287 RTC */
47#define KN02_CPU_INR_CASCADE	2	/* CSR cascade */
48
49/*
50 * CSR interrupt bits.
51 */
52#define KN02_CSR_INR_DZ11	7	/* DZ11 (DC7085) serial */
53#define KN02_CSR_INR_LANCE	6	/* LANCE (Am7990) Ethernet */
54#define KN02_CSR_INR_ASC	5	/* ASC (NCR53C94) SCSI */
55#define KN02_CSR_INR_RES_4	4	/* unused */
56#define KN02_CSR_INR_RES_3	3	/* unused */
57#define KN02_CSR_INR_TC2	2	/* TURBOchannel slot #2 */
58#define KN02_CSR_INR_TC1	1	/* TURBOchannel slot #1 */
59#define KN02_CSR_INR_TC0	0	/* TURBOchannel slot #0 */
60
61
62#define KN02_IRQ_BASE		8	/* first IRQ assigned to CSR */
63#define KN02_IRQ_LINES		8	/* number of CSR interrupts */
64
65#define KN02_IRQ_NR(n)		((n) + KN02_IRQ_BASE)
66#define KN02_IRQ_MASK(n)	(1 << (n))
67#define KN02_IRQ_ALL		0xff
68
69
70#ifndef __ASSEMBLY__
71extern u32 cached_kn02_csr;
72extern spinlock_t kn02_lock;
73extern void init_kn02_irqs(int base);
74#endif
75
76#endif /* __ASM_MIPS_DEC_KN02_H */
77