1#ifndef _ASM_IA64_FPU_H
2#define _ASM_IA64_FPU_H
3
4/*
5 * Copyright (C) 1998, 1999 Hewlett-Packard Co
6 * Copyright (C) 1998, 1999 David Mosberger-Tang <davidm@hpl.hp.com>
7 */
8
9#include <asm/types.h>
10
11/* floating point status register: */
12#define FPSR_TRAP_VD	(1 << 0)	/* invalid op trap disabled */
13#define FPSR_TRAP_DD	(1 << 1)	/* denormal trap disabled */
14#define FPSR_TRAP_ZD	(1 << 2)	/* zero-divide trap disabled */
15#define FPSR_TRAP_OD	(1 << 3)	/* overflow trap disabled */
16#define FPSR_TRAP_UD	(1 << 4)	/* underflow trap disabled */
17#define FPSR_TRAP_ID	(1 << 5)	/* inexact trap disabled */
18#define FPSR_S0(x)	((x) <<  6)
19#define FPSR_S1(x)	((x) << 19)
20#define FPSR_S2(x)	(__IA64_UL(x) << 32)
21#define FPSR_S3(x)	(__IA64_UL(x) << 45)
22
23/* floating-point status field controls: */
24#define FPSF_FTZ	(1 << 0)		/* flush-to-zero */
25#define FPSF_WRE	(1 << 1)		/* widest-range exponent */
26#define FPSF_PC(x)	(((x) & 0x3) << 2)	/* precision control */
27#define FPSF_RC(x)	(((x) & 0x3) << 4)	/* rounding control */
28#define FPSF_TD		(1 << 6)		/* trap disabled */
29
30/* floating-point status field flags: */
31#define FPSF_V		(1 <<  7)		/* invalid operation flag */
32#define FPSF_D		(1 <<  8)		/* denormal/unnormal operand flag */
33#define FPSF_Z		(1 <<  9)		/* zero divide (IEEE) flag */
34#define FPSF_O		(1 << 10)		/* overflow (IEEE) flag */
35#define FPSF_U		(1 << 11)		/* underflow (IEEE) flag */
36#define FPSF_I		(1 << 12)		/* inexact (IEEE) flag) */
37
38/* floating-point rounding control: */
39#define FPRC_NEAREST	0x0
40#define FPRC_NEGINF	0x1
41#define FPRC_POSINF	0x2
42#define FPRC_TRUNC	0x3
43
44#define FPSF_DEFAULT	(FPSF_PC (0x3) | FPSF_RC (FPRC_NEAREST))
45
46/* This default value is the same as HP-UX uses.  Don't change it
47   without a very good reason.  */
48#define FPSR_DEFAULT	(FPSR_TRAP_VD | FPSR_TRAP_DD | FPSR_TRAP_ZD	\
49			 | FPSR_TRAP_OD | FPSR_TRAP_UD | FPSR_TRAP_ID	\
50			 | FPSR_S0 (FPSF_DEFAULT)			\
51			 | FPSR_S1 (FPSF_DEFAULT | FPSF_TD | FPSF_WRE)	\
52			 | FPSR_S2 (FPSF_DEFAULT | FPSF_TD)		\
53			 | FPSR_S3 (FPSF_DEFAULT | FPSF_TD))
54
55# ifndef __ASSEMBLY__
56
57struct ia64_fpreg {
58	union {
59		unsigned long bits[2];
60	} u;
61} __attribute__ ((aligned (16)));
62
63# endif /* __ASSEMBLY__ */
64
65#endif /* _ASM_IA64_FPU_H */
66