1/* 2 * linux/include/asm-cris/ide.h 3 * 4 * Copyright (C) 2000, 2001, 2002 Axis Communications AB 5 * 6 * Authors: Bjorn Wesen 7 * 8 */ 9 10/* 11 * This file contains the ETRAX 100LX specific IDE code. 12 */ 13 14#ifndef __ASMCRIS_IDE_H 15#define __ASMCRIS_IDE_H 16 17#ifdef __KERNEL__ 18 19#include <asm/svinto.h> 20 21/* ETRAX 100 can support 4 IDE busses on the same pins (serialized) */ 22 23#define MAX_HWIFS 4 24 25#define ide__sti() __sti() 26 27static __inline__ int ide_default_irq(ide_ioreg_t base) 28{ 29 /* all IDE busses share the same IRQ, number 4. 30 * this has the side-effect that ide-probe.c will cluster our 4 interfaces 31 * together in a hwgroup, and will serialize accesses. this is good, because 32 * we can't access more than one interface at the same time on ETRAX100. 33 */ 34 return 4; 35} 36 37static __inline__ ide_ioreg_t ide_default_io_base(int index) 38{ 39 /* we have no real I/O base address per interface, since all go through the 40 * same register. but in a bitfield in that register, we have the i/f number. 41 * so we can use the io_base to remember that bitfield. 42 */ 43 static const unsigned long io_bases[MAX_HWIFS] = { 44 IO_FIELD(R_ATA_CTRL_DATA, sel, 0), 45 IO_FIELD(R_ATA_CTRL_DATA, sel, 1), 46 IO_FIELD(R_ATA_CTRL_DATA, sel, 2), 47 IO_FIELD(R_ATA_CTRL_DATA, sel, 3) 48 }; 49 return io_bases[index]; 50} 51 52/* this is called once for each interface, to setup the port addresses. data_port is the result 53 * of the ide_default_io_base call above. ctrl_port will be 0, but that is don't care for us. 54 */ 55 56static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port, ide_ioreg_t ctrl_port, int *irq) 57{ 58 int i; 59 60 /* fill in ports for ATA addresses 0 to 7 */ 61 62 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) { 63 hw->io_ports[i] = data_port | 64 IO_FIELD(R_ATA_CTRL_DATA, addr, i) | 65 IO_STATE(R_ATA_CTRL_DATA, cs0, active); 66 } 67 68 /* the IDE control register is at ATA address 6, with CS1 active instead of CS0 */ 69 70 hw->io_ports[IDE_CONTROL_OFFSET] = data_port | 71 IO_FIELD(R_ATA_CTRL_DATA, addr, 6) | 72 IO_STATE(R_ATA_CTRL_DATA, cs1, active); 73 74 /* whats this for ? */ 75 76 hw->io_ports[IDE_IRQ_OFFSET] = 0; 77} 78 79static __inline__ void ide_init_default_hwifs(void) 80{ 81 hw_regs_t hw; 82 int index; 83 84 for(index = 0; index < MAX_HWIFS; index++) { 85 ide_init_hwif_ports(&hw, ide_default_io_base(index), 0, NULL); 86 hw.irq = ide_default_irq(ide_default_io_base(index)); 87 ide_register_hw(&hw, NULL); 88 } 89} 90 91typedef union { 92 unsigned all : 8; /* all of the bits together */ 93 struct { 94 unsigned head : 4; /* always zeros here */ 95 unsigned unit : 1; /* drive select number, 0 or 1 */ 96 unsigned bit5 : 1; /* always 1 */ 97 unsigned lba : 1; /* using LBA instead of CHS */ 98 unsigned bit7 : 1; /* always 1 */ 99 } b; 100} select_t; 101 102typedef union { 103 unsigned all : 8; /* all of the bits together */ 104 struct { 105 unsigned bit0 : 1; 106 unsigned nIEN : 1; /* device INTRQ to host */ 107 unsigned SRST : 1; /* host soft reset bit */ 108 unsigned bit3 : 1; /* ATA-2 thingy */ 109 unsigned reserved456 : 3; 110 unsigned HOB : 1; /* 48-bit address ordering */ 111 } b; 112} control_t; 113 114/* some configuration options we don't need */ 115 116#undef SUPPORT_VLB_SYNC 117#define SUPPORT_VLB_SYNC 0 118 119#undef SUPPORT_SLOW_DATA_PORTS 120#define SUPPORT_SLOW_DATA_PORTS 0 121 122/* request and free a normal interrupt */ 123 124#define ide_request_irq(irq,hand,flg,dev,id) request_irq((irq),(hand),(flg),(dev),(id)) 125#define ide_free_irq(irq,dev_id) free_irq((irq), (dev_id)) 126 127/* ide-probe.c calls ide_request_region and stuff on the io_ports defined, 128 * but since they are not actually memory-mapped in the ETRAX driver, we don't 129 * do anything. 130 */ 131 132#define ide_check_region(from,extent) (0) 133#define ide_request_region(from,extent,name) do {} while(0) 134#define ide_release_region(from,extent) do {} while(0) 135 136/* 137 * The following are not needed for the non-m68k ports 138 */ 139#define ide_ack_intr(hwif) (1) 140#define ide_fix_driveid(id) do {} while (0) 141#define ide_release_lock(lock) do {} while (0) 142#define ide_get_lock(lock, hdlr, data) do {} while (0) 143 144/* the drive addressing is done through a controller register on the Etrax CPU */ 145void OUT_BYTE(unsigned char data, ide_ioreg_t reg); 146unsigned char IN_BYTE(ide_ioreg_t reg); 147 148/* this tells ide.h not to define the standard macros */ 149#define HAVE_ARCH_OUT_BYTE 150#define HAVE_ARCH_IN_BYTE 151 152#endif /* __KERNEL__ */ 153 154#endif /* __ASMCRIS_IDE_H */ 155