1/* 2 * linux/include/asm-arm/hardware/serial_amba.h 3 * 4 * Internal header file for AMBA serial ports 5 * 6 * Copyright (C) ARM Limited 7 * Copyright (C) 2000 Deep Blue Solutions Ltd. 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 22 */ 23#ifndef ASM_ARM_HARDWARE_SERIAL_AMBA_H 24#define ASM_ARM_HARDWARE_SERIAL_AMBA_H 25 26/* ------------------------------------------------------------------------------- 27 * From AMBA UART (PL010) Block Specification (ARM-0001-CUST-DSPC-A03) 28 * ------------------------------------------------------------------------------- 29 * UART Register Offsets. 30 */ 31#define AMBA_UARTDR 0x00 /* Data read or written from the interface. */ 32#define AMBA_UARTRSR 0x04 /* Receive status register (Read). */ 33#define AMBA_UARTECR 0x04 /* Error clear register (Write). */ 34#define AMBA_UARTLCR_H 0x08 /* Line control register, high byte. */ 35#define AMBA_UARTLCR_M 0x0C /* Line control register, middle byte. */ 36#define AMBA_UARTLCR_L 0x10 /* Line control register, low byte. */ 37#define AMBA_UARTCR 0x14 /* Control register. */ 38#define AMBA_UARTFR 0x18 /* Flag register (Read only). */ 39#define AMBA_UARTIIR 0x1C /* Interrupt indentification register (Read). */ 40#define AMBA_UARTICR 0x1C /* Interrupt clear register (Write). */ 41#define AMBA_UARTILPR 0x20 /* IrDA low power counter register. */ 42 43#define AMBA_UARTRSR_OE 0x08 44#define AMBA_UARTRSR_BE 0x04 45#define AMBA_UARTRSR_PE 0x02 46#define AMBA_UARTRSR_FE 0x01 47 48#define AMBA_UARTFR_TXFF 0x20 49#define AMBA_UARTFR_RXFE 0x10 50#define AMBA_UARTFR_BUSY 0x08 51#define AMBA_UARTFR_DCD 0x04 52#define AMBA_UARTFR_DSR 0x02 53#define AMBA_UARTFR_CTS 0x01 54#define AMBA_UARTFR_TMSK (AMBA_UARTFR_TXFF + AMBA_UARTFR_BUSY) 55 56#define AMBA_UARTCR_RTIE 0x40 57#define AMBA_UARTCR_TIE 0x20 58#define AMBA_UARTCR_RIE 0x10 59#define AMBA_UARTCR_MSIE 0x08 60#define AMBA_UARTCR_IIRLP 0x04 61#define AMBA_UARTCR_SIREN 0x02 62#define AMBA_UARTCR_UARTEN 0x01 63 64#define AMBA_UARTLCR_H_WLEN_8 0x60 65#define AMBA_UARTLCR_H_WLEN_7 0x40 66#define AMBA_UARTLCR_H_WLEN_6 0x20 67#define AMBA_UARTLCR_H_WLEN_5 0x00 68#define AMBA_UARTLCR_H_FEN 0x10 69#define AMBA_UARTLCR_H_STP2 0x08 70#define AMBA_UARTLCR_H_EPS 0x04 71#define AMBA_UARTLCR_H_PEN 0x02 72#define AMBA_UARTLCR_H_BRK 0x01 73 74#define AMBA_UARTIIR_RTIS 0x08 75#define AMBA_UARTIIR_TIS 0x04 76#define AMBA_UARTIIR_RIS 0x02 77#define AMBA_UARTIIR_MIS 0x01 78 79#define ARM_BAUD_460800 1 80#define ARM_BAUD_230400 3 81#define ARM_BAUD_115200 7 82#define ARM_BAUD_57600 15 83#define ARM_BAUD_38400 23 84#define ARM_BAUD_19200 47 85#define ARM_BAUD_14400 63 86#define ARM_BAUD_9600 95 87#define ARM_BAUD_4800 191 88#define ARM_BAUD_2400 383 89#define ARM_BAUD_1200 767 90 91#define AMBA_UARTRSR_ANY (AMBA_UARTRSR_OE|AMBA_UARTRSR_BE|AMBA_UARTRSR_PE|AMBA_UARTRSR_FE) 92#define AMBA_UARTFR_MODEM_ANY (AMBA_UARTFR_DCD|AMBA_UARTFR_DSR|AMBA_UARTFR_CTS) 93 94#endif 95