1#ifndef _INIT_ 2#define _INIT_ 3 4#include "osdef.h" 5#include "initdef.h" 6#include "vgatypes.h" 7#include "vstruct.h" 8 9#ifdef TC 10#include <stdio.h> 11#include <string.h> 12#include <conio.h> 13#include <dos.h> 14#include <stdlib.h> 15#endif 16 17#ifdef LINUX_XF86 18#include "xf86.h" 19#include "xf86Pci.h" 20#include "xf86PciInfo.h" 21#include "xf86_OSproc.h" 22#include "sis.h" 23#include "sis_regs.h" 24#endif 25 26#ifdef LINUX_KERNEL 27#include <linux/types.h> 28#include <asm/io.h> 29#include <linux/sisfb.h> 30#endif 31 32#ifdef WIN2000 33#include <stdio.h> 34#include <string.h> 35#include <miniport.h> 36#include "dderror.h" 37#include "devioctl.h" 38#include "miniport.h" 39#include "ntddvdeo.h" 40#include "video.h" 41#include "sisv.h" 42#include "tools.h" 43#endif 44 45const USHORT SiS_DRAMType[17][5]={ 46 {0x0C,0x0A,0x02,0x40,0x39}, 47 {0x0D,0x0A,0x01,0x40,0x48}, 48 {0x0C,0x09,0x02,0x20,0x35}, 49 {0x0D,0x09,0x01,0x20,0x44}, 50 {0x0C,0x08,0x02,0x10,0x31}, 51 {0x0D,0x08,0x01,0x10,0x40}, 52 {0x0C,0x0A,0x01,0x20,0x34}, 53 {0x0C,0x09,0x01,0x08,0x32}, 54 {0x0B,0x08,0x02,0x08,0x21}, 55 {0x0C,0x08,0x01,0x08,0x30}, 56 {0x0A,0x08,0x02,0x04,0x11}, 57 {0x0B,0x0A,0x01,0x10,0x28}, 58 {0x09,0x08,0x02,0x02,0x01}, 59 {0x0B,0x09,0x01,0x08,0x24}, 60 {0x0B,0x08,0x01,0x04,0x20}, 61 {0x0A,0x08,0x01,0x02,0x10}, 62 {0x09,0x08,0x01,0x01,0x00} 63}; 64 65const USHORT SiS_SDRDRAM_TYPE[13][5] = 66{ 67 { 2,12, 9,64,0x35}, 68 { 1,13, 9,64,0x44}, 69 { 2,12, 8,32,0x31}, 70 { 2,11, 9,32,0x25}, 71 { 1,12, 9,32,0x34}, 72 { 1,13, 8,32,0x40}, 73 { 2,11, 8,16,0x21}, 74 { 1,12, 8,16,0x30}, 75 { 1,11, 9,16,0x24}, 76 { 1,11, 8, 8,0x20}, 77 { 2, 9, 8, 4,0x01}, 78 { 1,10, 8, 4,0x10}, 79 { 1, 9, 8, 2,0x00} 80}; 81 82const USHORT SiS_DDRDRAM_TYPE[4][5] = 83{ 84 { 2,12, 9,64,0x35}, 85 { 2,12, 8,32,0x31}, 86 { 2,11, 8,16,0x21}, 87 { 2, 9, 8, 4,0x01} 88}; 89 90const USHORT SiS_MDA_DAC[] = 91{ 92 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 93 0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15, 94 0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15, 95 0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F, 96 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 97 0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15, 98 0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15, 99 0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F 100}; 101 102const USHORT SiS_CGA_DAC[] = 103{ 104 0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15, 105 0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15, 106 0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F, 107 0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F, 108 0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15, 109 0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15, 110 0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F, 111 0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F 112}; 113 114const USHORT SiS_EGA_DAC[] = 115{ 116 0x00,0x10,0x04,0x14,0x01,0x11,0x05,0x15, 117 0x20,0x30,0x24,0x34,0x21,0x31,0x25,0x35, 118 0x08,0x18,0x0C,0x1C,0x09,0x19,0x0D,0x1D, 119 0x28,0x38,0x2C,0x3C,0x29,0x39,0x2D,0x3D, 120 0x02,0x12,0x06,0x16,0x03,0x13,0x07,0x17, 121 0x22,0x32,0x26,0x36,0x23,0x33,0x27,0x37, 122 0x0A,0x1A,0x0E,0x1E,0x0B,0x1B,0x0F,0x1F, 123 0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F 124}; 125 126const USHORT SiS_VGA_DAC[] = 127{ 128 0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15, 129 0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F, 130 0x00,0x05,0x08,0x0B,0x0E,0x11,0x14,0x18, 131 0x1C,0x20,0x24,0x28,0x2D,0x32,0x38,0x3F, 132 0x00,0x10,0x1F,0x2F,0x3F,0x1F,0x27,0x2F, 133 0x37,0x3F,0x2D,0x31,0x36,0x3A,0x3F,0x00, 134 0x07,0x0E,0x15,0x1C,0x0E,0x11,0x15,0x18, 135 0x1C,0x14,0x16,0x18,0x1A,0x1C,0x00,0x04, 136 0x08,0x0C,0x10,0x08,0x0A,0x0C,0x0E,0x10, 137 0x0B,0x0C,0x0D,0x0F,0x10 138}; 139 140void SiS_SetReg1(USHORT, USHORT, USHORT); 141void SiS_SetReg2(SiS_Private *, USHORT, USHORT, USHORT); 142void SiS_SetReg3(USHORT, USHORT); 143void SiS_SetReg4(USHORT, ULONG); 144UCHAR SiS_GetReg1(USHORT, USHORT); 145UCHAR SiS_GetReg2(USHORT); 146ULONG SiS_GetReg3(USHORT); 147void SiS_ClearDAC(SiS_Private *SiS_Pr, ULONG); 148void SiS_SetMemoryClock(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension); 149void SiS_SetDRAMModeRegister(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension); 150BOOLEAN SiS_SearchVBModeID(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT *ModeNo); 151void SiS_IsLowResolution(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex); 152ULONG GetDRAMSize(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension); 153 154#ifdef SIS300 155void InitTo300Pointer(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension); 156void SiS_SetDRAMSize_300(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension); 157USHORT SiS_ChkBUSWidth_300(SiS_Private *SiS_Pr, ULONG FBAddress); 158#endif 159 160#ifdef SIS315H 161void InitTo310Pointer(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension); 162UCHAR SiS_Get310DRAMType(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension); 163void SiS_DDR_MRS(SiS_Private *SiS_Pr); 164void SiS_SDR_MRS(SiS_Private *SiS_Pr); 165void SiS_DisableRefresh(SiS_Private *SiS_Pr); 166void SiS_EnableRefresh(SiS_Private *SiS_Pr, UCHAR *ROMAddr); 167void SiS_SetDRAMSize_310(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO); 168void SiS_DisableChannelInterleaving(SiS_Private *SiS_Pr, int index,USHORT SiS_DDRDRAM_TYPE[][5]); 169void SiS_SetDRAMSizingType(SiS_Private *SiS_Pr, int index,USHORT DRAMTYPE_TABLE[][5]); 170void SiS_CheckBusWidth_310(SiS_Private *SiS_Pr, UCHAR *ROMAddress,ULONG FBAddress, 171 PSIS_HW_DEVICE_INFO HwDeviceExtension); 172int SiS_SetRank(SiS_Private *SiS_Pr, int index,UCHAR RankNo,USHORT DRAMTYPE_TABLE[][5]); 173int SiS_SetDDRChannel(SiS_Private *SiS_Pr, int index,UCHAR ChannelNo, 174 USHORT DRAMTYPE_TABLE[][5]); 175int SiS_CheckColumn(SiS_Private *SiS_Pr, int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress); 176int SiS_CheckBanks(SiS_Private *SiS_Pr, int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress); 177int SiS_CheckRank(SiS_Private *SiS_Pr, int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress); 178int SiS_CheckDDRRank(SiS_Private *SiS_Pr, int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress); 179int SiS_CheckRanks(SiS_Private *SiS_Pr, int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress); 180int SiS_CheckDDRRanks(SiS_Private *SiS_Pr, int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress); 181int SiS_SDRSizing(SiS_Private *SiS_Pr, ULONG FBAddress); 182int SiS_DDRSizing(SiS_Private *SiS_Pr, ULONG FBAddress); 183int Is315E(SiS_Private *SiS_Pr); 184void SiS_VerifyMclk(SiS_Private *SiS_Pr, ULONG FBAddr); 185#endif 186 187void SiS_HandleCRT1(SiS_Private *SiS_Pr); 188void SiS_Handle301B_1400x1050(SiS_Private *SiS_Pr, USHORT ModeNo); 189void SetEnableDstn(SiS_Private *SiS_Pr); 190void SiS_Delay15us(SiS_Private *SiS_Pr); 191BOOLEAN SiS_SearchModeID(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT *ModeNo,USHORT *ModeIdIndex); 192BOOLEAN SiS_CheckMemorySize(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension, 193 USHORT ModeNo,USHORT ModeIdIndex); 194UCHAR SiS_GetModePtr(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT ModeNo,USHORT ModeIdIndex); 195void SiS_SetSeqRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT StandTableIndex); 196void SiS_SetMiscRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT StandTableIndex); 197void SiS_SetCRTCRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension, 198 USHORT StandTableIndex); 199void SiS_SetATTRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT StandTableIndex,USHORT ModeNo, 200 PSIS_HW_DEVICE_INFO HwDeviceExtension); 201void SiS_SetGRCRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT StandTableIndex); 202void SiS_ClearExt1Regs(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension); 203void SiS_SetSync(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT RefreshRateTableIndex); 204void SiS_SetCRT1CRTC(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex, 205 USHORT RefreshRateTableIndex, 206 PSIS_HW_DEVICE_INFO HwDeviceExtension); 207BOOLEAN SiS_GetLCDACRT1Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex, 208 USHORT RefreshRateTableIndex,USHORT *ResInfo,USHORT *DisplayType); 209void SiS_ResetCRT1VCLK(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension); 210void SiS_SetCRT1VCLK(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO, 211 USHORT RefreshRateTableIndex); 212void SiS_SetVCLKState(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO, USHORT ModeNo, 213 USHORT RefreshRateTableIndex, USHORT ModeIdIndex); 214void SiS_LoadDAC(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex); 215void SiS_WriteDAC(SiS_Private *SiS_Pr, USHORT, USHORT, USHORT, USHORT, USHORT, USHORT); 216void SiS_DisplayOn(SiS_Private *SiS_Pr); 217void SiS_DisplayOff(SiS_Private *SiS_Pr); 218void SiS_SetCRT1ModeRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO,USHORT ModeNo, 219 USHORT ModeIdIndex,USHORT RefreshRateTableIndex); 220void SiS_GetVBType(SiS_Private *SiS_Pr, USHORT BaseAddr,PSIS_HW_DEVICE_INFO); 221USHORT SiS_ChkBUSWidth(SiS_Private *SiS_Pr, UCHAR *ROMAddr); 222USHORT SiS_GetModeIDLength(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT); 223USHORT SiS_GetRefindexLength(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT); 224void SiS_SetInterlace(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT RefreshRateTableIndex); 225void SiS_Set_LVDS_TRUMPION(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension); 226void SiS_SetCRT1Offset(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT,USHORT,USHORT,PSIS_HW_DEVICE_INFO); 227#ifdef SIS315H 228void SiS_SetCRT1FIFO_310(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT,USHORT,PSIS_HW_DEVICE_INFO); 229#endif 230#ifdef SIS300 231void SiS_SetCRT1FIFO_300(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,PSIS_HW_DEVICE_INFO, 232 USHORT RefreshRateTableIndex); 233void SiS_SetCRT1FIFO_630(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,PSIS_HW_DEVICE_INFO, 234 USHORT RefreshRateTableIndex); 235USHORT SiS_CalcDelay(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT VCLK, 236 USHORT colordepth, USHORT MCLK); 237USHORT SiS_DoCalcDelay(SiS_Private *SiS_Pr, USHORT MCLK, USHORT VCLK, USHORT colordepth, USHORT key); 238USHORT SiS_CalcDelay2(SiS_Private *SiS_Pr, UCHAR *ROMAddr, UCHAR); 239#endif 240void SiS_ClearBuffer(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO,USHORT ModeNo); 241void SiS_SetCRT1Group(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension, 242 USHORT ModeNo,USHORT ModeIdIndex,USHORT BaseAddr); 243void SiS_DetectMonitor(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr); 244void SiS_GetSenseStatus(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,UCHAR *ROMAddr); 245USHORT SiS_TestMonitorType(SiS_Private *SiS_Pr, UCHAR R_DAC,UCHAR G_DAC,UCHAR B_DAC); 246USHORT SiS_SenseCHTV(SiS_Private *SiS_Pr); 247BOOLEAN SiS_Sense(SiS_Private *SiS_Pr, USHORT tempbx,USHORT tempcx); 248BOOLEAN SiS_GetPanelID(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO); 249BOOLEAN SiS_GetLCDDDCInfo(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO); 250USHORT SiS_SenseLCD(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO); 251void SiSRegInit(SiS_Private *SiS_Pr, USHORT BaseAddr); 252void SiSInitPtr(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension); 253void SiSSetLVDSetc(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT ModeNo); 254void SiSInitPCIetc(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension); 255void SiSDetermineROMUsage(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, UCHAR *ROMAddr); 256 257#ifdef LINUX_XF86 258USHORT SiS_CalcModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode); 259USHORT SiS_CheckCalcModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode, int VBFlags); 260void SiS_SetPitch(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, UShort BaseAddr); 261void SiS_SetPitchCRT1(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, UShort BaseAddr); 262void SiS_SetPitchCRT2(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, UShort BaseAddr); 263unsigned char SiS_GetSetModeID(ScrnInfoPtr pScrn, unsigned char id); 264unsigned char SiS_GetSetMMIOReg(ScrnInfoPtr pScrn, USHORT offset, unsigned char value); 265#endif 266 267extern USHORT SiS_GetOffset(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex, 268 USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension); 269extern USHORT SiS_GetColorDepth(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex); 270extern void SiS_DisableBridge(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr); 271extern BOOLEAN SiS_SetCRT2Group301(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo, 272 PSIS_HW_DEVICE_INFO HwDeviceExtension); 273extern void SiS_PresetScratchregister(SiS_Private *SiS_Pr, USHORT SiS_P3d4, 274 PSIS_HW_DEVICE_INFO HwDeviceExtension); 275extern void SiS_UnLockCRT2(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr); 276extern void SiS_LockCRT2(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr); 277extern BOOLEAN SiS_BridgeIsOn(SiS_Private *SiS_Pr, USHORT BaseAddr); 278extern BOOLEAN SiS_BridgeIsEnable(SiS_Private *SiS_Pr, USHORT BaseAddr,PSIS_HW_DEVICE_INFO ); 279extern void SiS_GetVBInfo(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo, 280 USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension); 281extern BOOLEAN SiS_GetLCDResInfo(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo, 282 USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension); 283extern void SiS_SetHiVision(SiS_Private *SiS_Pr, USHORT BaseAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension); 284extern USHORT SiS_GetRatePtrCRT2(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT ModeNo,USHORT ModeIdIndex, 285 PSIS_HW_DEVICE_INFO HwDeviceExtension); 286extern void SiS_LongWait(SiS_Private *SiS_Pr); 287extern void SiS_SetRegOR(USHORT Port,USHORT Index,USHORT DataOR); 288extern void SiS_SetRegAND(USHORT Port,USHORT Index,USHORT DataAND); 289extern void SiS_SetRegANDOR(USHORT Port,USHORT Index,USHORT DataAND,USHORT DataOR); 290extern USHORT SiS_GetResInfo(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex); 291extern void SiS_SetCH700x(SiS_Private *SiS_Pr, USHORT tempax); 292extern USHORT SiS_GetCH700x(SiS_Private *SiS_Pr, USHORT tempax); 293extern void SiS_SetCH701x(SiS_Private *SiS_Pr, USHORT tempax); 294extern USHORT SiS_GetCH701x(SiS_Private *SiS_Pr, USHORT tempax); 295extern void SiS_SetCH70xx(SiS_Private *SiS_Pr, USHORT tempax); 296extern USHORT SiS_GetCH70xx(SiS_Private *SiS_Pr, USHORT tempax); 297extern BOOLEAN SiS_GetLVDSCRT1Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex, 298 USHORT RefreshRateTableIndex, 299 USHORT *ResInfo,USHORT *DisplayType); 300extern USHORT SiS_GetVCLK2Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex, 301 USHORT RefreshRateTableIndex, 302 PSIS_HW_DEVICE_INFO HwDeviceExtension); 303extern BOOLEAN SiS_Is301B(SiS_Private *SiS_Pr, USHORT BaseAddr); 304extern BOOLEAN SiS_IsM650(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr); 305extern BOOLEAN SiS_LowModeStuff(SiS_Private *SiS_Pr, USHORT ModeNo,PSIS_HW_DEVICE_INFO HwDeviceExtension); 306 307#endif 308 309