1/* 2 * OSS driver for Linux 2.4.x for 3 * 4 * Trident 4D-Wave 5 * SiS 7018 6 * ALi 5451 7 * Tvia/IGST CyberPro 5050 8 * 9 * Driver: Alan Cox <alan@redhat.com> 10 * 11 * Built from: 12 * Low level code: <audio@tridentmicro.com> from ALSA 13 * Framework: Thomas Sailer <sailer@ife.ee.ethz.ch> 14 * Extended by: Zach Brown <zab@redhat.com> 15 * 16 * Hacked up by: 17 * Aaron Holtzman <aholtzma@ess.engr.uvic.ca> 18 * Ollie Lho <ollie@sis.com.tw> SiS 7018 Audio Core Support 19 * Ching-Ling Lee <cling-li@ali.com.tw> ALi 5451 Audio Core Support 20 * Matt Wu <mattwu@acersoftech.com.cn> ALi 5451 Audio Core Support 21 * Peter W�chtler <pwaechtler@loewe-komp.de> CyberPro5050 support 22 * 23 * 24 * This program is free software; you can redistribute it and/or modify 25 * it under the terms of the GNU General Public License as published by 26 * the Free Software Foundation; either version 2 of the License, or 27 * (at your option) any later version. 28 * 29 * This program is distributed in the hope that it will be useful, 30 * but WITHOUT ANY WARRANTY; without even the implied warranty of 31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 32 * GNU General Public License for more details. 33 * 34 * You should have received a copy of the GNU General Public License 35 * along with this program; if not, write to the Free Software 36 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 37 * 38 * History 39 * v0.14.10h 40 * Sept 10 2002 Pascal Schmidt <der.eremit@email.de> 41 * added support for ALi 5451 joystick port 42 * v0.14.10g 43 * Sept 05 2002 Alan Cox <alan@redhat.com> 44 * adapt to new pci joystick attachment interface 45 * v0.14.10f 46 * July 24 2002 Muli Ben-Yehuda <mulix@actcom.co.il> 47 * patch from Eric Lemar (via Ian Soboroff): in suspend and resume, 48 * fix wrong cast from pci_dev* to struct trident_card*. 49 * v0.14.10e 50 * July 19 2002 Muli Ben-Yehuda <mulix@actcom.co.il> 51 * rewrite the DMA buffer allocation/deallcoation functions, to make it 52 * modular and fix a bug where we would call free_pages on memory 53 * obtained with pci_alloc_consistent. Also remove unnecessary #ifdef 54 * CONFIG_PROC_FS and various other cleanups. 55 * v0.14.10d 56 * July 19 2002 Muli Ben-Yehuda <mulix@actcom.co.il> 57 * made several printk(KERN_NOTICE...) into TRDBG(...), to avoid spamming 58 * my syslog with hundreds of messages. 59 * v0.14.10c 60 * July 16 2002 Muli Ben-Yehuda <mulix@actcom.co.il> 61 * Cleaned up Lei Hu's 0.4.10 driver to conform to Documentation/CodingStyle 62 * and the coding style used in the rest of the file. 63 * v0.14.10b 64 * June 23 2002 Muli Ben-Yehuda <mulix@actcom.co.il> 65 * add a missing unlock_set_fmt, remove a superflous lock/unlock pair 66 * with nothing in between. 67 * v0.14.10a 68 * June 21 2002 Muli Ben-Yehuda <mulix@actcom.co.il> 69 * use a debug macro instead of #ifdef CONFIG_DEBUG, trim to 80 columns 70 * per line, use 'do {} while (0)' in statement macros. 71 * v0.14.10 72 * June 6 2002 Lei Hu <Lei_hu@ali.com.tw> 73 * rewrite the part to read/write registers of audio codec for Ali5451 74 * v0.14.9d 75 * October 8 2001 Arnaldo Carvalho de Melo <acme@conectiva.com.br> 76 * use set_current_state, properly release resources on failure in 77 * trident_probe, get rid of check_region 78 * v0.14.9c 79 * August 10 2001 Peter W�chtler <pwaechtler@loewe-komp.de> 80 * added support for Tvia (formerly Integraphics/IGST) CyberPro5050 81 * this chip is often found in settop boxes (combined video+audio) 82 * v0.14.9b 83 * Switch to static inline not extern inline (gcc 3) 84 * v0.14.9a 85 * Aug 6 2001 Alan Cox 86 * 0.14.9 crashed on rmmod due to a timer/bh left running. Simplified 87 * the existing logic (the BH doesnt help as ac97 is lock_irqsave) 88 * and used del_timer_sync to clean up 89 * Fixed a problem where the ALi change broke my generic card 90 * v0.14.9 91 * Jul 10 2001 Matt Wu 92 * Add H/W Volume Control 93 * v0.14.8a 94 * July 7 2001 Alan Cox 95 * Moved Matt Wu's ac97 register cache into the card structure 96 * v0.14.8 97 * Apr 30 2001 Matt Wu 98 * Set EBUF1 and EBUF2 to still mode 99 * Add dc97/ac97 reset function 100 * Fix power management: ali_restore_regs 101 * unreleased 102 * Mar 09 2001 Matt Wu 103 * Add cache for ac97 access 104 * v0.14.7 105 * Feb 06 2001 Matt Wu 106 * Fix ac97 initialization 107 * Fix bug: an extra tail will be played when playing 108 * Jan 05 2001 Matt Wu 109 * Implement multi-channels and S/PDIF in support for ALi 1535+ 110 * v0.14.6 111 * Nov 1 2000 Ching-Ling Lee 112 * Fix the bug of memory leak when switching 5.1-channels to 2 channels. 113 * Add lock protection into dynamic changing format of data. 114 * Oct 18 2000 Ching-Ling Lee 115 * 5.1-channels support for ALi 116 * June 28 2000 Ching-Ling Lee 117 * S/PDIF out/in(playback/record) support for ALi 1535+, using /proc to be selected by user 118 * Simple Power Management support for ALi 119 * v0.14.5 May 23 2000 Ollie Lho 120 * Misc bug fix from the Net 121 * v0.14.4 May 20 2000 Aaron Holtzman 122 * Fix kfree'd memory access in release 123 * Fix race in open while looking for a free virtual channel slot 124 * remove open_wait wq (which appears to be unused) 125 * v0.14.3 May 10 2000 Ollie Lho 126 * fixed a small bug in trident_update_ptr, xmms 1.0.1 no longer uses 100% CPU 127 * v0.14.2 Mar 29 2000 Ching-Ling Lee 128 * Add clear to silence advance in trident_update_ptr 129 * fix invalid data of the end of the sound 130 * v0.14.1 Mar 24 2000 Ching-Ling Lee 131 * ALi 5451 support added, playback and recording O.K. 132 * ALi 5451 originally developed and structured based on sonicvibes, and 133 * suggested to merge into this file by Alan Cox. 134 * v0.14 Mar 15 2000 Ollie Lho 135 * 5.1 channel output support with channel binding. What's the Matrix ? 136 * v0.13.1 Mar 10 2000 Ollie Lho 137 * few minor bugs on dual codec support, needs more testing 138 * v0.13 Mar 03 2000 Ollie Lho 139 * new pci_* for 2.4 kernel, back ported to 2.2 140 * v0.12 Feb 23 2000 Ollie Lho 141 * Preliminary Recording support 142 * v0.11.2 Feb 19 2000 Ollie Lho 143 * removed incomplete full-dulplex support 144 * v0.11.1 Jan 28 2000 Ollie Lho 145 * small bug in setting sample rate for 4d-nx (reported by Aaron) 146 * v0.11 Jan 27 2000 Ollie Lho 147 * DMA bug, scheduler latency, second try 148 * v0.10 Jan 24 2000 Ollie Lho 149 * DMA bug fixed, found kernel scheduling problem 150 * v0.09 Jan 20 2000 Ollie Lho 151 * Clean up of channel register access routine (prepare for channel binding) 152 * v0.08 Jan 14 2000 Ollie Lho 153 * Isolation of AC97 codec code 154 * v0.07 Jan 13 2000 Ollie Lho 155 * Get rid of ugly old low level access routines (e.g. CHRegs.lp****) 156 * v0.06 Jan 11 2000 Ollie Lho 157 * Preliminary support for dual (more ?) AC97 codecs 158 * v0.05 Jan 08 2000 Luca Montecchiani <m.luca@iname.com> 159 * adapt to 2.3.x new __setup/__init call 160 * v0.04 Dec 31 1999 Ollie Lho 161 * Multiple Open, using Middle Loop Interrupt to smooth playback 162 * v0.03 Dec 24 1999 Ollie Lho 163 * mem leak in prog_dmabuf and dealloc_dmabuf removed 164 * v0.02 Dec 15 1999 Ollie Lho 165 * SiS 7018 support added, playback O.K. 166 * v0.01 Alan Cox et. al. 167 * Initial Release in kernel 2.3.30, does not work 168 * 169 * ToDo 170 * Clean up of low level channel register access code. (done) 171 * Fix the bug on dma buffer management in update_ptr, read/write, drain_dac (done) 172 * Dual AC97 codecs support (done) 173 * Recording support (done) 174 * Mmap support 175 * "Channel Binding" ioctl extension (done) 176 * new pci device driver interface for 2.4 kernel (done) 177 * 178 * Lock order (high->low) 179 * lock - hardware lock 180 * open_sem - guard opens 181 * sem - guard dmabuf, write re-entry etc 182 */ 183 184#include <linux/config.h> 185#include <linux/module.h> 186#include <linux/version.h> 187#include <linux/string.h> 188#include <linux/ctype.h> 189#include <linux/ioport.h> 190#include <linux/sched.h> 191#include <linux/delay.h> 192#include <linux/sound.h> 193#include <linux/slab.h> 194#include <linux/soundcard.h> 195#include <linux/pci.h> 196#include <linux/init.h> 197#include <linux/poll.h> 198#include <linux/spinlock.h> 199#include <linux/smp_lock.h> 200#include <linux/ac97_codec.h> 201#include <linux/wrapper.h> 202#include <linux/bitops.h> 203#include <linux/proc_fs.h> 204#include <linux/interrupt.h> 205#include <linux/pm.h> 206#include <linux/gameport.h> 207#include <linux/pci_gameport.h> 208#include <asm/uaccess.h> 209#include <asm/hardirq.h> 210#include <asm/io.h> 211#include <asm/dma.h> 212 213#if defined CONFIG_ALPHA_NAUTILUS || CONFIG_ALPHA_GENERIC 214#include <asm/hwrpb.h> 215#endif 216 217#include "trident.h" 218 219#define DRIVER_VERSION "0.14.10h" 220 221/* magic numbers to protect our data structures */ 222#define TRIDENT_CARD_MAGIC 0x5072696E /* "Prin" */ 223#define TRIDENT_STATE_MAGIC 0x63657373 /* "cess" */ 224 225#define TRIDENT_DMA_MASK 0x3fffffff /* DMA buffer mask for pci_alloc_consist */ 226#define ALI_DMA_MASK 0xffffffff /* ALI Tridents lack the 30-bit limitation */ 227 228#define NR_HW_CH 32 229 230/* maxinum nuber of AC97 codecs connected, AC97 2.0 defined 4, but 7018 and 4D-NX only 231 have 2 SDATA_IN lines (currently) */ 232#define NR_AC97 2 233 234/* minor number of /dev/swmodem (temporary, experimental) */ 235#define SND_DEV_SWMODEM 7 236 237static const unsigned ali_multi_channels_5_1[] = { 238 /*ALI_SURR_LEFT_CHANNEL, ALI_SURR_RIGHT_CHANNEL,*/ 239 ALI_CENTER_CHANNEL, 240 ALI_LEF_CHANNEL, 241 ALI_SURR_LEFT_CHANNEL, 242 ALI_SURR_RIGHT_CHANNEL 243}; 244 245static const unsigned sample_size[] = { 1, 2, 2, 4 }; 246static const unsigned sample_shift[] = { 0, 1, 1, 2 }; 247 248static const char invalid_magic[] = KERN_CRIT "trident: invalid magic value in %s\n"; 249 250enum { 251 TRIDENT_4D_DX = 0, 252 TRIDENT_4D_NX, 253 SIS_7018, 254 ALI_5451, 255 CYBER5050 256}; 257 258static char * card_names[] = { 259 "Trident 4DWave DX", 260 "Trident 4DWave NX", 261 "SiS 7018 PCI Audio", 262 "ALi Audio Accelerator", 263 "Tvia/IGST CyberPro 5050" 264}; 265 266static struct pci_device_id trident_pci_tbl [] __devinitdata = { 267 {PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_DX, 268 PCI_ANY_ID, PCI_ANY_ID, 0, 0, TRIDENT_4D_DX}, 269 {PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_NX, 270 PCI_ANY_ID, PCI_ANY_ID, 0, 0, TRIDENT_4D_NX}, 271 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7018, 272 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7018}, 273 {PCI_VENDOR_ID_ALI, PCI_DEVICE_ID_ALI_5451, 274 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ALI_5451}, 275 { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_5050, 276 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CYBER5050}, 277 {0,} 278}; 279 280MODULE_DEVICE_TABLE (pci, trident_pci_tbl); 281 282/* "software" or virtual channel, an instance of opened /dev/dsp */ 283struct trident_state { 284 unsigned int magic; 285 struct trident_card *card; /* Card info */ 286 287 /* file mode */ 288 mode_t open_mode; 289 290 /* virtual channel number */ 291 int virt; 292 293 struct dmabuf { 294 /* wave sample stuff */ 295 unsigned int rate; 296 unsigned char fmt, enable; 297 298 /* hardware channel */ 299 struct trident_channel *channel; 300 301 /* OSS buffer management stuff */ 302 void *rawbuf; 303 dma_addr_t dma_handle; 304 unsigned buforder; 305 unsigned numfrag; 306 unsigned fragshift; 307 308 /* our buffer acts like a circular ring */ 309 unsigned hwptr; /* where dma last started, updated by update_ptr */ 310 unsigned swptr; /* where driver last clear/filled, updated by read/write */ 311 int count; /* bytes to be comsumed or been generated by dma machine */ 312 unsigned total_bytes; /* total bytes dmaed by hardware */ 313 314 unsigned error; /* number of over/underruns */ 315 wait_queue_head_t wait; /* put process on wait queue when no more space in buffer */ 316 317 /* redundant, but makes calculations easier */ 318 unsigned fragsize; 319 unsigned dmasize; 320 unsigned fragsamples; 321 322 /* OSS stuff */ 323 unsigned mapped:1; 324 unsigned ready:1; 325 unsigned endcleared:1; 326 unsigned update_flag; 327 unsigned ossfragshift; 328 int ossmaxfrags; 329 unsigned subdivision; 330 331 } dmabuf; 332 333 /* 5.1 channels */ 334 struct trident_state *other_states[4]; 335 int multi_channels_adjust_count; 336 unsigned chans_num; 337 unsigned fmt_flag:1; 338 /* Guard against mmap/write/read races */ 339 struct semaphore sem; 340 341}; 342 343/* hardware channels */ 344struct trident_channel { 345 int num; /* channel number */ 346 u32 lba; /* Loop Begine Address, where dma buffer starts */ 347 u32 eso; /* End Sample Offset, wehre dma buffer ends (in the unit of samples) */ 348 u32 delta; /* delta value, sample rate / 48k for playback, 48k/sample rate for recording */ 349 u16 attribute; /* control where PCM data go and come */ 350 u16 fm_vol; 351 u32 control; /* signed/unsigned, 8/16 bits, mono/stereo */ 352}; 353 354struct trident_pcm_bank_address { 355 u32 start; 356 u32 stop; 357 u32 aint; 358 u32 aint_en; 359}; 360 361static struct trident_pcm_bank_address bank_a_addrs = 362{ 363 T4D_START_A, 364 T4D_STOP_A, 365 T4D_AINT_A, 366 T4D_AINTEN_A 367}; 368 369static struct trident_pcm_bank_address bank_b_addrs = 370{ 371 T4D_START_B, 372 T4D_STOP_B, 373 T4D_AINT_B, 374 T4D_AINTEN_B 375}; 376 377struct trident_pcm_bank { 378 /* register addresses to control bank operations */ 379 struct trident_pcm_bank_address *addresses; 380 /* each bank has 32 channels */ 381 u32 bitmap; /* channel allocation bitmap */ 382 struct trident_channel channels[32]; 383}; 384 385struct trident_card { 386 unsigned int magic; 387 388 /* We keep trident cards in a linked list */ 389 struct trident_card *next; 390 391 /* single open lock mechanism, only used for recording */ 392 struct semaphore open_sem; 393 394 /* The trident has a certain amount of cross channel interaction 395 so we use a single per card lock */ 396 spinlock_t lock; 397 398 /* PCI device stuff */ 399 struct pci_dev * pci_dev; 400 u16 pci_id; 401 u8 revision; 402 403 /* soundcore stuff */ 404 int dev_audio; 405 406 /* structures for abstraction of hardware facilities, codecs, banks and channels*/ 407 struct ac97_codec *ac97_codec[NR_AC97]; 408 struct trident_pcm_bank banks[NR_BANKS]; 409 struct trident_state *states[NR_HW_CH]; 410 411 /* hardware resources */ 412 unsigned long iobase; 413 u32 irq; 414 415 /* Function support */ 416 struct trident_channel *(*alloc_pcm_channel)(struct trident_card *); 417 struct trident_channel *(*alloc_rec_pcm_channel)(struct trident_card *); 418 void (*free_pcm_channel)(struct trident_card *, unsigned int chan); 419 void (*address_interrupt)(struct trident_card *); 420 421 /* Added by Matt Wu 01-05-2001 for spdif in */ 422 int multi_channel_use_count; 423 int rec_channel_use_count; 424 u16 mixer_regs[64][NR_AC97]; /* Made card local by Alan */ 425 int mixer_regs_ready; 426 427 /* Added for hardware volume control */ 428 int hwvolctl; 429 struct timer_list timer; 430 431 struct pcigame *joystick; /* joystick device */ 432}; 433 434/* table to map from CHANNELMASK to channel attribute for SiS 7018 */ 435static u16 mask2attr [] = 436{ 437 PCM_LR, PCM_LR, SURR_LR, CENTER_LFE, 438 HSET, MIC, MODEM_LINE1, MODEM_LINE2, 439 I2S_LR, SPDIF_LR 440}; 441 442/* table to map from channel attribute to CHANNELMASK for SiS 7018 */ 443static int attr2mask [] = { 444 DSP_BIND_MODEM1, DSP_BIND_MODEM2, DSP_BIND_FRONT, DSP_BIND_HANDSET, 445 DSP_BIND_I2S, DSP_BIND_CENTER_LFE, DSP_BIND_SURR, DSP_BIND_SPDIF 446}; 447 448/* Added by Matt Wu 01-05-2001 for spdif in */ 449static int ali_close_multi_channels(void); 450static void ali_delay(struct trident_card *card, int interval); 451static void ali_detect_spdif_rate(struct trident_card *card); 452 453static void ali_ac97_write(struct ac97_codec *codec, u8 reg, u16 val); 454static u16 ali_ac97_read(struct ac97_codec *codec, u8 reg); 455 456static struct trident_card *devs; 457 458static void trident_ac97_set(struct ac97_codec *codec, u8 reg, u16 val); 459static u16 trident_ac97_get(struct ac97_codec *codec, u8 reg); 460 461static int trident_open_mixdev(struct inode *inode, struct file *file); 462static int trident_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, 463 unsigned long arg); 464 465static void ali_ac97_set(struct trident_card *card, int secondary, u8 reg, u16 val); 466static u16 ali_ac97_get(struct trident_card *card, int secondary, u8 reg); 467static void ali_set_spdif_out_rate(struct trident_card *card, unsigned int rate); 468static void ali_enable_special_channel(struct trident_state *stat); 469static struct trident_channel *ali_alloc_rec_pcm_channel(struct trident_card *card); 470static struct trident_channel *ali_alloc_pcm_channel(struct trident_card *card); 471static void ali_restore_regs(struct trident_card *card); 472static void ali_save_regs(struct trident_card *card); 473static int trident_suspend(struct pci_dev *dev, u32 unused); 474static int trident_resume(struct pci_dev *dev); 475static void ali_free_pcm_channel(struct trident_card *card, unsigned int channel); 476static int ali_setup_multi_channels(struct trident_card *card, int chan_nums); 477static unsigned int ali_get_spdif_in_rate(struct trident_card *card); 478static void ali_setup_spdif_in(struct trident_card *card); 479static void ali_disable_spdif_in(struct trident_card *card); 480static void ali_disable_special_channel(struct trident_card *card, int ch); 481static void ali_setup_spdif_out(struct trident_card *card, int flag); 482static int ali_write_5_1(struct trident_state *state, const char *buffer, 483 int cnt_for_multi_channel, unsigned int *copy_count, 484 unsigned int *state_cnt); 485static int ali_allocate_other_states_resources(struct trident_state *state, 486 int chan_nums); 487static void ali_free_other_states_resources(struct trident_state *state); 488 489 490/* save registers for ALi Power Management */ 491static struct ali_saved_registers { 492 unsigned long global_regs[ALI_GLOBAL_REGS]; 493 unsigned long channel_regs[ALI_CHANNELS][ALI_CHANNEL_REGS]; 494 unsigned mixer_regs[ALI_MIXER_REGS]; 495} ali_registers; 496 497#define seek_offset(dma_ptr, buffer, cnt, offset, copy_count) do { \ 498 (dma_ptr) += (offset); \ 499 (buffer) += (offset); \ 500 (cnt) -= (offset); \ 501 (copy_count) += (offset); \ 502} while (0) 503 504 505#define lock_set_fmt(state) do { \ 506 spin_lock_irqsave(&state->card->lock, flags); \ 507 if (state->fmt_flag) { \ 508 spin_unlock_irqrestore(&state->card->lock, flags); \ 509 return -EFAULT; \ 510 } \ 511 state->fmt_flag = 1; \ 512 spin_unlock_irqrestore(&state->card->lock, flags); \ 513} while (0) 514 515#define unlock_set_fmt(state) do { \ 516 spin_lock_irqsave(&state->card->lock, flags); \ 517 state->fmt_flag = 0; \ 518 spin_unlock_irqrestore(&state->card->lock, flags); \ 519} while (0) 520 521static int trident_enable_loop_interrupts(struct trident_card * card) 522{ 523 u32 global_control; 524 525 global_control = inl(TRID_REG(card, T4D_LFO_GC_CIR)); 526 527 switch (card->pci_id) 528 { 529 case PCI_DEVICE_ID_SI_7018: 530 global_control |= (ENDLP_IE | MIDLP_IE| BANK_B_EN); 531 break; 532 case PCI_DEVICE_ID_ALI_5451: 533 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX: 534 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX: 535 case PCI_DEVICE_ID_INTERG_5050: 536 global_control |= (ENDLP_IE | MIDLP_IE); 537 break; 538 default: 539 return FALSE; 540 } 541 542 outl(global_control, TRID_REG(card, T4D_LFO_GC_CIR)); 543 544 TRDBG("trident: Enable Loop Interrupts, globctl = 0x%08X\n", 545 inl(TRID_REG(card, T4D_LFO_GC_CIR))); 546 547 return (TRUE); 548} 549 550static int trident_disable_loop_interrupts(struct trident_card * card) 551{ 552 u32 global_control; 553 554 global_control = inl(TRID_REG(card, T4D_LFO_GC_CIR)); 555 global_control &= ~(ENDLP_IE | MIDLP_IE); 556 outl(global_control, TRID_REG(card, T4D_LFO_GC_CIR)); 557 558 TRDBG("trident: Disabled Loop Interrupts, globctl = 0x%08X\n", 559 global_control); 560 561 return (TRUE); 562} 563 564static void trident_enable_voice_irq(struct trident_card * card, unsigned int channel) 565{ 566 unsigned int mask = 1 << (channel & 0x1f); 567 struct trident_pcm_bank *bank = &card->banks[channel >> 5]; 568 u32 reg, addr = bank->addresses->aint_en; 569 570 reg = inl(TRID_REG(card, addr)); 571 reg |= mask; 572 outl(reg, TRID_REG(card, addr)); 573 574#ifdef DEBUG 575 reg = inl(TRID_REG(card, addr)); 576 TRDBG("trident: enabled IRQ on channel %d, %s = 0x%08x(addr:%X)\n", 577 channel, addr==T4D_AINTEN_B? "AINTEN_B":"AINTEN_A",reg,addr); 578#endif /* DEBUG */ 579} 580 581static void trident_disable_voice_irq(struct trident_card * card, unsigned int channel) 582{ 583 unsigned int mask = 1 << (channel & 0x1f); 584 struct trident_pcm_bank *bank = &card->banks[channel >> 5]; 585 u32 reg, addr = bank->addresses->aint_en; 586 587 reg = inl(TRID_REG(card, addr)); 588 reg &= ~mask; 589 outl(reg, TRID_REG(card, addr)); 590 591 /* Ack the channel in case the interrupt was set before we disable it. */ 592 outl(mask, TRID_REG(card, bank->addresses->aint)); 593 594#ifdef DEBUG 595 reg = inl(TRID_REG(card, addr)); 596 TRDBG("trident: disabled IRQ on channel %d, %s = 0x%08x(addr:%X)\n", 597 channel, addr==T4D_AINTEN_B? "AINTEN_B":"AINTEN_A",reg,addr); 598#endif /* DEBUG */ 599} 600 601static void trident_start_voice(struct trident_card * card, unsigned int channel) 602{ 603 unsigned int mask = 1 << (channel & 0x1f); 604 struct trident_pcm_bank *bank = &card->banks[channel >> 5]; 605 u32 addr = bank->addresses->start; 606 607#ifdef DEBUG 608 u32 reg; 609#endif /* DEBUG */ 610 611 outl(mask, TRID_REG(card, addr)); 612 613#ifdef DEBUG 614 reg = inl(TRID_REG(card, addr)); 615 TRDBG("trident: start voice on channel %d, %s = 0x%08x(addr:%X)\n", 616 channel, addr==T4D_START_B? "START_B":"START_A",reg,addr); 617#endif /* DEBUG */ 618} 619 620static void trident_stop_voice(struct trident_card * card, unsigned int channel) 621{ 622 unsigned int mask = 1 << (channel & 0x1f); 623 struct trident_pcm_bank *bank = &card->banks[channel >> 5]; 624 u32 addr = bank->addresses->stop; 625 626#ifdef DEBUG 627 u32 reg; 628#endif /* DEBUG */ 629 630 outl(mask, TRID_REG(card, addr)); 631 632#ifdef DEBUG 633 reg = inl(TRID_REG(card, addr)); 634 TRDBG("trident: stop voice on channel %d, %s = 0x%08x(addr:%X)\n", 635 channel, addr==T4D_STOP_B? "STOP_B":"STOP_A",reg,addr); 636#endif /* DEBUG */ 637} 638 639static u32 trident_get_interrupt_mask (struct trident_card * card, unsigned int channel) 640{ 641 struct trident_pcm_bank *bank = &card->banks[channel]; 642 u32 addr = bank->addresses->aint; 643 return inl(TRID_REG(card, addr)); 644} 645 646static int trident_check_channel_interrupt(struct trident_card * card, unsigned int channel) 647{ 648 unsigned int mask = 1 << (channel & 0x1f); 649 u32 reg = trident_get_interrupt_mask (card, channel >> 5); 650 651#ifdef DEBUG 652 if (reg & mask) 653 TRDBG("trident: channel %d has interrupt, %s = 0x%08x\n", 654 channel,reg==T4D_AINT_B? "AINT_B":"AINT_A", reg); 655#endif /* DEBUG */ 656 return (reg & mask) ? TRUE : FALSE; 657} 658 659static void trident_ack_channel_interrupt(struct trident_card * card, unsigned int channel) 660{ 661 unsigned int mask = 1 << (channel & 0x1f); 662 struct trident_pcm_bank *bank = &card->banks[channel >> 5]; 663 u32 reg, addr = bank->addresses->aint; 664 665 reg = inl(TRID_REG(card, addr)); 666 reg &= mask; 667 outl(reg, TRID_REG(card, addr)); 668 669#ifdef DEBUG 670 reg = inl(TRID_REG(card, T4D_AINT_B)); 671 TRDBG("trident: Ack channel %d interrupt, AINT_B = 0x%08x\n", 672 channel, reg); 673#endif /* DEBUG */ 674} 675 676static struct trident_channel * trident_alloc_pcm_channel(struct trident_card *card) 677{ 678 struct trident_pcm_bank *bank; 679 int idx; 680 681 bank = &card->banks[BANK_B]; 682 683 for (idx = 31; idx >= 0; idx--) { 684 if (!(bank->bitmap & (1 << idx))) { 685 struct trident_channel *channel = &bank->channels[idx]; 686 bank->bitmap |= 1 << idx; 687 channel->num = idx + 32; 688 return channel; 689 } 690 } 691 692 /* no more free channels available */ 693 printk(KERN_ERR "trident: no more channels available on Bank B.\n"); 694 return NULL; 695} 696 697static void trident_free_pcm_channel(struct trident_card *card, unsigned int channel) 698{ 699 int bank; 700 unsigned char b; 701 702 if (channel < 31 || channel > 63) 703 return; 704 705 if (card->pci_id == PCI_DEVICE_ID_TRIDENT_4DWAVE_DX || 706 card->pci_id == PCI_DEVICE_ID_TRIDENT_4DWAVE_NX) { 707 b = inb (TRID_REG(card, T4D_REC_CH)); 708 if ((b & ~0x80) == channel) 709 outb(0x0, TRID_REG(card, T4D_REC_CH)); 710 } 711 712 bank = channel >> 5; 713 channel = channel & 0x1f; 714 715 card->banks[bank].bitmap &= ~(1 << (channel)); 716} 717 718static struct trident_channel * cyber_alloc_pcm_channel(struct trident_card *card) 719{ 720 struct trident_pcm_bank *bank; 721 int idx; 722 723 /* The cyberpro 5050 has only 32 voices and one bank */ 724 /* .. at least they are not documented (if you want to call that 725 * crap documentation), perhaps broken ? */ 726 727 bank = &card->banks[BANK_A]; 728 729 for (idx = 31; idx >= 0; idx--) { 730 if (!(bank->bitmap & (1 << idx))) { 731 struct trident_channel *channel = &bank->channels[idx]; 732 bank->bitmap |= 1 << idx; 733 channel->num = idx; 734 return channel; 735 } 736 } 737 738 /* no more free channels available */ 739 printk(KERN_ERR "cyberpro5050: no more channels available on Bank A.\n"); 740 return NULL; 741} 742 743static void cyber_free_pcm_channel(struct trident_card *card, unsigned int channel) 744{ 745 if (channel > 31) 746 return; 747 card->banks[BANK_A].bitmap &= ~(1 << (channel)); 748} 749 750static inline void cyber_outidx(int port,int idx,int data) 751{ 752 outb(idx,port); 753 outb(data,port+1); 754} 755 756static inline int cyber_inidx(int port,int idx) 757{ 758 outb(idx,port); 759 return inb(port+1); 760} 761 762static int cyber_init_ritual(struct trident_card *card) 763{ 764 /* some black magic, taken from SDK samples */ 765 /* remove this and nothing will work */ 766 int portDat; 767 int ret = 0; 768 unsigned long flags; 769 770 /* 771 * Keep interrupts off for the configure - we don't want to 772 * clash with another cyberpro config event 773 */ 774 775 save_flags(flags); 776 cli(); 777 portDat = cyber_inidx(CYBER_PORT_AUDIO, CYBER_IDX_AUDIO_ENABLE); 778 /* enable, if it was disabled */ 779 if( (portDat & CYBER_BMSK_AUENZ) != CYBER_BMSK_AUENZ_ENABLE ) { 780 printk(KERN_INFO "cyberpro5050: enabling audio controller\n" ); 781 cyber_outidx( CYBER_PORT_AUDIO, CYBER_IDX_AUDIO_ENABLE, 782 portDat | CYBER_BMSK_AUENZ_ENABLE ); 783 /* check again if hardware is enabled now */ 784 portDat = cyber_inidx(CYBER_PORT_AUDIO, CYBER_IDX_AUDIO_ENABLE); 785 } 786 if( (portDat & CYBER_BMSK_AUENZ) != CYBER_BMSK_AUENZ_ENABLE ) 787 { 788 printk(KERN_ERR "cyberpro5050: initAudioAccess: no success\n" ); 789 ret = -1; 790 } 791 else 792 { 793 cyber_outidx( CYBER_PORT_AUDIO, CYBER_IDX_IRQ_ENABLE, CYBER_BMSK_AUDIO_INT_ENABLE ); 794 cyber_outidx( CYBER_PORT_AUDIO, 0xbf, 0x01 ); 795 cyber_outidx( CYBER_PORT_AUDIO, 0xba, 0x20 ); 796 cyber_outidx( CYBER_PORT_AUDIO, 0xbb, 0x08 ); 797 cyber_outidx( CYBER_PORT_AUDIO, 0xbf, 0x02 ); 798 cyber_outidx( CYBER_PORT_AUDIO, 0xb3, 0x06 ); 799 cyber_outidx( CYBER_PORT_AUDIO, 0xbf, 0x00 ); 800 } 801 restore_flags(flags); 802 return ret; 803} 804 805/* called with spin lock held */ 806 807static int trident_load_channel_registers(struct trident_card *card, u32 *data, unsigned int channel) 808{ 809 int i; 810 811 if (channel > 63) 812 return FALSE; 813 814 /* select hardware channel to write */ 815 outb(channel, TRID_REG(card, T4D_LFO_GC_CIR)); 816 817 /* Output the channel registers, but don't write register 818 three to an ALI chip. */ 819 for (i = 0; i < CHANNEL_REGS; i++) { 820 if (i == 3 && card->pci_id == PCI_DEVICE_ID_ALI_5451) 821 continue; 822 outl(data[i], TRID_REG(card, CHANNEL_START + 4*i)); 823 } 824 if (card->pci_id == PCI_DEVICE_ID_ALI_5451 || 825 card->pci_id == PCI_DEVICE_ID_INTERG_5050) { 826 outl(ALI_EMOD_Still, TRID_REG(card, ALI_EBUF1)); 827 outl(ALI_EMOD_Still, TRID_REG(card, ALI_EBUF2)); 828 } 829 return TRUE; 830} 831 832/* called with spin lock held */ 833static int trident_write_voice_regs(struct trident_state *state) 834{ 835 unsigned int data[CHANNEL_REGS + 1]; 836 struct trident_channel *channel; 837 838 channel = state->dmabuf.channel; 839 840 data[1] = channel->lba; 841 data[4] = channel->control; 842 843 switch (state->card->pci_id) 844 { 845 case PCI_DEVICE_ID_ALI_5451: 846 data[0] = 0; /* Current Sample Offset */ 847 data[2] = (channel->eso << 16) | (channel->delta & 0xffff); 848 data[3] = 0; 849 break; 850 case PCI_DEVICE_ID_SI_7018: 851 case PCI_DEVICE_ID_INTERG_5050: 852 data[0] = 0; /* Current Sample Offset */ 853 data[2] = (channel->eso << 16) | (channel->delta & 0xffff); 854 data[3] = (channel->attribute << 16) | (channel->fm_vol & 0xffff); 855 break; 856 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX: 857 data[0] = 0; /* Current Sample Offset */ 858 data[2] = (channel->eso << 16) | (channel->delta & 0xffff); 859 data[3] = channel->fm_vol & 0xffff; 860 break; 861 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX: 862 data[0] = (channel->delta << 24); 863 data[2] = ((channel->delta << 16) & 0xff000000) | (channel->eso & 0x00ffffff); 864 data[3] = channel->fm_vol & 0xffff; 865 break; 866 default: 867 return FALSE; 868 } 869 870 return trident_load_channel_registers(state->card, data, channel->num); 871} 872 873static int compute_rate_play(u32 rate) 874{ 875 int delta; 876 /* We special case 44100 and 8000 since rounding with the equation 877 does not give us an accurate enough value. For 11025 and 22050 878 the equation gives us the best answer. All other frequencies will 879 also use the equation. JDW */ 880 if (rate == 44100) 881 delta = 0xeb3; 882 else if (rate == 8000) 883 delta = 0x2ab; 884 else if (rate == 48000) 885 delta = 0x1000; 886 else 887 delta = (((rate << 12) + rate) / 48000) & 0x0000ffff; 888 return delta; 889} 890 891static int compute_rate_rec(u32 rate) 892{ 893 int delta; 894 895 if (rate == 44100) 896 delta = 0x116a; 897 else if (rate == 8000) 898 delta = 0x6000; 899 else if (rate == 48000) 900 delta = 0x1000; 901 else 902 delta = ((48000 << 12) / rate) & 0x0000ffff; 903 904 return delta; 905} 906/* set playback sample rate */ 907static unsigned int trident_set_dac_rate(struct trident_state * state, unsigned int rate) 908{ 909 struct dmabuf *dmabuf = &state->dmabuf; 910 911 if (rate > 48000) 912 rate = 48000; 913 if (rate < 4000) 914 rate = 4000; 915 916 dmabuf->rate = rate; 917 dmabuf->channel->delta = compute_rate_play(rate); 918 919 trident_write_voice_regs(state); 920 921 TRDBG("trident: called trident_set_dac_rate : rate = %d\n", rate); 922 923 return rate; 924} 925 926/* set recording sample rate */ 927static unsigned int trident_set_adc_rate(struct trident_state * state, unsigned int rate) 928{ 929 struct dmabuf *dmabuf = &state->dmabuf; 930 931 if (rate > 48000) 932 rate = 48000; 933 if (rate < 4000) 934 rate = 4000; 935 936 dmabuf->rate = rate; 937 dmabuf->channel->delta = compute_rate_rec(rate); 938 939 trident_write_voice_regs(state); 940 941 TRDBG("trident: called trident_set_adc_rate : rate = %d\n", rate); 942 943 return rate; 944} 945 946/* prepare channel attributes for playback */ 947static void trident_play_setup(struct trident_state *state) 948{ 949 struct dmabuf *dmabuf = &state->dmabuf; 950 struct trident_channel *channel = dmabuf->channel; 951 952 channel->lba = dmabuf->dma_handle; 953 channel->delta = compute_rate_play(dmabuf->rate); 954 955 channel->eso = dmabuf->dmasize >> sample_shift[dmabuf->fmt]; 956 channel->eso -= 1; 957 958 if (state->card->pci_id != PCI_DEVICE_ID_SI_7018) { 959 channel->attribute = 0; 960 if (state->card->pci_id == PCI_DEVICE_ID_ALI_5451) { 961 if ((channel->num == ALI_SPDIF_IN_CHANNEL) || (channel->num == ALI_PCM_IN_CHANNEL)) 962 ali_disable_special_channel(state->card, channel->num); 963 else if ((inl(TRID_REG(state->card, ALI_GLOBAL_CONTROL)) & ALI_SPDIF_OUT_CH_ENABLE) 964 && (channel->num == ALI_SPDIF_OUT_CHANNEL)) 965 { 966 ali_set_spdif_out_rate(state->card, state->dmabuf.rate); 967 state->dmabuf.channel->delta = 0x1000; 968 } 969 } 970 } 971 972 channel->fm_vol = 0x0; 973 974 channel->control = CHANNEL_LOOP; 975 if (dmabuf->fmt & TRIDENT_FMT_16BIT) { 976 /* 16-bits */ 977 channel->control |= CHANNEL_16BITS; 978 /* signed */ 979 channel->control |= CHANNEL_SIGNED; 980 } 981 if (dmabuf->fmt & TRIDENT_FMT_STEREO) 982 /* stereo */ 983 channel->control |= CHANNEL_STEREO; 984 985 TRDBG("trident: trident_play_setup, LBA = 0x%08x, " 986 "Delta = 0x%08x, ESO = 0x%08x, Control = 0x%08x\n", 987 channel->lba, channel->delta, channel->eso, channel->control); 988 989 trident_write_voice_regs(state); 990} 991 992/* prepare channel attributes for recording */ 993static void trident_rec_setup(struct trident_state *state) 994{ 995 u16 w; 996 u8 bval; 997 998 struct trident_card *card = state->card; 999 struct dmabuf *dmabuf = &state->dmabuf; 1000 struct trident_channel *channel = dmabuf->channel; 1001 unsigned int rate; 1002 1003 /* Enable AC-97 ADC (capture) */ 1004 switch (card->pci_id) 1005 { 1006 case PCI_DEVICE_ID_ALI_5451: 1007 ali_enable_special_channel(state); 1008 break; 1009 case PCI_DEVICE_ID_SI_7018: 1010 /* for 7018, the ac97 is always in playback/record (duplex) mode */ 1011 break; 1012 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX: 1013 w = inb(TRID_REG(card, DX_ACR2_AC97_COM_STAT)); 1014 outb(w | 0x48, TRID_REG(card, DX_ACR2_AC97_COM_STAT)); 1015 /* enable and set record channel */ 1016 outb(0x80 | channel->num, TRID_REG(card, T4D_REC_CH)); 1017 break; 1018 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX: 1019 w = inw(TRID_REG(card, T4D_MISCINT)); 1020 outw(w | 0x1000, TRID_REG(card, T4D_MISCINT)); 1021 /* enable and set record channel */ 1022 outb(0x80 | channel->num, TRID_REG(card, T4D_REC_CH)); 1023 break; 1024 case PCI_DEVICE_ID_INTERG_5050: 1025 /* don't know yet, using special channel 22 in GC1(0xd4)? */ 1026 break; 1027 default: 1028 return; 1029 } 1030 1031 channel->lba = dmabuf->dma_handle; 1032 channel->delta = compute_rate_rec(dmabuf->rate); 1033 if ((card->pci_id == PCI_DEVICE_ID_ALI_5451) && (channel->num == ALI_SPDIF_IN_CHANNEL)) { 1034 rate = ali_get_spdif_in_rate(card); 1035 if (rate == 0) 1036 { 1037 printk(KERN_WARNING "trident: ALi 5451 S/PDIF input setup error!\n"); 1038 rate = 48000; 1039 } 1040 bval = inb(TRID_REG(card,ALI_SPDIF_CTRL)); 1041 if (bval & 0x10) 1042 { 1043 outb(bval,TRID_REG(card,ALI_SPDIF_CTRL)); 1044 printk(KERN_WARNING "trident: cleared ALi 5451 S/PDIF parity error flag.\n"); 1045 } 1046 1047 if (rate != 48000) 1048 channel->delta = ((rate << 12) / dmabuf->rate) & 0x0000ffff; 1049 } 1050 1051 channel->eso = dmabuf->dmasize >> sample_shift[dmabuf->fmt]; 1052 channel->eso -= 1; 1053 1054 if (state->card->pci_id != PCI_DEVICE_ID_SI_7018) { 1055 channel->attribute = 0; 1056 } 1057 1058 channel->fm_vol = 0x0; 1059 1060 channel->control = CHANNEL_LOOP; 1061 if (dmabuf->fmt & TRIDENT_FMT_16BIT) { 1062 /* 16-bits */ 1063 channel->control |= CHANNEL_16BITS; 1064 /* signed */ 1065 channel->control |= CHANNEL_SIGNED; 1066 } 1067 if (dmabuf->fmt & TRIDENT_FMT_STEREO) 1068 /* stereo */ 1069 channel->control |= CHANNEL_STEREO; 1070 1071 TRDBG("trident: trident_rec_setup, LBA = 0x%08x, " 1072 "Delat = 0x%08x, ESO = 0x%08x, Control = 0x%08x\n", 1073 channel->lba, channel->delta, channel->eso, channel->control); 1074 1075 trident_write_voice_regs(state); 1076} 1077 1078/* get current playback/recording dma buffer pointer (byte offset from LBA), 1079 called with spinlock held! */ 1080static inline unsigned trident_get_dma_addr(struct trident_state *state) 1081{ 1082 struct dmabuf *dmabuf = &state->dmabuf; 1083 u32 cso; 1084 1085 if (!dmabuf->enable) 1086 return 0; 1087 1088 outb(dmabuf->channel->num, TRID_REG(state->card, T4D_LFO_GC_CIR)); 1089 1090 switch (state->card->pci_id) 1091 { 1092 case PCI_DEVICE_ID_ALI_5451: 1093 case PCI_DEVICE_ID_SI_7018: 1094 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX: 1095 case PCI_DEVICE_ID_INTERG_5050: 1096 /* 16 bits ESO, CSO for 7018 and DX */ 1097 cso = inw(TRID_REG(state->card, CH_DX_CSO_ALPHA_FMS + 2)); 1098 break; 1099 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX: 1100 /* 24 bits ESO, CSO for NX */ 1101 cso = inl(TRID_REG(state->card, CH_NX_DELTA_CSO)) & 0x00ffffff; 1102 break; 1103 default: 1104 return 0; 1105 } 1106 1107 1108 TRDBG("trident: trident_get_dma_addr: chip reported channel: %d, " 1109 "cso = 0x%04x\n", dmabuf->channel->num, cso); 1110 1111 /* ESO and CSO are in units of Samples, convert to byte offset */ 1112 cso <<= sample_shift[dmabuf->fmt]; 1113 1114 return (cso % dmabuf->dmasize); 1115} 1116 1117/* Stop recording (lock held) */ 1118static inline void __stop_adc(struct trident_state *state) 1119{ 1120 struct dmabuf *dmabuf = &state->dmabuf; 1121 unsigned int chan_num = dmabuf->channel->num; 1122 struct trident_card *card = state->card; 1123 1124 dmabuf->enable &= ~ADC_RUNNING; 1125 trident_stop_voice(card, chan_num); 1126 trident_disable_voice_irq(card, chan_num); 1127} 1128 1129static void stop_adc(struct trident_state *state) 1130{ 1131 struct trident_card *card = state->card; 1132 unsigned long flags; 1133 1134 spin_lock_irqsave(&card->lock, flags); 1135 __stop_adc(state); 1136 spin_unlock_irqrestore(&card->lock, flags); 1137} 1138 1139static void start_adc(struct trident_state *state) 1140{ 1141 struct dmabuf *dmabuf = &state->dmabuf; 1142 unsigned int chan_num = dmabuf->channel->num; 1143 struct trident_card *card = state->card; 1144 unsigned long flags; 1145 1146 spin_lock_irqsave(&card->lock, flags); 1147 if ((dmabuf->mapped || dmabuf->count < (signed)dmabuf->dmasize) && dmabuf->ready) { 1148 dmabuf->enable |= ADC_RUNNING; 1149 trident_enable_voice_irq(card, chan_num); 1150 trident_start_voice(card, chan_num); 1151 } 1152 spin_unlock_irqrestore(&card->lock, flags); 1153} 1154 1155/* stop playback (lock held) */ 1156static inline void __stop_dac(struct trident_state *state) 1157{ 1158 struct dmabuf *dmabuf = &state->dmabuf; 1159 unsigned int chan_num = dmabuf->channel->num; 1160 struct trident_card *card = state->card; 1161 1162 dmabuf->enable &= ~DAC_RUNNING; 1163 trident_stop_voice(card, chan_num); 1164 if (state->chans_num == 6) { 1165 trident_stop_voice(card, state->other_states[0]->dmabuf.channel->num); 1166 trident_stop_voice(card, state->other_states[1]->dmabuf.channel->num); 1167 trident_stop_voice(card, state->other_states[2]->dmabuf.channel->num); 1168 trident_stop_voice(card, state->other_states[3]->dmabuf.channel->num); 1169 } 1170 trident_disable_voice_irq(card, chan_num); 1171} 1172 1173static void stop_dac(struct trident_state *state) 1174{ 1175 struct trident_card *card = state->card; 1176 unsigned long flags; 1177 1178 spin_lock_irqsave(&card->lock, flags); 1179 __stop_dac(state); 1180 spin_unlock_irqrestore(&card->lock, flags); 1181} 1182 1183static void start_dac(struct trident_state *state) 1184{ 1185 struct dmabuf *dmabuf = &state->dmabuf; 1186 unsigned int chan_num = dmabuf->channel->num; 1187 struct trident_card *card = state->card; 1188 unsigned long flags; 1189 1190 spin_lock_irqsave(&card->lock, flags); 1191 if ((dmabuf->mapped || dmabuf->count > 0) && dmabuf->ready) { 1192 dmabuf->enable |= DAC_RUNNING; 1193 trident_enable_voice_irq(card, chan_num); 1194 trident_start_voice(card, chan_num); 1195 if (state->chans_num == 6) { 1196 trident_start_voice(card, state->other_states[0]->dmabuf.channel->num); 1197 trident_start_voice(card, state->other_states[1]->dmabuf.channel->num); 1198 trident_start_voice(card, state->other_states[2]->dmabuf.channel->num); 1199 trident_start_voice(card, state->other_states[3]->dmabuf.channel->num); 1200 } 1201 } 1202 spin_unlock_irqrestore(&card->lock, flags); 1203} 1204 1205#define DMABUF_DEFAULTORDER (15-PAGE_SHIFT) 1206#define DMABUF_MINORDER 1 1207 1208/* alloc a DMA buffer of with a buffer of this order */ 1209static int alloc_dmabuf(struct dmabuf* dmabuf, struct pci_dev* pci_dev, int order) 1210{ 1211 void *rawbuf = NULL; 1212 struct page *page, *pend; 1213 1214 if (!(rawbuf = pci_alloc_consistent(pci_dev, PAGE_SIZE << order, 1215 &dmabuf->dma_handle))) 1216 return -ENOMEM; 1217 1218 TRDBG("trident: allocated %ld (order = %d) bytes at %p\n", 1219 PAGE_SIZE << order, order, rawbuf); 1220 1221 dmabuf->ready = dmabuf->mapped = 0; 1222 dmabuf->rawbuf = rawbuf; 1223 dmabuf->buforder = order; 1224 1225 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */ 1226 pend = virt_to_page(rawbuf + (PAGE_SIZE << order) - 1); 1227 for (page = virt_to_page(rawbuf); page <= pend; page++) 1228 mem_map_reserve(page); 1229 1230 return 0; 1231} 1232 1233/* allocate the main DMA buffer, playback and recording buffer should be */ 1234/* allocated seperately */ 1235static int alloc_main_dmabuf(struct trident_state *state) 1236{ 1237 struct dmabuf *dmabuf = &state->dmabuf; 1238 int order; 1239 int ret = -ENOMEM; 1240 1241 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--) { 1242 if (!(ret = alloc_dmabuf(dmabuf, state->card->pci_dev, order))) 1243 return 0; 1244 /* else try again */ 1245 } 1246 return ret; 1247} 1248 1249/* deallocate a DMA buffer */ 1250static void dealloc_dmabuf(struct dmabuf* dmabuf, struct pci_dev* pci_dev) 1251{ 1252 struct page *page, *pend; 1253 1254 if (dmabuf->rawbuf) { 1255 /* undo marking the pages as reserved */ 1256 pend = virt_to_page(dmabuf->rawbuf + (PAGE_SIZE << dmabuf->buforder) - 1); 1257 for (page = virt_to_page(dmabuf->rawbuf); page <= pend; page++) 1258 mem_map_unreserve(page); 1259 pci_free_consistent(pci_dev, PAGE_SIZE << dmabuf->buforder, 1260 dmabuf->rawbuf, dmabuf->dma_handle); 1261 dmabuf->rawbuf = NULL; 1262 } 1263 dmabuf->mapped = dmabuf->ready = 0; 1264} 1265 1266static int prog_dmabuf(struct trident_state *state, unsigned rec) 1267{ 1268 struct dmabuf *dmabuf = &state->dmabuf; 1269 unsigned bytepersec; 1270 struct trident_state *s = state; 1271 unsigned bufsize, dma_nums; 1272 unsigned long flags; 1273 int ret, i, order; 1274 1275 lock_set_fmt(state); 1276 if (state->chans_num == 6) 1277 dma_nums = 5; 1278 else 1279 dma_nums = 1; 1280 1281 for (i = 0; i < dma_nums; i++) { 1282 if (i > 0) { 1283 s = state->other_states[i - 1]; 1284 dmabuf = &s->dmabuf; 1285 dmabuf->fmt = state->dmabuf.fmt; 1286 dmabuf->rate = state->dmabuf.rate; 1287 } 1288 1289 spin_lock_irqsave(&s->card->lock, flags); 1290 dmabuf->hwptr = dmabuf->swptr = dmabuf->total_bytes = 0; 1291 dmabuf->count = dmabuf->error = 0; 1292 spin_unlock_irqrestore(&s->card->lock, flags); 1293 1294 /* allocate DMA buffer if not allocated yet */ 1295 if (!dmabuf->rawbuf) { 1296 if (i == 0) { 1297 if ((ret = alloc_main_dmabuf(state))) { 1298 unlock_set_fmt(state); 1299 return ret; 1300 } 1301 } else { 1302 ret = -ENOMEM; 1303 if ((order = state->dmabuf.buforder - 1) >= DMABUF_MINORDER) { 1304 ret = alloc_dmabuf(dmabuf, state->card->pci_dev, order); 1305 } 1306 if (ret) { 1307 /* release the main DMA buffer */ 1308 dealloc_dmabuf(&state->dmabuf, state->card->pci_dev); 1309 /* release the auxiliary DMA buffers */ 1310 for (i-=2; i >= 0; i--) 1311 dealloc_dmabuf(&state->other_states[i]->dmabuf, 1312 state->card->pci_dev); 1313 unlock_set_fmt(state); 1314 return ret; 1315 } 1316 } 1317 } 1318 bytepersec = dmabuf->rate << sample_shift[dmabuf->fmt]; 1319 bufsize = PAGE_SIZE << dmabuf->buforder; 1320 if (dmabuf->ossfragshift) { 1321 if ((1000 << dmabuf->ossfragshift) < bytepersec) 1322 dmabuf->fragshift = ld2(bytepersec/1000); 1323 else 1324 dmabuf->fragshift = dmabuf->ossfragshift; 1325 } else { 1326 /* lets hand out reasonable big ass buffers by default */ 1327 dmabuf->fragshift = (dmabuf->buforder + PAGE_SHIFT -2); 1328 } 1329 dmabuf->numfrag = bufsize >> dmabuf->fragshift; 1330 while (dmabuf->numfrag < 4 && dmabuf->fragshift > 3) { 1331 dmabuf->fragshift--; 1332 dmabuf->numfrag = bufsize >> dmabuf->fragshift; 1333 } 1334 dmabuf->fragsize = 1 << dmabuf->fragshift; 1335 if (dmabuf->ossmaxfrags >= 4 && dmabuf->ossmaxfrags < dmabuf->numfrag) 1336 dmabuf->numfrag = dmabuf->ossmaxfrags; 1337 dmabuf->fragsamples = dmabuf->fragsize >> sample_shift[dmabuf->fmt]; 1338 dmabuf->dmasize = dmabuf->numfrag << dmabuf->fragshift; 1339 1340 memset(dmabuf->rawbuf, (dmabuf->fmt & TRIDENT_FMT_16BIT) ? 0 : 0x80, 1341 dmabuf->dmasize); 1342 1343 spin_lock_irqsave(&s->card->lock, flags); 1344 if (rec) 1345 trident_rec_setup(s); 1346 else 1347 trident_play_setup(s); 1348 1349 spin_unlock_irqrestore(&s->card->lock, flags); 1350 1351 /* set the ready flag for the dma buffer */ 1352 dmabuf->ready = 1; 1353 1354 TRDBG("trident: prog_dmabuf(%d), sample rate = %d, format = %d, numfrag = %d, " 1355 "fragsize = %d dmasize = %d\n", 1356 dmabuf->channel->num, dmabuf->rate, dmabuf->fmt, dmabuf->numfrag, 1357 dmabuf->fragsize, dmabuf->dmasize); 1358 } 1359 unlock_set_fmt(state); 1360 return 0; 1361} 1362 1363/* we are doing quantum mechanics here, the buffer can only be empty, half or full filled i.e. 1364 |------------|------------| or |xxxxxxxxxxxx|------------| or |xxxxxxxxxxxx|xxxxxxxxxxxx| 1365 but we almost always get this 1366 |xxxxxx------|------------| or |xxxxxxxxxxxx|xxxxx-------| 1367 so we have to clear the tail space to "silence" 1368 |xxxxxx000000|------------| or |xxxxxxxxxxxx|xxxxxx000000| 1369*/ 1370static void trident_clear_tail(struct trident_state *state) 1371{ 1372 struct dmabuf *dmabuf = &state->dmabuf; 1373 unsigned swptr; 1374 unsigned char silence = (dmabuf->fmt & TRIDENT_FMT_16BIT) ? 0 : 0x80; 1375 unsigned int len; 1376 unsigned long flags; 1377 1378 spin_lock_irqsave(&state->card->lock, flags); 1379 swptr = dmabuf->swptr; 1380 spin_unlock_irqrestore(&state->card->lock, flags); 1381 1382 if (swptr == 0 || swptr == dmabuf->dmasize / 2 || swptr == dmabuf->dmasize) 1383 return; 1384 1385 if (swptr < dmabuf->dmasize/2) 1386 len = dmabuf->dmasize/2 - swptr; 1387 else 1388 len = dmabuf->dmasize - swptr; 1389 1390 memset(dmabuf->rawbuf + swptr, silence, len); 1391 if(state->card->pci_id != PCI_DEVICE_ID_ALI_5451) 1392 { 1393 spin_lock_irqsave(&state->card->lock, flags); 1394 dmabuf->swptr += len; 1395 dmabuf->count += len; 1396 spin_unlock_irqrestore(&state->card->lock, flags); 1397 } 1398 1399 /* restart the dma machine in case it is halted */ 1400 start_dac(state); 1401} 1402 1403static int drain_dac(struct trident_state *state, int nonblock) 1404{ 1405 DECLARE_WAITQUEUE(wait, current); 1406 struct dmabuf *dmabuf = &state->dmabuf; 1407 unsigned long flags; 1408 unsigned long tmo; 1409 int count; 1410 unsigned long diff = 0; 1411 1412 if (dmabuf->mapped || !dmabuf->ready) 1413 return 0; 1414 1415 add_wait_queue(&dmabuf->wait, &wait); 1416 for (;;) { 1417 /* It seems that we have to set the current state to TASK_INTERRUPTIBLE 1418 every time to make the process really go to sleep */ 1419 set_current_state(TASK_INTERRUPTIBLE); 1420 1421 spin_lock_irqsave(&state->card->lock, flags); 1422 count = dmabuf->count; 1423 spin_unlock_irqrestore(&state->card->lock, flags); 1424 1425 if (count <= 0) 1426 break; 1427 1428 if (signal_pending(current)) 1429 break; 1430 1431 if (nonblock) { 1432 remove_wait_queue(&dmabuf->wait, &wait); 1433 set_current_state(TASK_RUNNING); 1434 return -EBUSY; 1435 } 1436 1437 /* No matter how much data is left in the buffer, we have to wait until 1438 CSO == ESO/2 or CSO == ESO when address engine interrupts */ 1439 if (state->card->pci_id == PCI_DEVICE_ID_ALI_5451 || 1440 state->card->pci_id == PCI_DEVICE_ID_INTERG_5050) 1441 { 1442 diff = dmabuf->swptr - trident_get_dma_addr(state) + dmabuf->dmasize ; 1443 diff = diff % (dmabuf->dmasize); 1444 tmo = (diff * HZ) / dmabuf->rate; 1445 } 1446 else 1447 { 1448 tmo = (dmabuf->dmasize * HZ) / dmabuf->rate; 1449 } 1450 tmo >>= sample_shift[dmabuf->fmt]; 1451 if (!schedule_timeout(tmo ? tmo : 1) && tmo){ 1452 break; 1453 } 1454 } 1455 remove_wait_queue(&dmabuf->wait, &wait); 1456 set_current_state(TASK_RUNNING); 1457 if (signal_pending(current)) 1458 return -ERESTARTSYS; 1459 1460 return 0; 1461} 1462 1463/* update buffer manangement pointers, especially, dmabuf->count and dmabuf->hwptr */ 1464static void trident_update_ptr(struct trident_state *state) 1465{ 1466 struct dmabuf *dmabuf = &state->dmabuf; 1467 unsigned hwptr, swptr; 1468 int clear_cnt = 0; 1469 int diff; 1470 unsigned char silence; 1471 unsigned half_dmasize; 1472 1473 /* update hardware pointer */ 1474 hwptr = trident_get_dma_addr(state); 1475 diff = (dmabuf->dmasize + hwptr - dmabuf->hwptr) % dmabuf->dmasize; 1476 dmabuf->hwptr = hwptr; 1477 dmabuf->total_bytes += diff; 1478 1479 /* error handling and process wake up for ADC */ 1480 if (dmabuf->enable == ADC_RUNNING) { 1481 if (dmabuf->mapped) { 1482 dmabuf->count -= diff; 1483 if (dmabuf->count >= (signed)dmabuf->fragsize) 1484 wake_up(&dmabuf->wait); 1485 } else { 1486 dmabuf->count += diff; 1487 1488 if (dmabuf->count < 0 || dmabuf->count > dmabuf->dmasize) { 1489 /* buffer underrun or buffer overrun, we have no way to recover 1490 it here, just stop the machine and let the process force hwptr 1491 and swptr to sync */ 1492 __stop_adc(state); 1493 dmabuf->error++; 1494 } 1495 if (dmabuf->count < (signed)dmabuf->dmasize/2) 1496 wake_up(&dmabuf->wait); 1497 } 1498 } 1499 1500 /* error handling and process wake up for DAC */ 1501 if (dmabuf->enable == DAC_RUNNING) { 1502 if (dmabuf->mapped) { 1503 dmabuf->count += diff; 1504 if (dmabuf->count >= (signed)dmabuf->fragsize) 1505 wake_up(&dmabuf->wait); 1506 } else { 1507 dmabuf->count -= diff; 1508 1509 if (dmabuf->count < 0 || dmabuf->count > dmabuf->dmasize) { 1510 /* buffer underrun or buffer overrun, we have no way to recover 1511 it here, just stop the machine and let the process force hwptr 1512 and swptr to sync */ 1513 __stop_dac(state); 1514 dmabuf->error++; 1515 } 1516 else if (!dmabuf->endcleared) { 1517 swptr = dmabuf->swptr; 1518 silence = (dmabuf->fmt & TRIDENT_FMT_16BIT ? 0 : 0x80); 1519 if (dmabuf->update_flag & ALI_ADDRESS_INT_UPDATE) { 1520 /* We must clear end data of 1/2 dmabuf if needed. 1521 According to 1/2 algorithm of Address Engine Interrupt, 1522 check the validation of the data of half dmasize. */ 1523 half_dmasize = dmabuf->dmasize / 2; 1524 if ((diff = hwptr - half_dmasize) < 0 ) 1525 diff = hwptr; 1526 if ((dmabuf->count + diff) < half_dmasize) { 1527 //there is invalid data in the end of half buffer 1528 if ((clear_cnt = half_dmasize - swptr) < 0) 1529 clear_cnt += half_dmasize; 1530 //clear the invalid data 1531 memset (dmabuf->rawbuf + swptr, 1532 silence, clear_cnt); 1533 if (state->chans_num == 6) { 1534 clear_cnt = clear_cnt / 2; 1535 swptr = swptr / 2; 1536 memset (state->other_states[0]->dmabuf.rawbuf + swptr, 1537 silence, clear_cnt); 1538 memset (state->other_states[1]->dmabuf.rawbuf + swptr, 1539 silence, clear_cnt); 1540 memset (state->other_states[2]->dmabuf.rawbuf + swptr, 1541 silence, clear_cnt); 1542 memset (state->other_states[3]->dmabuf.rawbuf + swptr, 1543 silence, clear_cnt); 1544 } 1545 dmabuf->endcleared = 1; 1546 } 1547 } else if (dmabuf->count < (signed) dmabuf->fragsize) { 1548 clear_cnt = dmabuf->fragsize; 1549 if ((swptr + clear_cnt) > dmabuf->dmasize) 1550 clear_cnt = dmabuf->dmasize - swptr; 1551 memset (dmabuf->rawbuf + swptr, silence, clear_cnt); 1552 if (state->chans_num == 6) { 1553 clear_cnt = clear_cnt / 2; 1554 swptr = swptr / 2; 1555 memset (state->other_states[0]->dmabuf.rawbuf + swptr, 1556 silence, clear_cnt); 1557 memset (state->other_states[1]->dmabuf.rawbuf + swptr, 1558 silence, clear_cnt); 1559 memset (state->other_states[2]->dmabuf.rawbuf + swptr, 1560 silence, clear_cnt); 1561 memset (state->other_states[3]->dmabuf.rawbuf + swptr, 1562 silence, clear_cnt); 1563 } 1564 dmabuf->endcleared = 1; 1565 } 1566 } 1567 /* trident_update_ptr is called by interrupt handler or by process via 1568 ioctl/poll, we only wake up the waiting process when we have more 1569 than 1/2 buffer free (always true for interrupt handler) */ 1570 if (dmabuf->count < (signed)dmabuf->dmasize/2) 1571 wake_up(&dmabuf->wait); 1572 } 1573 } 1574 dmabuf->update_flag &= ~ALI_ADDRESS_INT_UPDATE; 1575} 1576 1577static void trident_address_interrupt(struct trident_card *card) 1578{ 1579 int i; 1580 struct trident_state *state; 1581 unsigned int channel; 1582 1583 /* Update the pointers for all channels we are running. */ 1584 for (i = 0; i < NR_HW_CH; i++) { 1585 channel = 63 - i; 1586 if (trident_check_channel_interrupt(card, channel)) { 1587 trident_ack_channel_interrupt(card, channel); 1588 if ((state = card->states[i]) != NULL) { 1589 trident_update_ptr(state); 1590 } else { 1591 printk(KERN_WARNING "trident: spurious channel " 1592 "irq %d.\n", channel); 1593 trident_stop_voice(card, channel); 1594 trident_disable_voice_irq(card, channel); 1595 } 1596 } 1597 } 1598} 1599 1600static void ali_hwvol_control(struct trident_card *card, int opt) 1601{ 1602 u16 dwTemp, volume[2], mute, diff, *pVol[2]; 1603 1604 dwTemp = ali_ac97_read(card->ac97_codec[0], 0x02); 1605 mute = dwTemp & 0x8000; 1606 volume[0] = dwTemp & 0x001f; 1607 volume[1] = (dwTemp & 0x1f00) >> 8; 1608 if (volume[0] < volume [1]) { 1609 pVol[0] = &volume[0]; 1610 pVol[1] = &volume[1]; 1611 } else { 1612 pVol[1] = &volume[0]; 1613 pVol[0] = &volume[1]; 1614 } 1615 diff = *(pVol[1]) - *(pVol[0]); 1616 1617 if (opt == 1) { // MUTE 1618 dwTemp ^= 0x8000; 1619 ali_ac97_write(card->ac97_codec[0], 0x02, dwTemp); 1620 } else if (opt == 2) { // Down 1621 if (mute) 1622 return; 1623 if (*(pVol[1]) < 0x001f) { 1624 (*pVol[1])++; 1625 *(pVol[0]) = *(pVol[1]) - diff; 1626 } 1627 dwTemp &= 0xe0e0; 1628 dwTemp |= (volume[0]) | (volume[1] << 8); 1629 ali_ac97_write(card->ac97_codec[0], 0x02, dwTemp); 1630 card->ac97_codec[0]->mixer_state[0] = ((32-volume[0])*25/8) | (((32-volume[1])*25/8) << 8); 1631 } else if (opt == 4) { // Up 1632 if (mute) 1633 return; 1634 if (*(pVol[0]) >0) { 1635 (*pVol[0])--; 1636 *(pVol[1]) = *(pVol[0]) + diff; 1637 } 1638 dwTemp &= 0xe0e0; 1639 dwTemp |= (volume[0]) | (volume[1] << 8); 1640 ali_ac97_write(card->ac97_codec[0], 0x02, dwTemp); 1641 card->ac97_codec[0]->mixer_state[0] = ((32-volume[0])*25/8) | (((32-volume[1])*25/8) << 8); 1642 } 1643 else 1644 { 1645 /* Nothing needs doing */ 1646 } 1647} 1648 1649/* 1650 * Re-enable reporting of vol change after 0.1 seconds 1651 */ 1652 1653static void ali_timeout(unsigned long ptr) 1654{ 1655 struct trident_card *card = (struct trident_card *)ptr; 1656 u16 temp = 0; 1657 1658 /* Enable GPIO IRQ (MISCINT bit 18h)*/ 1659 temp = inw(TRID_REG(card, T4D_MISCINT + 2)); 1660 temp |= 0x0004; 1661 outw(temp, TRID_REG(card, T4D_MISCINT + 2)); 1662} 1663 1664/* 1665 * Set up the timer to clear the vol change notification 1666 */ 1667 1668static void ali_set_timer(struct trident_card *card) 1669{ 1670 /* Add Timer Routine to Enable GPIO IRQ */ 1671 del_timer(&card->timer); /* Never queue twice */ 1672 card->timer.function = ali_timeout; 1673 card->timer.data = (unsigned long) card; 1674 card->timer.expires = jiffies + HZ/10; 1675 add_timer(&card->timer); 1676} 1677 1678/* 1679 * Process a GPIO event 1680 */ 1681 1682static void ali_queue_task(struct trident_card *card, int opt) 1683{ 1684 u16 temp; 1685 1686 /* Disable GPIO IRQ (MISCINT bit 18h)*/ 1687 temp = inw(TRID_REG(card, T4D_MISCINT + 2)); 1688 temp &= (u16)(~0x0004); 1689 outw(temp, TRID_REG(card, T4D_MISCINT + 2)); 1690 1691 /* Adjust the volume */ 1692 ali_hwvol_control(card, opt); 1693 1694 /* Set the timer for 1/10th sec */ 1695 ali_set_timer(card); 1696} 1697 1698static void cyber_address_interrupt(struct trident_card *card) 1699{ 1700 int i,irq_status; 1701 struct trident_state *state; 1702 unsigned int channel; 1703 1704 /* Update the pointers for all channels we are running. */ 1705 /* FIXED: read interrupt status only once */ 1706 irq_status=inl(TRID_REG(card, T4D_AINT_A) ); 1707 1708 TRDBG("cyber_address_interrupt: irq_status 0x%X\n",irq_status); 1709 1710 for (i = 0; i < NR_HW_CH; i++) { 1711 channel = 31 - i; 1712 if (irq_status & ( 1 << channel) ) { 1713 /* clear bit by writing a 1, zeroes are ignored */ 1714 outl( (1 << channel), TRID_REG(card, T4D_AINT_A)); 1715 1716 TRDBG("cyber_interrupt: channel %d\n", channel); 1717 1718 if ((state = card->states[i]) != NULL) { 1719 trident_update_ptr(state); 1720 } else { 1721 printk(KERN_WARNING "cyber5050: spurious " 1722 "channel irq %d.\n", channel); 1723 trident_stop_voice(card, channel); 1724 trident_disable_voice_irq(card, channel); 1725 } 1726 } 1727 } 1728} 1729 1730static void trident_interrupt(int irq, void *dev_id, struct pt_regs *regs) 1731{ 1732 struct trident_card *card = (struct trident_card *)dev_id; 1733 u32 event; 1734 u32 gpio; 1735 1736 spin_lock(&card->lock); 1737 event = inl(TRID_REG(card, T4D_MISCINT)); 1738 1739 TRDBG("trident: trident_interrupt called, MISCINT = 0x%08x\n", event); 1740 1741 if (event & ADDRESS_IRQ) { 1742 card->address_interrupt(card); 1743 } 1744 1745 if(card->pci_id == PCI_DEVICE_ID_ALI_5451) 1746 { 1747 /* GPIO IRQ (H/W Volume Control) */ 1748 event = inl(TRID_REG(card, T4D_MISCINT)); 1749 if (event & (1<<25)) { 1750 gpio = inl(TRID_REG(card, ALI_GPIO)); 1751 if (!timer_pending(&card->timer)) 1752 ali_queue_task(card, gpio&0x07); 1753 } 1754 event = inl(TRID_REG(card, T4D_MISCINT)); 1755 outl(event | (ST_TARGET_REACHED | MIXER_OVERFLOW | MIXER_UNDERFLOW), TRID_REG(card, T4D_MISCINT)); 1756 spin_unlock(&card->lock); 1757 return; 1758 } 1759 1760 /* manually clear interrupt status, bad hardware design, blame T^2 */ 1761 outl((ST_TARGET_REACHED | MIXER_OVERFLOW | MIXER_UNDERFLOW), 1762 TRID_REG(card, T4D_MISCINT)); 1763 spin_unlock(&card->lock); 1764} 1765 1766/* in this loop, dmabuf.count signifies the amount of data that is waiting to be copied to 1767 the user's buffer. it is filled by the dma machine and drained by this loop. */ 1768static ssize_t trident_read(struct file *file, char *buffer, size_t count, loff_t *ppos) 1769{ 1770 struct trident_state *state = (struct trident_state *)file->private_data; 1771 struct dmabuf *dmabuf = &state->dmabuf; 1772 ssize_t ret = 0; 1773 unsigned long flags; 1774 unsigned swptr; 1775 int cnt; 1776 1777 TRDBG("trident: trident_read called, count = %d\n", count); 1778 1779 VALIDATE_STATE(state); 1780 if (ppos != &file->f_pos) 1781 return -ESPIPE; 1782 1783 if (dmabuf->mapped) 1784 return -ENXIO; 1785 if (!access_ok(VERIFY_WRITE, buffer, count)) 1786 return -EFAULT; 1787 1788 down(&state->sem); 1789 if (!dmabuf->ready && (ret = prog_dmabuf(state, 1))) 1790 goto out; 1791 1792 while (count > 0) { 1793 spin_lock_irqsave(&state->card->lock, flags); 1794 if (dmabuf->count > (signed) dmabuf->dmasize) { 1795 /* buffer overrun, we are recovering from sleep_on_timeout, 1796 resync hwptr and swptr, make process flush the buffer */ 1797 dmabuf->count = dmabuf->dmasize; 1798 dmabuf->swptr = dmabuf->hwptr; 1799 } 1800 swptr = dmabuf->swptr; 1801 cnt = dmabuf->dmasize - swptr; 1802 if (dmabuf->count < cnt) 1803 cnt = dmabuf->count; 1804 spin_unlock_irqrestore(&state->card->lock, flags); 1805 1806 if (cnt > count) 1807 cnt = count; 1808 if (cnt <= 0) { 1809 unsigned long tmo; 1810 /* buffer is empty, start the dma machine and wait for data to be 1811 recorded */ 1812 start_adc(state); 1813 if (file->f_flags & O_NONBLOCK) { 1814 if (!ret) ret = -EAGAIN; 1815 goto out; 1816 } 1817 1818 up(&state->sem); 1819 /* No matter how much space left in the buffer, we have to wait until 1820 CSO == ESO/2 or CSO == ESO when address engine interrupts */ 1821 tmo = (dmabuf->dmasize * HZ) / (dmabuf->rate * 2); 1822 tmo >>= sample_shift[dmabuf->fmt]; 1823 /* There are two situations when sleep_on_timeout returns, one is when 1824 the interrupt is serviced correctly and the process is waked up by 1825 ISR ON TIME. Another is when timeout is expired, which means that 1826 either interrupt is NOT serviced correctly (pending interrupt) or it 1827 is TOO LATE for the process to be scheduled to run (scheduler latency) 1828 which results in a (potential) buffer overrun. And worse, there is 1829 NOTHING we can do to prevent it. */ 1830 if (!interruptible_sleep_on_timeout(&dmabuf->wait, tmo)) { 1831 TRDBG(KERN_ERR "trident: recording schedule timeout, " 1832 "dmasz %u fragsz %u count %i hwptr %u swptr %u\n", 1833 dmabuf->dmasize, dmabuf->fragsize, dmabuf->count, 1834 dmabuf->hwptr, dmabuf->swptr); 1835 1836 /* a buffer overrun, we delay the recovery until next time the 1837 while loop begin and we REALLY have space to record */ 1838 } 1839 if (signal_pending(current)) { 1840 if(!ret) ret = -ERESTARTSYS; 1841 goto out; 1842 } 1843 down(&state->sem); 1844 if(dmabuf->mapped) 1845 { 1846 if(!ret) 1847 ret = -ENXIO; 1848 goto out; 1849 } 1850 continue; 1851 } 1852 1853 if (copy_to_user(buffer, dmabuf->rawbuf + swptr, cnt)) { 1854 if (!ret) ret = -EFAULT; 1855 goto out; 1856 } 1857 1858 swptr = (swptr + cnt) % dmabuf->dmasize; 1859 1860 spin_lock_irqsave(&state->card->lock, flags); 1861 dmabuf->swptr = swptr; 1862 dmabuf->count -= cnt; 1863 spin_unlock_irqrestore(&state->card->lock, flags); 1864 1865 count -= cnt; 1866 buffer += cnt; 1867 ret += cnt; 1868 start_adc(state); 1869 } 1870out: 1871 up(&state->sem); 1872 return ret; 1873} 1874 1875/* in this loop, dmabuf.count signifies the amount of data that is waiting to be dma to 1876 the soundcard. it is drained by the dma machine and filled by this loop. */ 1877 1878static ssize_t trident_write(struct file *file, const char *buffer, size_t count, loff_t *ppos) 1879{ 1880 struct trident_state *state = (struct trident_state *)file->private_data; 1881 struct dmabuf *dmabuf = &state->dmabuf; 1882 ssize_t ret; 1883 unsigned long flags; 1884 unsigned swptr; 1885 int cnt; 1886 unsigned int state_cnt; 1887 unsigned int copy_count; 1888 1889 TRDBG("trident: trident_write called, count = %d\n", count); 1890 1891 VALIDATE_STATE(state); 1892 if (ppos != &file->f_pos) 1893 return -ESPIPE; 1894 1895 /* 1896 * Guard against an mmap or ioctl while writing 1897 */ 1898 1899 down(&state->sem); 1900 1901 if (dmabuf->mapped) 1902 { 1903 ret = -ENXIO; 1904 goto out; 1905 } 1906 if (!dmabuf->ready && (ret = prog_dmabuf(state, 0))) 1907 goto out; 1908 1909 if (!access_ok(VERIFY_READ, buffer, count)) 1910 { 1911 ret= -EFAULT; 1912 goto out; 1913 } 1914 1915 ret = 0; 1916 1917 while (count > 0) { 1918 spin_lock_irqsave(&state->card->lock, flags); 1919 if (dmabuf->count < 0) { 1920 /* buffer underrun, we are recovering from sleep_on_timeout, 1921 resync hwptr and swptr */ 1922 dmabuf->count = 0; 1923 dmabuf->swptr = dmabuf->hwptr; 1924 } 1925 swptr = dmabuf->swptr; 1926 cnt = dmabuf->dmasize - swptr; 1927 if (dmabuf->count + cnt > dmabuf->dmasize) 1928 cnt = dmabuf->dmasize - dmabuf->count; 1929 spin_unlock_irqrestore(&state->card->lock, flags); 1930 1931 if (cnt > count) 1932 cnt = count; 1933 if (cnt <= 0) { 1934 unsigned long tmo; 1935 /* buffer is full, start the dma machine and wait for data to be 1936 played */ 1937 start_dac(state); 1938 if (file->f_flags & O_NONBLOCK) { 1939 if (!ret) ret = -EAGAIN; 1940 goto out; 1941 } 1942 /* No matter how much data left in the buffer, we have to wait until 1943 CSO == ESO/2 or CSO == ESO when address engine interrupts */ 1944 lock_set_fmt(state); 1945 tmo = (dmabuf->dmasize * HZ) / (dmabuf->rate * 2); 1946 tmo >>= sample_shift[dmabuf->fmt]; 1947 unlock_set_fmt(state); 1948 up(&state->sem); 1949 1950 /* There are two situations when sleep_on_timeout returns, one is when 1951 the interrupt is serviced correctly and the process is waked up by 1952 ISR ON TIME. Another is when timeout is expired, which means that 1953 either interrupt is NOT serviced correctly (pending interrupt) or it 1954 is TOO LATE for the process to be scheduled to run (scheduler latency) 1955 which results in a (potential) buffer underrun. And worse, there is 1956 NOTHING we can do to prevent it. */ 1957 if (!interruptible_sleep_on_timeout(&dmabuf->wait, tmo)) { 1958 TRDBG(KERN_ERR "trident: playback schedule timeout, " 1959 "dmasz %u fragsz %u count %i hwptr %u swptr %u\n", 1960 dmabuf->dmasize, dmabuf->fragsize, dmabuf->count, 1961 dmabuf->hwptr, dmabuf->swptr); 1962 1963 /* a buffer underrun, we delay the recovery until next time the 1964 while loop begin and we REALLY have data to play */ 1965 } 1966 if (signal_pending(current)) { 1967 if (!ret) ret = -ERESTARTSYS; 1968 goto out; 1969 } 1970 down(&state->sem); 1971 if(dmabuf->mapped) 1972 { 1973 if(!ret) 1974 ret = -ENXIO; 1975 goto out; 1976 } 1977 continue; 1978 } 1979 lock_set_fmt(state); 1980 if (state->chans_num == 6) { 1981 copy_count = 0; 1982 state_cnt = 0; 1983 if (ali_write_5_1(state, buffer, cnt, ©_count, &state_cnt) == -EFAULT) { 1984 if (state_cnt){ 1985 swptr = (swptr + state_cnt) % dmabuf->dmasize; 1986 spin_lock_irqsave(&state->card->lock, flags); 1987 dmabuf->swptr = swptr; 1988 dmabuf->count += state_cnt; 1989 dmabuf->endcleared = 0; 1990 spin_unlock_irqrestore(&state->card->lock, flags); 1991 } 1992 ret += copy_count; 1993 if (!ret) ret = -EFAULT; 1994 unlock_set_fmt(state); 1995 goto out; 1996 } 1997 } 1998 else { 1999 if (copy_from_user(dmabuf->rawbuf + swptr, buffer, cnt)) { 2000 if (!ret) ret = -EFAULT; 2001 unlock_set_fmt(state); 2002 goto out; 2003 } 2004 state_cnt = cnt; 2005 } 2006 unlock_set_fmt(state); 2007 2008 swptr = (swptr + state_cnt) % dmabuf->dmasize; 2009 2010 spin_lock_irqsave(&state->card->lock, flags); 2011 dmabuf->swptr = swptr; 2012 dmabuf->count += state_cnt; 2013 dmabuf->endcleared = 0; 2014 spin_unlock_irqrestore(&state->card->lock, flags); 2015 2016 count -= cnt; 2017 buffer += cnt; 2018 ret += cnt; 2019 start_dac(state); 2020 } 2021out: 2022 up(&state->sem); 2023 return ret; 2024} 2025 2026 2027/* No kernel lock - we have our own spinlock */ 2028static unsigned int trident_poll(struct file *file, struct poll_table_struct *wait) 2029{ 2030 struct trident_state *state = (struct trident_state *)file->private_data; 2031 struct dmabuf *dmabuf = &state->dmabuf; 2032 unsigned long flags; 2033 unsigned int mask = 0; 2034 2035 VALIDATE_STATE(state); 2036 2037 /* 2038 * Guard against a parallel poll and write causing multiple 2039 * prog_dmabuf events 2040 */ 2041 2042 down(&state->sem); 2043 2044 if (file->f_mode & FMODE_WRITE) { 2045 if (!dmabuf->ready && prog_dmabuf(state, 0)) 2046 { 2047 up(&state->sem); 2048 return 0; 2049 } 2050 poll_wait(file, &dmabuf->wait, wait); 2051 } 2052 if (file->f_mode & FMODE_READ) { 2053 if (!dmabuf->ready && prog_dmabuf(state, 1)) 2054 { 2055 up(&state->sem); 2056 return 0; 2057 } 2058 poll_wait(file, &dmabuf->wait, wait); 2059 } 2060 2061 up(&state->sem); 2062 2063 spin_lock_irqsave(&state->card->lock, flags); 2064 trident_update_ptr(state); 2065 if (file->f_mode & FMODE_READ) { 2066 if (dmabuf->count >= (signed)dmabuf->fragsize) 2067 mask |= POLLIN | POLLRDNORM; 2068 } 2069 if (file->f_mode & FMODE_WRITE) { 2070 if (dmabuf->mapped) { 2071 if (dmabuf->count >= (signed)dmabuf->fragsize) 2072 mask |= POLLOUT | POLLWRNORM; 2073 } else { 2074 if ((signed)dmabuf->dmasize >= dmabuf->count + (signed)dmabuf->fragsize) 2075 mask |= POLLOUT | POLLWRNORM; 2076 } 2077 } 2078 spin_unlock_irqrestore(&state->card->lock, flags); 2079 2080 return mask; 2081} 2082 2083static int trident_mmap(struct file *file, struct vm_area_struct *vma) 2084{ 2085 struct trident_state *state = (struct trident_state *)file->private_data; 2086 struct dmabuf *dmabuf = &state->dmabuf; 2087 int ret = -EINVAL; 2088 unsigned long size; 2089 2090 VALIDATE_STATE(state); 2091 lock_kernel(); 2092 2093 /* 2094 * Lock against poll read write or mmap creating buffers. Also lock 2095 * a read or write against an mmap. 2096 */ 2097 2098 down(&state->sem); 2099 2100 if (vma->vm_flags & VM_WRITE) { 2101 if ((ret = prog_dmabuf(state, 0)) != 0) 2102 goto out; 2103 } else if (vma->vm_flags & VM_READ) { 2104 if ((ret = prog_dmabuf(state, 1)) != 0) 2105 goto out; 2106 } else 2107 goto out; 2108 2109 ret = -EINVAL; 2110 if (vma->vm_pgoff != 0) 2111 goto out; 2112 size = vma->vm_end - vma->vm_start; 2113 if (size > (PAGE_SIZE << dmabuf->buforder)) 2114 goto out; 2115 ret = -EAGAIN; 2116 if (remap_page_range(vma->vm_start, virt_to_phys(dmabuf->rawbuf), 2117 size, vma->vm_page_prot)) 2118 goto out; 2119 dmabuf->mapped = 1; 2120 ret = 0; 2121out: 2122 up(&state->sem); 2123 unlock_kernel(); 2124 return ret; 2125} 2126 2127static int trident_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg) 2128{ 2129 struct trident_state *state = (struct trident_state *)file->private_data; 2130 struct dmabuf *dmabuf = &state->dmabuf; 2131 unsigned long flags; 2132 audio_buf_info abinfo; 2133 count_info cinfo; 2134 int val, mapped, ret = 0; 2135 2136 struct trident_card *card = state->card; 2137 2138 VALIDATE_STATE(state); 2139 mapped = ((file->f_mode & FMODE_WRITE) && dmabuf->mapped) || 2140 ((file->f_mode & FMODE_READ) && dmabuf->mapped); 2141 TRDBG("trident: trident_ioctl, command = %2d, arg = 0x%08x\n", 2142 _IOC_NR(cmd), arg ? *(int *)arg : 0); 2143 2144 switch (cmd) 2145 { 2146 case OSS_GETVERSION: 2147 ret = put_user(SOUND_VERSION, (int *)arg); 2148 break; 2149 2150 case SNDCTL_DSP_RESET: 2151 if (file->f_mode & FMODE_WRITE) { 2152 stop_dac(state); 2153 synchronize_irq(); 2154 dmabuf->ready = 0; 2155 dmabuf->swptr = dmabuf->hwptr = 0; 2156 dmabuf->count = dmabuf->total_bytes = 0; 2157 } 2158 if (file->f_mode & FMODE_READ) { 2159 stop_adc(state); 2160 synchronize_irq(); 2161 dmabuf->ready = 0; 2162 dmabuf->swptr = dmabuf->hwptr = 0; 2163 dmabuf->count = dmabuf->total_bytes = 0; 2164 } 2165 break; 2166 2167 case SNDCTL_DSP_SYNC: 2168 if (file->f_mode & FMODE_WRITE) 2169 ret = drain_dac(state, file->f_flags & O_NONBLOCK); 2170 break; 2171 2172 case SNDCTL_DSP_SPEED: /* set smaple rate */ 2173 if (get_user(val, (int *)arg)) 2174 { 2175 ret = -EFAULT; 2176 break; 2177 } 2178 if (val >= 0) { 2179 if (file->f_mode & FMODE_WRITE) { 2180 stop_dac(state); 2181 dmabuf->ready = 0; 2182 spin_lock_irqsave(&state->card->lock, flags); 2183 trident_set_dac_rate(state, val); 2184 spin_unlock_irqrestore(&state->card->lock, flags); 2185 } 2186 if (file->f_mode & FMODE_READ) { 2187 stop_adc(state); 2188 dmabuf->ready = 0; 2189 spin_lock_irqsave(&state->card->lock, flags); 2190 trident_set_adc_rate(state, val); 2191 spin_unlock_irqrestore(&state->card->lock, flags); 2192 } 2193 } 2194 ret = put_user(dmabuf->rate, (int *)arg); 2195 break; 2196 2197 case SNDCTL_DSP_STEREO: /* set stereo or mono channel */ 2198 if (get_user(val, (int *)arg)) 2199 { 2200 ret = -EFAULT; 2201 break; 2202 } 2203 lock_set_fmt(state); 2204 if (file->f_mode & FMODE_WRITE) { 2205 stop_dac(state); 2206 dmabuf->ready = 0; 2207 if (val) 2208 dmabuf->fmt |= TRIDENT_FMT_STEREO; 2209 else 2210 dmabuf->fmt &= ~TRIDENT_FMT_STEREO; 2211 } 2212 if (file->f_mode & FMODE_READ) { 2213 stop_adc(state); 2214 dmabuf->ready = 0; 2215 if (val) 2216 dmabuf->fmt |= TRIDENT_FMT_STEREO; 2217 else 2218 dmabuf->fmt &= ~TRIDENT_FMT_STEREO; 2219 } 2220 unlock_set_fmt(state); 2221 break; 2222 2223 case SNDCTL_DSP_GETBLKSIZE: 2224 if (file->f_mode & FMODE_WRITE) { 2225 if ((val = prog_dmabuf(state, 0))) 2226 ret = val; 2227 else 2228 ret = put_user(dmabuf->fragsize, (int *)arg); 2229 break; 2230 } 2231 if (file->f_mode & FMODE_READ) { 2232 if ((val = prog_dmabuf(state, 1))) 2233 ret = val; 2234 else 2235 ret = put_user(dmabuf->fragsize, (int *)arg); 2236 break; 2237 } 2238 2239 case SNDCTL_DSP_GETFMTS: /* Returns a mask of supported sample format*/ 2240 ret = put_user(AFMT_S16_LE|AFMT_U16_LE|AFMT_S8|AFMT_U8, (int *)arg); 2241 break; 2242 2243 case SNDCTL_DSP_SETFMT: /* Select sample format */ 2244 if (get_user(val, (int *)arg)) 2245 { 2246 ret = -EFAULT; 2247 break; 2248 } 2249 lock_set_fmt(state); 2250 if (val != AFMT_QUERY) { 2251 if (file->f_mode & FMODE_WRITE) { 2252 stop_dac(state); 2253 dmabuf->ready = 0; 2254 if (val == AFMT_S16_LE) 2255 dmabuf->fmt |= TRIDENT_FMT_16BIT; 2256 else 2257 dmabuf->fmt &= ~TRIDENT_FMT_16BIT; 2258 } 2259 if (file->f_mode & FMODE_READ) { 2260 stop_adc(state); 2261 dmabuf->ready = 0; 2262 if (val == AFMT_S16_LE) 2263 dmabuf->fmt |= TRIDENT_FMT_16BIT; 2264 else 2265 dmabuf->fmt &= ~TRIDENT_FMT_16BIT; 2266 } 2267 } 2268 unlock_set_fmt(state); 2269 ret = put_user((dmabuf->fmt & TRIDENT_FMT_16BIT) ? 2270 AFMT_S16_LE : AFMT_U8, (int *)arg); 2271 break; 2272 2273 case SNDCTL_DSP_CHANNELS: 2274 if (get_user(val, (int *)arg)) 2275 { 2276 ret = -EFAULT; 2277 break; 2278 } 2279 if (val != 0) { 2280 lock_set_fmt(state); 2281 if (file->f_mode & FMODE_WRITE) { 2282 stop_dac(state); 2283 dmabuf->ready = 0; 2284 2285 //prevent from memory leak 2286 if ((state->chans_num > 2) && (state->chans_num != val)) { 2287 ali_free_other_states_resources(state); 2288 state->chans_num = 1; 2289 } 2290 2291 if (val >= 2) 2292 { 2293 2294 dmabuf->fmt |= TRIDENT_FMT_STEREO; 2295 if ((val == 6) && (state->card->pci_id == PCI_DEVICE_ID_ALI_5451)) { 2296 2297 if( card->rec_channel_use_count > 0 ) 2298 { 2299 printk(KERN_ERR "trident: Record is working on the card!\n"); 2300 ret = -EBUSY; 2301 unlock_set_fmt(state); 2302 break; 2303 } 2304 2305 ret = ali_setup_multi_channels(state->card, 6); 2306 if (ret < 0) { 2307 unlock_set_fmt(state); 2308 break; 2309 } 2310 down(&state->card->open_sem); 2311 ret = ali_allocate_other_states_resources(state, 6); 2312 if (ret < 0) { 2313 up(&state->card->open_sem); 2314 unlock_set_fmt(state); 2315 break; 2316 } 2317 state->card->multi_channel_use_count ++; 2318 up(&state->card->open_sem); 2319 } 2320 else val = 2; /*yield to 2-channels*/ 2321 } 2322 else 2323 dmabuf->fmt &= ~TRIDENT_FMT_STEREO; 2324 state->chans_num = val; 2325 } 2326 if (file->f_mode & FMODE_READ) { 2327 stop_adc(state); 2328 dmabuf->ready = 0; 2329 if (val >= 2) { 2330 if (!((file->f_mode & FMODE_WRITE) && (val == 6))) 2331 val = 2; 2332 dmabuf->fmt |= TRIDENT_FMT_STEREO; 2333 } 2334 else 2335 dmabuf->fmt &= ~TRIDENT_FMT_STEREO; 2336 state->chans_num = val; 2337 } 2338 unlock_set_fmt(state); 2339 } 2340 ret = put_user(val, (int *)arg); 2341 break; 2342 2343 case SNDCTL_DSP_POST: 2344 /* Cause the working fragment to be output */ 2345 break; 2346 2347 case SNDCTL_DSP_SUBDIVIDE: 2348 if (dmabuf->subdivision) 2349 { 2350 ret = -EINVAL; 2351 break; 2352 } 2353 if (get_user(val, (int *)arg)) 2354 { 2355 ret = -EFAULT; 2356 break; 2357 } 2358 if (val != 1 && val != 2 && val != 4) 2359 { 2360 ret = -EINVAL; 2361 break; 2362 } 2363 dmabuf->subdivision = val; 2364 break; 2365 2366 case SNDCTL_DSP_SETFRAGMENT: 2367 if (get_user(val, (int *)arg)) 2368 { 2369 ret = -EFAULT; 2370 break; 2371 } 2372 2373 dmabuf->ossfragshift = val & 0xffff; 2374 dmabuf->ossmaxfrags = (val >> 16) & 0xffff; 2375 if (dmabuf->ossfragshift < 4) 2376 dmabuf->ossfragshift = 4; 2377 if (dmabuf->ossfragshift > 15) 2378 dmabuf->ossfragshift = 15; 2379 if (dmabuf->ossmaxfrags < 4) 2380 dmabuf->ossmaxfrags = 4; 2381 2382 break; 2383 2384 case SNDCTL_DSP_GETOSPACE: 2385 if (!(file->f_mode & FMODE_WRITE)) 2386 { 2387 ret = -EINVAL; 2388 break; 2389 } 2390 if (!dmabuf->ready && (val = prog_dmabuf(state, 0)) != 0) 2391 { 2392 ret = val; 2393 break; 2394 } 2395 spin_lock_irqsave(&state->card->lock, flags); 2396 trident_update_ptr(state); 2397 abinfo.fragsize = dmabuf->fragsize; 2398 abinfo.bytes = dmabuf->dmasize - dmabuf->count; 2399 abinfo.fragstotal = dmabuf->numfrag; 2400 abinfo.fragments = abinfo.bytes >> dmabuf->fragshift; 2401 spin_unlock_irqrestore(&state->card->lock, flags); 2402 ret = copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0; 2403 break; 2404 2405 case SNDCTL_DSP_GETISPACE: 2406 if (!(file->f_mode & FMODE_READ)) 2407 { 2408 ret = -EINVAL; 2409 break; 2410 } 2411 if (!dmabuf->ready && (val = prog_dmabuf(state, 1)) != 0) 2412 { 2413 ret = val; 2414 break; 2415 } 2416 spin_lock_irqsave(&state->card->lock, flags); 2417 trident_update_ptr(state); 2418 abinfo.fragsize = dmabuf->fragsize; 2419 abinfo.bytes = dmabuf->count; 2420 abinfo.fragstotal = dmabuf->numfrag; 2421 abinfo.fragments = abinfo.bytes >> dmabuf->fragshift; 2422 spin_unlock_irqrestore(&state->card->lock, flags); 2423 ret = copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0; 2424 break; 2425 2426 case SNDCTL_DSP_NONBLOCK: 2427 file->f_flags |= O_NONBLOCK; 2428 break; 2429 2430 case SNDCTL_DSP_GETCAPS: 2431 ret = put_user(DSP_CAP_REALTIME|DSP_CAP_TRIGGER|DSP_CAP_MMAP|DSP_CAP_BIND, 2432 (int *)arg); 2433 break; 2434 2435 case SNDCTL_DSP_GETTRIGGER: 2436 val = 0; 2437 if ((file->f_mode & FMODE_READ) && dmabuf->enable) 2438 val |= PCM_ENABLE_INPUT; 2439 if ((file->f_mode & FMODE_WRITE) && dmabuf->enable) 2440 val |= PCM_ENABLE_OUTPUT; 2441 ret = put_user(val, (int *)arg); 2442 break; 2443 2444 case SNDCTL_DSP_SETTRIGGER: 2445 if (get_user(val, (int *)arg)) 2446 { 2447 ret = -EFAULT; 2448 break; 2449 } 2450 if (file->f_mode & FMODE_READ) { 2451 if (val & PCM_ENABLE_INPUT) { 2452 if (!dmabuf->ready && (ret = prog_dmabuf(state, 1))) 2453 break; 2454 start_adc(state); 2455 } else 2456 stop_adc(state); 2457 } 2458 if (file->f_mode & FMODE_WRITE) { 2459 if (val & PCM_ENABLE_OUTPUT) { 2460 if (!dmabuf->ready && (ret = prog_dmabuf(state, 0))) 2461 break; 2462 start_dac(state); 2463 } else 2464 stop_dac(state); 2465 } 2466 break; 2467 2468 case SNDCTL_DSP_GETIPTR: 2469 if (!(file->f_mode & FMODE_READ)) 2470 { 2471 ret = -EINVAL; 2472 break; 2473 } 2474 if (!dmabuf->ready && (val = prog_dmabuf(state, 1)) != 0) 2475 { 2476 ret = val; 2477 break; 2478 } 2479 spin_lock_irqsave(&state->card->lock, flags); 2480 trident_update_ptr(state); 2481 cinfo.bytes = dmabuf->total_bytes; 2482 cinfo.blocks = dmabuf->count >> dmabuf->fragshift; 2483 cinfo.ptr = dmabuf->hwptr; 2484 if (dmabuf->mapped) 2485 dmabuf->count &= dmabuf->fragsize-1; 2486 spin_unlock_irqrestore(&state->card->lock, flags); 2487 ret = copy_to_user((void *)arg, &cinfo, sizeof(cinfo))?-EFAULT:0; 2488 break; 2489 2490 case SNDCTL_DSP_GETOPTR: 2491 if (!(file->f_mode & FMODE_WRITE)) 2492 { 2493 ret = -EINVAL; 2494 break; 2495 } 2496 if (!dmabuf->ready && (val = prog_dmabuf(state, 0)) != 0) 2497 { 2498 ret = val; 2499 break; 2500 } 2501 2502 spin_lock_irqsave(&state->card->lock, flags); 2503 trident_update_ptr(state); 2504 cinfo.bytes = dmabuf->total_bytes; 2505 cinfo.blocks = dmabuf->count >> dmabuf->fragshift; 2506 cinfo.ptr = dmabuf->hwptr; 2507 if (dmabuf->mapped) 2508 dmabuf->count &= dmabuf->fragsize-1; 2509 spin_unlock_irqrestore(&state->card->lock, flags); 2510 ret = copy_to_user((void *)arg, &cinfo, sizeof(cinfo))?-EFAULT:0; 2511 break; 2512 2513 case SNDCTL_DSP_SETDUPLEX: 2514 ret = -EINVAL; 2515 break; 2516 2517 case SNDCTL_DSP_GETODELAY: 2518 if (!(file->f_mode & FMODE_WRITE)) 2519 { 2520 ret = -EINVAL; 2521 break; 2522 } 2523 if (!dmabuf->ready && (val = prog_dmabuf(state, 0)) != 0) 2524 { 2525 ret = val; 2526 break; 2527 } 2528 spin_lock_irqsave(&state->card->lock, flags); 2529 trident_update_ptr(state); 2530 val = dmabuf->count; 2531 spin_unlock_irqrestore(&state->card->lock, flags); 2532 ret = put_user(val, (int *)arg); 2533 break; 2534 2535 case SOUND_PCM_READ_RATE: 2536 ret = put_user(dmabuf->rate, (int *)arg); 2537 break; 2538 2539 case SOUND_PCM_READ_CHANNELS: 2540 ret = put_user((dmabuf->fmt & TRIDENT_FMT_STEREO) ? 2 : 1, 2541 (int *)arg); 2542 break; 2543 2544 case SOUND_PCM_READ_BITS: 2545 ret = put_user((dmabuf->fmt & TRIDENT_FMT_16BIT) ? 2546 AFMT_S16_LE : AFMT_U8, (int *)arg); 2547 break; 2548 2549 case SNDCTL_DSP_GETCHANNELMASK: 2550 ret = put_user(DSP_BIND_FRONT|DSP_BIND_SURR|DSP_BIND_CENTER_LFE, 2551 (int *)arg); 2552 break; 2553 2554 case SNDCTL_DSP_BIND_CHANNEL: 2555 if (state->card->pci_id != PCI_DEVICE_ID_SI_7018) 2556 { 2557 ret = -EINVAL; 2558 break; 2559 } 2560 2561 if (get_user(val, (int *)arg)) 2562 { 2563 ret = -EFAULT; 2564 break; 2565 } 2566 if (val == DSP_BIND_QUERY) { 2567 val = dmabuf->channel->attribute | 0x3c00; 2568 val = attr2mask[val >> 8]; 2569 } else { 2570 dmabuf->ready = 0; 2571 if (file->f_mode & FMODE_READ) 2572 dmabuf->channel->attribute = (CHANNEL_REC|SRC_ENABLE); 2573 if (file->f_mode & FMODE_WRITE) 2574 dmabuf->channel->attribute = (CHANNEL_SPC_PB|SRC_ENABLE); 2575 dmabuf->channel->attribute |= mask2attr[ffs(val)]; 2576 } 2577 ret = put_user(val, (int *)arg); 2578 break; 2579 2580 case SNDCTL_DSP_MAPINBUF: 2581 case SNDCTL_DSP_MAPOUTBUF: 2582 case SNDCTL_DSP_SETSYNCRO: 2583 case SOUND_PCM_WRITE_FILTER: 2584 case SOUND_PCM_READ_FILTER: 2585 default: 2586 ret = -EINVAL; 2587 break; 2588 2589 } 2590 return ret; 2591} 2592 2593static int trident_open(struct inode *inode, struct file *file) 2594{ 2595 int i = 0; 2596 int minor = MINOR(inode->i_rdev); 2597 struct trident_card *card = devs; 2598 struct trident_state *state = NULL; 2599 struct dmabuf *dmabuf = NULL; 2600 2601 /* Added by Matt Wu 01-05-2001 */ 2602 if(file->f_mode & FMODE_READ) 2603 { 2604 if(card->pci_id == PCI_DEVICE_ID_ALI_5451) { 2605 if (card->multi_channel_use_count > 0) 2606 return -EBUSY; 2607 } 2608 } 2609 2610 /* find an available virtual channel (instance of /dev/dsp) */ 2611 while (card != NULL) { 2612 down(&card->open_sem); 2613 if(file->f_mode & FMODE_READ) 2614 { 2615 /* Skip opens on cards that are in 6 channel mode */ 2616 if (card->multi_channel_use_count > 0) 2617 { 2618 up(&card->open_sem); 2619 card = card->next; 2620 continue; 2621 } 2622 } 2623 for (i = 0; i < NR_HW_CH; i++) { 2624 if (card->states[i] == NULL) { 2625 state = card->states[i] = (struct trident_state *) 2626 kmalloc(sizeof(struct trident_state), GFP_KERNEL); 2627 if (state == NULL) { 2628 return -ENOMEM; 2629 } 2630 memset(state, 0, sizeof(struct trident_state)); 2631 init_MUTEX(&state->sem); 2632 dmabuf = &state->dmabuf; 2633 goto found_virt; 2634 } 2635 } 2636 up(&card->open_sem); 2637 card = card->next; 2638 } 2639 /* no more virtual channel avaiable */ 2640 if (!state) { 2641 return -ENODEV; 2642 } 2643 found_virt: 2644 /* found a free virtual channel, allocate hardware channels */ 2645 if(file->f_mode & FMODE_READ) 2646 dmabuf->channel = card->alloc_rec_pcm_channel(card); 2647 else 2648 dmabuf->channel = card->alloc_pcm_channel(card); 2649 2650 if (dmabuf->channel == NULL) { 2651 kfree (card->states[i]); 2652 card->states[i] = NULL; 2653 return -ENODEV; 2654 } 2655 2656 /* initialize the virtual channel */ 2657 state->virt = i; 2658 state->card = card; 2659 state->magic = TRIDENT_STATE_MAGIC; 2660 init_waitqueue_head(&dmabuf->wait); 2661 file->private_data = state; 2662 2663 /* set default sample format. According to OSS Programmer's Guide /dev/dsp 2664 should be default to unsigned 8-bits, mono, with sample rate 8kHz and 2665 /dev/dspW will accept 16-bits sample */ 2666 if (file->f_mode & FMODE_WRITE) { 2667 dmabuf->fmt &= ~TRIDENT_FMT_MASK; 2668 if ((minor & 0x0f) == SND_DEV_DSP16) 2669 dmabuf->fmt |= TRIDENT_FMT_16BIT; 2670 dmabuf->ossfragshift = 0; 2671 dmabuf->ossmaxfrags = 0; 2672 dmabuf->subdivision = 0; 2673 if (card->pci_id == PCI_DEVICE_ID_SI_7018) { 2674 /* set default channel attribute to normal playback */ 2675 dmabuf->channel->attribute = CHANNEL_PB; 2676 } 2677 trident_set_dac_rate(state, 8000); 2678 } 2679 2680 if (file->f_mode & FMODE_READ) { 2681 dmabuf->fmt &= ~TRIDENT_FMT_MASK; 2682 if ((minor & 0x0f) == SND_DEV_DSP16) 2683 dmabuf->fmt |= TRIDENT_FMT_16BIT; 2684 dmabuf->ossfragshift = 0; 2685 dmabuf->ossmaxfrags = 0; 2686 dmabuf->subdivision = 0; 2687 if (card->pci_id == PCI_DEVICE_ID_SI_7018) { 2688 /* set default channel attribute to 0x8a80, record from 2689 PCM L/R FIFO and mono = (left + right + 1)/2*/ 2690 dmabuf->channel->attribute = 2691 (CHANNEL_REC|PCM_LR|MONO_MIX); 2692 } 2693 trident_set_adc_rate(state, 8000); 2694 2695 /* Added by Matt Wu 01-05-2001 */ 2696 if(card->pci_id == PCI_DEVICE_ID_ALI_5451) 2697 card->rec_channel_use_count ++; 2698 } 2699 2700 state->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE); 2701 up(&card->open_sem); 2702 2703 TRDBG("trident: open virtual channel %d, hard channel %d\n", 2704 state->virt, dmabuf->channel->num); 2705 2706 return 0; 2707} 2708 2709static int trident_release(struct inode *inode, struct file *file) 2710{ 2711 struct trident_state *state = (struct trident_state *)file->private_data; 2712 struct trident_card *card; 2713 struct dmabuf *dmabuf; 2714 2715 lock_kernel(); 2716 card = state->card; 2717 dmabuf = &state->dmabuf; 2718 VALIDATE_STATE(state); 2719 2720 if (file->f_mode & FMODE_WRITE) { 2721 trident_clear_tail(state); 2722 drain_dac(state, file->f_flags & O_NONBLOCK); 2723 } 2724 2725 TRDBG("trident: closing virtual channel %d, hard channel %d\n", 2726 state->virt, dmabuf->channel->num); 2727 2728 /* stop DMA state machine and free DMA buffers/channels */ 2729 down(&card->open_sem); 2730 2731 if (file->f_mode & FMODE_WRITE) { 2732 stop_dac(state); 2733 dealloc_dmabuf(&state->dmabuf, state->card->pci_dev); 2734 state->card->free_pcm_channel(state->card, dmabuf->channel->num); 2735 2736 /* Added by Matt Wu */ 2737 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) { 2738 if (state->chans_num > 2) { 2739 if (card->multi_channel_use_count-- < 0) 2740 card->multi_channel_use_count = 0; 2741 if (card->multi_channel_use_count == 0) 2742 ali_close_multi_channels(); 2743 ali_free_other_states_resources(state); 2744 } 2745 } 2746 } 2747 if (file->f_mode & FMODE_READ) { 2748 stop_adc(state); 2749 dealloc_dmabuf(&state->dmabuf, state->card->pci_dev); 2750 state->card->free_pcm_channel(state->card, dmabuf->channel->num); 2751 2752 /* Added by Matt Wu */ 2753 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) { 2754 if( card->rec_channel_use_count-- < 0 ) 2755 card->rec_channel_use_count = 0; 2756 } 2757 } 2758 2759 card->states[state->virt] = NULL; 2760 kfree(state); 2761 2762 /* we're covered by the open_sem */ 2763 up(&card->open_sem); 2764 unlock_kernel(); 2765 2766 return 0; 2767} 2768 2769static /*const*/ struct file_operations trident_audio_fops = { 2770 owner: THIS_MODULE, 2771 llseek: no_llseek, 2772 read: trident_read, 2773 write: trident_write, 2774 poll: trident_poll, 2775 ioctl: trident_ioctl, 2776 mmap: trident_mmap, 2777 open: trident_open, 2778 release: trident_release, 2779}; 2780 2781/* trident specific AC97 functions */ 2782/* Write AC97 codec registers */ 2783static void trident_ac97_set(struct ac97_codec *codec, u8 reg, u16 val) 2784{ 2785 struct trident_card *card = (struct trident_card *)codec->private_data; 2786 unsigned int address, mask, busy; 2787 unsigned short count = 0xffff; 2788 unsigned long flags; 2789 u32 data; 2790 2791 data = ((u32) val) << 16; 2792 2793 switch (card->pci_id) 2794 { 2795 default: 2796 case PCI_DEVICE_ID_SI_7018: 2797 address = SI_AC97_WRITE; 2798 mask = SI_AC97_BUSY_WRITE | SI_AC97_AUDIO_BUSY; 2799 if (codec->id) 2800 mask |= SI_AC97_SECONDARY; 2801 busy = SI_AC97_BUSY_WRITE; 2802 break; 2803 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX: 2804 address = DX_ACR0_AC97_W; 2805 mask = busy = DX_AC97_BUSY_WRITE; 2806 break; 2807 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX: 2808 address = NX_ACR1_AC97_W; 2809 mask = NX_AC97_BUSY_WRITE; 2810 if (codec->id) 2811 mask |= NX_AC97_WRITE_SECONDARY; 2812 busy = NX_AC97_BUSY_WRITE; 2813 break; 2814 case PCI_DEVICE_ID_INTERG_5050: 2815 address = SI_AC97_WRITE; 2816 mask = busy = SI_AC97_BUSY_WRITE; 2817 if (codec->id) 2818 mask |= SI_AC97_SECONDARY; 2819 break; 2820 } 2821 2822 spin_lock_irqsave(&card->lock, flags); 2823 do { 2824 if ((inw(TRID_REG(card, address)) & busy) == 0) 2825 break; 2826 } while (count--); 2827 2828 2829 data |= (mask | (reg & AC97_REG_ADDR)); 2830 2831 if (count == 0) { 2832 printk(KERN_ERR "trident: AC97 CODEC write timed out.\n"); 2833 spin_unlock_irqrestore(&card->lock, flags); 2834 return; 2835 } 2836 2837 outl(data, TRID_REG(card, address)); 2838 spin_unlock_irqrestore(&card->lock, flags); 2839} 2840 2841/* Read AC97 codec registers */ 2842static u16 trident_ac97_get(struct ac97_codec *codec, u8 reg) 2843{ 2844 struct trident_card *card = (struct trident_card *)codec->private_data; 2845 unsigned int address, mask, busy; 2846 unsigned short count = 0xffff; 2847 unsigned long flags; 2848 u32 data; 2849 2850 switch (card->pci_id) 2851 { 2852 default: 2853 case PCI_DEVICE_ID_SI_7018: 2854 address = SI_AC97_READ; 2855 mask = SI_AC97_BUSY_READ | SI_AC97_AUDIO_BUSY; 2856 if (codec->id) 2857 mask |= SI_AC97_SECONDARY; 2858 busy = SI_AC97_BUSY_READ; 2859 break; 2860 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX: 2861 address = DX_ACR1_AC97_R; 2862 mask = busy = DX_AC97_BUSY_READ; 2863 break; 2864 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX: 2865 if (codec->id) 2866 address = NX_ACR3_AC97_R_SECONDARY; 2867 else 2868 address = NX_ACR2_AC97_R_PRIMARY; 2869 mask = NX_AC97_BUSY_READ; 2870 busy = NX_AC97_BUSY_READ | NX_AC97_BUSY_DATA; 2871 break; 2872 case PCI_DEVICE_ID_INTERG_5050: 2873 address = SI_AC97_READ; 2874 mask = busy = SI_AC97_BUSY_READ; 2875 if (codec->id) 2876 mask |= SI_AC97_SECONDARY; 2877 break; 2878 } 2879 2880 data = (mask | (reg & AC97_REG_ADDR)); 2881 2882 spin_lock_irqsave(&card->lock, flags); 2883 outl(data, TRID_REG(card, address)); 2884 do { 2885 data = inl(TRID_REG(card, address)); 2886 if ((data & busy) == 0) 2887 break; 2888 } while (count--); 2889 spin_unlock_irqrestore(&card->lock, flags); 2890 2891 if (count == 0) { 2892 printk(KERN_ERR "trident: AC97 CODEC read timed out.\n"); 2893 data = 0; 2894 } 2895 return ((u16) (data >> 16)); 2896} 2897 2898/* rewrite ac97 read and write mixer register by hulei for ALI*/ 2899static int acquirecodecaccess(struct trident_card *card) 2900{ 2901 u16 wsemamask=0x6000; /* bit 14..13 */ 2902 u16 wsemabits; 2903 u16 wcontrol ; 2904 int block = 0; 2905 int ncount = 25; 2906 while (1) { 2907 wcontrol = inw(TRID_REG(card, ALI_AC97_WRITE)); 2908 wsemabits = wcontrol & wsemamask; 2909 2910 if (wsemabits==0x4000) 2911 return 1; /* 0x4000 is audio ,then success */ 2912 if (ncount-- < 0) 2913 break; 2914 if (wsemabits == 0) 2915 { 2916 unlock: 2917 outl(((u32)(wcontrol & 0x1eff)|0x00004000), TRID_REG(card, ALI_AC97_WRITE)); 2918 continue; 2919 } 2920 udelay(20); 2921 } 2922 if(!block) 2923 { 2924 TRDBG("accesscodecsemaphore: try unlock\n"); 2925 block = 1; 2926 goto unlock; 2927 } 2928 printk(KERN_ERR "accesscodecsemaphore: fail\n"); 2929 return 0; 2930} 2931 2932static void releasecodecaccess(struct trident_card *card) 2933{ 2934 unsigned long wcontrol; 2935 wcontrol = inl(TRID_REG(card, ALI_AC97_WRITE)); 2936 outl((wcontrol & 0xffff1eff), TRID_REG(card, ALI_AC97_WRITE)); 2937} 2938 2939static int waitforstimertick(struct trident_card *card) 2940{ 2941 unsigned long chk1, chk2; 2942 unsigned int wcount = 0xffff; 2943 chk1 = inl(TRID_REG(card, ALI_STIMER)); 2944 2945 while(1) { 2946 chk2 = inl(TRID_REG(card, ALI_STIMER)); 2947 if( (wcount > 0) && chk1 != chk2) 2948 return 1; 2949 if(wcount <= 0) 2950 break; 2951 udelay(50); 2952 } 2953 2954 printk(KERN_NOTICE "waitforstimertick :BIT_CLK is dead\n"); 2955 return 0; 2956} 2957 2958/* Read AC97 codec registers for ALi*/ 2959static u16 ali_ac97_get(struct trident_card *card, int secondary, u8 reg) 2960{ 2961 unsigned int address, mask; 2962 unsigned int ncount; 2963 unsigned long aud_reg; 2964 u32 data; 2965 u16 wcontrol; 2966 2967 if(!card) 2968 BUG(); 2969 2970 address = ALI_AC97_READ; 2971 if (card->revision == ALI_5451_V02) { 2972 address = ALI_AC97_WRITE; 2973 } 2974 mask = ALI_AC97_READ_ACTION | ALI_AC97_AUDIO_BUSY; 2975 if (secondary) 2976 mask |= ALI_AC97_SECONDARY; 2977 2978 if (!acquirecodecaccess(card)) 2979 printk(KERN_ERR "access codec fail\n"); 2980 2981 wcontrol = inw(TRID_REG(card, ALI_AC97_WRITE)); 2982 wcontrol &= 0xfe00; 2983 wcontrol |= (0x8000|reg); 2984 outw(wcontrol,TRID_REG(card, ALI_AC97_WRITE)); 2985 2986 data = (mask | (reg & AC97_REG_ADDR)); 2987 2988 if(!waitforstimertick(card)) { 2989 printk(KERN_ERR "BIT_CLOCK is dead\n"); 2990 goto releasecodec; 2991 } 2992 2993 udelay(20); 2994 2995 ncount=10; 2996 2997 while(1) { 2998 if ((inw(TRID_REG(card,ALI_AC97_WRITE)) & ALI_AC97_BUSY_READ) != 0) 2999 break; 3000 if(ncount <=0) 3001 break; 3002 if(ncount--==1) { 3003 TRDBG("ali_ac97_read :try clear busy flag\n"); 3004 aud_reg = inl(TRID_REG(card, ALI_AC97_WRITE)); 3005 outl((aud_reg & 0xffff7fff), TRID_REG(card, ALI_AC97_WRITE)); 3006 } 3007 udelay(10); 3008 } 3009 3010 data = inl(TRID_REG(card, address)); 3011 3012 return ((u16) (data >> 16)); 3013 3014 releasecodec: 3015 releasecodecaccess(card); 3016 printk(KERN_ERR "ali: AC97 CODEC read timed out.\n"); 3017 return 0; 3018} 3019 3020 3021/* Write AC97 codec registers for hulei*/ 3022static void ali_ac97_set(struct trident_card *card, int secondary, u8 reg, u16 val) 3023{ 3024 unsigned int address, mask; 3025 unsigned int ncount; 3026 u32 data; 3027 u16 wcontrol; 3028 3029 data = ((u32) val) << 16; 3030 3031 if(!card) 3032 BUG(); 3033 3034 address = ALI_AC97_WRITE; 3035 mask = ALI_AC97_WRITE_ACTION | ALI_AC97_AUDIO_BUSY; 3036 if (secondary) 3037 mask |= ALI_AC97_SECONDARY; 3038 if (card->revision == ALI_5451_V02) 3039 mask |= ALI_AC97_WRITE_MIXER_REGISTER; 3040 3041 if (!acquirecodecaccess(card)) 3042 printk(KERN_ERR "access codec fail\n"); 3043 3044 wcontrol = inw(TRID_REG(card, ALI_AC97_WRITE)); 3045 wcontrol &= 0xff00; 3046 wcontrol |= (0x8100|reg);/* bit 8=1: (ali1535 )reserved /ali1535+ write */ 3047 outl(( data |wcontrol), TRID_REG(card,ALI_AC97_WRITE )); 3048 3049 if(!waitforstimertick(card)) { 3050 printk(KERN_ERR "BIT_CLOCK is dead\n"); 3051 goto releasecodec; 3052 } 3053 3054 ncount = 10; 3055 while(1) { 3056 wcontrol = inw(TRID_REG(card, ALI_AC97_WRITE)); 3057 if(!wcontrol & 0x8000) 3058 break; 3059 if(ncount <= 0) 3060 break; 3061 if(ncount-- == 1) { 3062 TRDBG("ali_ac97_set :try clear busy flag!!\n"); 3063 outw(wcontrol & 0x7fff, TRID_REG(card, ALI_AC97_WRITE)); 3064 } 3065 udelay(10); 3066 } 3067 3068 releasecodec: 3069 releasecodecaccess(card); 3070 return; 3071} 3072 3073static void ali_enable_special_channel(struct trident_state *stat) 3074{ 3075 struct trident_card *card = stat->card; 3076 unsigned long s_channels; 3077 3078 s_channels = inl(TRID_REG(card, ALI_GLOBAL_CONTROL)); 3079 s_channels |= (1<<stat->dmabuf.channel->num); 3080 outl(s_channels, TRID_REG(card, ALI_GLOBAL_CONTROL)); 3081} 3082 3083static u16 ali_ac97_read(struct ac97_codec *codec, u8 reg) 3084{ 3085 int id; 3086 u16 data; 3087 struct trident_card *card = NULL; 3088 3089 /* Added by Matt Wu */ 3090 if (!codec) 3091 BUG(); 3092 3093 card = (struct trident_card *)codec->private_data; 3094 3095 if(!card->mixer_regs_ready) 3096 return ali_ac97_get(card, codec->id, reg); 3097 3098 if(codec->id) 3099 id = 1; 3100 else 3101 id = 0; 3102 3103 data = card->mixer_regs[reg/2][id]; 3104 return data; 3105} 3106 3107static void ali_ac97_write(struct ac97_codec *codec, u8 reg, u16 val) 3108{ 3109 int id; 3110 struct trident_card *card; 3111 3112 /* Added by Matt Wu */ 3113 if (!codec) 3114 BUG(); 3115 3116 card = (struct trident_card *)codec->private_data; 3117 3118 if (!card->mixer_regs_ready) 3119 { 3120 ali_ac97_set(card, codec->id, reg, val); 3121 return; 3122 } 3123 3124 if(codec->id) 3125 id = 1; 3126 else 3127 id = 0; 3128 3129 card->mixer_regs[reg/2][id] = val; 3130 ali_ac97_set(card, codec->id, reg, val); 3131} 3132 3133/* 3134flag: ALI_SPDIF_OUT_TO_SPDIF_OUT 3135 ALI_PCM_TO_SPDIF_OUT 3136*/ 3137 3138static void ali_setup_spdif_out(struct trident_card *card, int flag) 3139{ 3140 unsigned long spdif; 3141 unsigned char ch; 3142 3143 char temp; 3144 struct pci_dev *pci_dev = NULL; 3145 3146 pci_dev = pci_find_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, pci_dev); 3147 if (pci_dev == NULL) 3148 return; 3149 pci_read_config_byte(pci_dev, 0x61, &temp); 3150 temp |= 0x40; 3151 pci_write_config_byte(pci_dev, 0x61, temp); 3152 pci_read_config_byte(pci_dev, 0x7d, &temp); 3153 temp |= 0x01; 3154 pci_write_config_byte(pci_dev, 0x7d, temp); 3155 pci_read_config_byte(pci_dev, 0x7e, &temp); 3156 temp &= (~0x20); 3157 temp |= 0x10; 3158 pci_write_config_byte(pci_dev, 0x7e, temp); 3159 3160 ch = inb(TRID_REG(card, ALI_SCTRL)); 3161 outb(ch | ALI_SPDIF_OUT_ENABLE, TRID_REG(card, ALI_SCTRL)); 3162 ch = inb(TRID_REG(card, ALI_SPDIF_CTRL)); 3163 outb(ch & ALI_SPDIF_OUT_CH_STATUS, TRID_REG(card, ALI_SPDIF_CTRL)); 3164 3165 if (flag & ALI_SPDIF_OUT_TO_SPDIF_OUT) { 3166 spdif = inw(TRID_REG(card, ALI_GLOBAL_CONTROL)); 3167 spdif |= ALI_SPDIF_OUT_CH_ENABLE; 3168 spdif &= ALI_SPDIF_OUT_SEL_SPDIF; 3169 outw(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL)); 3170 spdif = inw(TRID_REG(card, ALI_SPDIF_CS)); 3171 if (flag & ALI_SPDIF_OUT_NON_PCM) 3172 spdif |= 0x0002; 3173 else spdif &= (~0x0002); 3174 outw(spdif, TRID_REG(card, ALI_SPDIF_CS)); 3175 } 3176 else { 3177 spdif = inw(TRID_REG(card, ALI_GLOBAL_CONTROL)); 3178 spdif |= ALI_SPDIF_OUT_SEL_PCM; 3179 outw(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL)); 3180 } 3181} 3182 3183static void ali_disable_special_channel(struct trident_card *card, int ch) 3184{ 3185 unsigned long sc; 3186 3187 sc = inl(TRID_REG(card, ALI_GLOBAL_CONTROL)); 3188 sc &= ~(1 << ch); 3189 outl(sc, TRID_REG(card, ALI_GLOBAL_CONTROL)); 3190} 3191 3192static void ali_disable_spdif_in(struct trident_card *card) 3193{ 3194 unsigned long spdif; 3195 3196 spdif = inl(TRID_REG(card, ALI_GLOBAL_CONTROL)); 3197 spdif &= (~ALI_SPDIF_IN_SUPPORT); 3198 outl(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL)); 3199 3200 ali_disable_special_channel(card, ALI_SPDIF_IN_CHANNEL); 3201} 3202 3203static void ali_setup_spdif_in(struct trident_card *card) 3204{ 3205 unsigned long spdif; 3206 3207 //Set SPDIF IN Supported 3208 spdif = inl(TRID_REG(card, ALI_GLOBAL_CONTROL)); 3209 spdif |= ALI_SPDIF_IN_SUPPORT; 3210 outl(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL)); 3211 3212 //Set SPDIF IN Rec 3213 spdif = inl(TRID_REG(card, ALI_GLOBAL_CONTROL)); 3214 spdif |= ALI_SPDIF_IN_CH_ENABLE; 3215 outl(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL)); 3216 3217 spdif = inb(TRID_REG(card, ALI_SPDIF_CTRL)); 3218 spdif |= ALI_SPDIF_IN_CH_STATUS; 3219 outb(spdif, TRID_REG(card, ALI_SPDIF_CTRL)); 3220/* 3221 spdif = inb(TRID_REG(card, ALI_SPDIF_CTRL)); 3222 spdif |= ALI_SPDIF_IN_FUNC_ENABLE; 3223 outb(spdif, TRID_REG(card, ALI_SPDIF_CTRL)); 3224*/ 3225} 3226 3227static void ali_delay(struct trident_card *card,int interval) 3228{ 3229 unsigned long begintimer,currenttimer; 3230 3231 begintimer = inl(TRID_REG(card, ALI_STIMER)); 3232 currenttimer = inl(TRID_REG(card, ALI_STIMER)); 3233 3234 while (currenttimer < begintimer + interval) 3235 currenttimer = inl(TRID_REG(card, ALI_STIMER)); 3236} 3237 3238static void ali_detect_spdif_rate(struct trident_card *card) 3239{ 3240 u16 wval = 0; 3241 u16 count = 0; 3242 u8 bval = 0, R1 = 0, R2 = 0; 3243 3244 bval = inb(TRID_REG(card,ALI_SPDIF_CTRL)); 3245 bval |= 0x02; 3246 outb(bval,TRID_REG(card,ALI_SPDIF_CTRL)); 3247 3248 bval = inb(TRID_REG(card,ALI_SPDIF_CTRL + 1)); 3249 bval |= 0x1F; 3250 outb(bval,TRID_REG(card,ALI_SPDIF_CTRL + 1)); 3251 3252 while (((R1 < 0x0B )||(R1 > 0x0E)) && (R1 != 0x12) && count <= 50000) 3253 { 3254 count ++; 3255 3256 ali_delay(card, 6); 3257 3258 bval = inb(TRID_REG(card,ALI_SPDIF_CTRL + 1)); 3259 R1 = bval & 0x1F; 3260 } 3261 3262 if (count > 50000) 3263 { 3264 printk(KERN_WARNING "trident: Error in ali_detect_spdif_rate!\n"); 3265 return; 3266 } 3267 3268 count = 0; 3269 3270 while (count <= 50000) 3271 { 3272 count ++; 3273 3274 ali_delay(card, 6); 3275 3276 bval = inb(TRID_REG(card,ALI_SPDIF_CTRL + 1)); 3277 R2 = bval & 0x1F; 3278 3279 if(R2 != R1) 3280 R1 = R2; 3281 else 3282 break; 3283 } 3284 3285 if (count > 50000) 3286 { 3287 printk(KERN_WARNING "trident: Error in ali_detect_spdif_rate!\n"); 3288 return; 3289 } 3290 3291 switch (R2) 3292 { 3293 case 0x0b: 3294 case 0x0c: 3295 case 0x0d: 3296 case 0x0e: 3297 wval = inw(TRID_REG(card,ALI_SPDIF_CTRL + 2)); 3298 wval &= 0xE0F0; 3299 wval |= (u16)0x09 << 8 | (u16)0x05; 3300 outw(wval,TRID_REG(card,ALI_SPDIF_CTRL + 2)); 3301 3302 bval = inb(TRID_REG(card,ALI_SPDIF_CS +3)) & 0xF0; 3303 outb(bval|0x02,TRID_REG(card,ALI_SPDIF_CS + 3)); 3304 break; 3305 3306 case 0x12: 3307 wval = inw(TRID_REG(card,ALI_SPDIF_CTRL + 2)); 3308 wval &= 0xE0F0; 3309 wval |= (u16)0x0E << 8 | (u16)0x08; 3310 outw(wval,TRID_REG(card,ALI_SPDIF_CTRL + 2)); 3311 3312 bval = inb(TRID_REG(card,ALI_SPDIF_CS +3)) & 0xF0; 3313 outb(bval|0x03,TRID_REG(card,ALI_SPDIF_CS + 3)); 3314 break; 3315 3316 default: 3317 break; 3318 } 3319 3320} 3321 3322static unsigned int ali_get_spdif_in_rate(struct trident_card *card) 3323{ 3324 u32 dwRate = 0; 3325 u8 bval = 0; 3326 3327 ali_detect_spdif_rate(card); 3328 3329 bval = inb(TRID_REG(card,ALI_SPDIF_CTRL)); 3330 bval &= 0x7F; 3331 bval |= 0x40; 3332 outb(bval,TRID_REG(card,ALI_SPDIF_CTRL)); 3333 3334 bval = inb(TRID_REG(card,ALI_SPDIF_CS + 3)); 3335 bval &= 0x0F; 3336 3337 switch (bval) 3338 { 3339 case 0: 3340 dwRate = 44100; 3341 break; 3342 case 1: 3343 dwRate = 48000; 3344 break; 3345 case 2: 3346 dwRate = 32000; 3347 break; 3348 default: 3349 // Error occurs 3350 break; 3351 } 3352 3353 return dwRate; 3354 3355} 3356 3357static int ali_close_multi_channels(void) 3358{ 3359 char temp = 0; 3360 struct pci_dev *pci_dev = NULL; 3361 3362 pci_dev = pci_find_device(PCI_VENDOR_ID_AL,PCI_DEVICE_ID_AL_M1533, pci_dev); 3363 if (pci_dev == NULL) 3364 return -1; 3365 temp = 0x80; 3366 pci_write_config_byte(pci_dev, 0x59, ~temp); 3367 3368 pci_dev = pci_find_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101, pci_dev); 3369 if (pci_dev == NULL) 3370 return -1; 3371 3372 temp = 0x20; 3373 pci_write_config_byte(pci_dev, 0xB8, ~temp); 3374 3375 return 0; 3376} 3377 3378static int ali_setup_multi_channels(struct trident_card *card, int chan_nums) 3379{ 3380 unsigned long dwValue; 3381 char temp = 0; 3382 struct pci_dev *pci_dev = NULL; 3383 3384 pci_dev = pci_find_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, pci_dev); 3385 if (pci_dev == NULL) 3386 return -1; 3387 temp = 0x80; 3388 pci_write_config_byte(pci_dev, 0x59, temp); 3389 3390 pci_dev = pci_find_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101, pci_dev); 3391 if (pci_dev == NULL) 3392 return -1; 3393 temp = 0x20; 3394 pci_write_config_byte(pci_dev, (int)0xB8,(u8) temp); 3395 if (chan_nums == 6) { 3396 dwValue = inl(TRID_REG(card, ALI_SCTRL)) | 0x000f0000; 3397 outl(dwValue, TRID_REG(card, ALI_SCTRL)); 3398 mdelay(4); 3399 dwValue = inl(TRID_REG(card, ALI_SCTRL)); 3400 if (dwValue & 0x2000000) { 3401 ali_ac97_write(card->ac97_codec[0], 0x02, 8080); 3402 ali_ac97_write(card->ac97_codec[0], 0x36, 0); 3403 ali_ac97_write(card->ac97_codec[0], 0x38, 0); 3404 /* 3405 * On a board with a single codec you won't get the 3406 * surround. On other boards configure it. 3407 */ 3408 if(card->ac97_codec[1]!=NULL) 3409 { 3410 ali_ac97_write(card->ac97_codec[1], 0x36, 0); 3411 ali_ac97_write(card->ac97_codec[1], 0x38, 0); 3412 ali_ac97_write(card->ac97_codec[1], 0x02, 0x0606); 3413 ali_ac97_write(card->ac97_codec[1], 0x18, 0x0303); 3414 ali_ac97_write(card->ac97_codec[1], 0x74, 0x3); 3415 } 3416 return 1; 3417 } 3418 } 3419 return -EINVAL; 3420} 3421 3422static void ali_free_pcm_channel(struct trident_card *card, unsigned int channel) 3423{ 3424 int bank; 3425 3426 if (channel > 31) 3427 return; 3428 3429 bank = channel >> 5; 3430 channel = channel & 0x1f; 3431 3432 card->banks[bank].bitmap &= ~(1 << (channel)); 3433} 3434 3435static int ali_allocate_other_states_resources(struct trident_state *state, int chan_nums) 3436{ 3437 struct trident_card *card = state->card; 3438 struct trident_state *s; 3439 int i, state_count = 0; 3440 struct trident_pcm_bank *bank; 3441 struct trident_channel *channel; 3442 3443 bank = &card->banks[BANK_A]; 3444 3445 if (chan_nums == 6) { 3446 for(i = 0;(i < ALI_CHANNELS) && (state_count != 4); i++) { 3447 if (!card->states[i]) { 3448 if (!(bank->bitmap & (1 << ali_multi_channels_5_1[state_count]))) { 3449 bank->bitmap |= (1 << ali_multi_channels_5_1[state_count]); 3450 channel = &bank->channels[ali_multi_channels_5_1[state_count]]; 3451 channel->num = ali_multi_channels_5_1[state_count]; 3452 } 3453 else { 3454 state_count--; 3455 for (; state_count >= 0; state_count--) { 3456 kfree(state->other_states[state_count]); 3457 ali_free_pcm_channel(card, ali_multi_channels_5_1[state_count]); 3458 } 3459 return -EBUSY; 3460 } 3461 s = card->states[i] = (struct trident_state *) 3462 kmalloc(sizeof(struct trident_state), GFP_KERNEL); 3463 if (!s) { 3464 ali_free_pcm_channel(card, ali_multi_channels_5_1[state_count]); 3465 state_count--; 3466 for (; state_count >= 0; state_count--) { 3467 ali_free_pcm_channel(card, ali_multi_channels_5_1[state_count]); 3468 kfree(state->other_states[state_count]); 3469 } 3470 return -ENOMEM; 3471 } 3472 memset(s, 0, sizeof(struct trident_state)); 3473 3474 s->dmabuf.channel = channel; 3475 s->dmabuf.ossfragshift = s->dmabuf.ossmaxfrags = s->dmabuf.subdivision = 0; 3476 init_waitqueue_head(&s->dmabuf.wait); 3477 s->magic = card->magic; 3478 s->card = card; 3479 s->virt = i; 3480 ali_enable_special_channel(s); 3481 state->other_states[state_count++] = s; 3482 } 3483 } 3484 3485 if (state_count != 4) { 3486 state_count--; 3487 for (; state_count >= 0; state_count--) { 3488 kfree(state->other_states[state_count]); 3489 ali_free_pcm_channel(card, ali_multi_channels_5_1[state_count]); 3490 } 3491 return -EBUSY; 3492 } 3493 } 3494 return 0; 3495} 3496 3497static void ali_save_regs(struct trident_card *card) 3498{ 3499 unsigned long flags; 3500 int i, j; 3501 3502 save_flags(flags); 3503 cli(); 3504 3505 ali_registers.global_regs[0x2c] = inl(TRID_REG(card,T4D_MISCINT)); 3506 //ali_registers.global_regs[0x20] = inl(TRID_REG(card,T4D_START_A)); 3507 ali_registers.global_regs[0x21] = inl(TRID_REG(card,T4D_STOP_A)); 3508 3509 //disable all IRQ bits 3510 outl(ALI_DISABLE_ALL_IRQ, TRID_REG(card, T4D_MISCINT)); 3511 3512 for (i = 1; i < ALI_MIXER_REGS; i++) 3513 ali_registers.mixer_regs[i] = ali_ac97_read (card->ac97_codec[0], i*2); 3514 3515 for (i = 0; i < ALI_GLOBAL_REGS; i++) 3516 { 3517 if ((i*4 == T4D_MISCINT) || (i*4 == T4D_STOP_A)) 3518 continue; 3519 ali_registers.global_regs[i] = inl(TRID_REG(card, i*4)); 3520 } 3521 3522 for (i = 0; i < ALI_CHANNELS; i++) 3523 { 3524 outb(i,TRID_REG(card, T4D_LFO_GC_CIR)); 3525 for (j = 0; j < ALI_CHANNEL_REGS; j++) 3526 ali_registers.channel_regs[i][j] = inl(TRID_REG(card, j*4 + 0xe0)); 3527 } 3528 3529 //Stop all HW channel 3530 outl(ALI_STOP_ALL_CHANNELS, TRID_REG(card, T4D_STOP_A)); 3531 3532 restore_flags(flags); 3533} 3534 3535static void ali_restore_regs(struct trident_card *card) 3536{ 3537 unsigned long flags; 3538 int i, j; 3539 3540 save_flags(flags); 3541 cli(); 3542 3543 for (i = 1; i < ALI_MIXER_REGS; i++) 3544 ali_ac97_write(card->ac97_codec[0], i*2, ali_registers.mixer_regs[i]); 3545 3546 for (i = 0; i < ALI_CHANNELS; i++) 3547 { 3548 outb(i,TRID_REG(card, T4D_LFO_GC_CIR)); 3549 for (j = 0; j < ALI_CHANNEL_REGS; j++) 3550 outl(ali_registers.channel_regs[i][j], TRID_REG(card, j*4 + 0xe0)); 3551 } 3552 3553 for (i = 0; i < ALI_GLOBAL_REGS; i++) 3554 { 3555 if ((i*4 == T4D_MISCINT) || (i*4 == T4D_STOP_A) || (i*4 == T4D_START_A)) 3556 continue; 3557 outl(ali_registers.global_regs[i], TRID_REG(card, i*4)); 3558 } 3559 3560 //start HW channel 3561 outl(ali_registers.global_regs[0x20], TRID_REG(card,T4D_START_A)); 3562 //restore IRQ enable bits 3563 outl(ali_registers.global_regs[0x2c], TRID_REG(card,T4D_MISCINT)); 3564 3565 restore_flags(flags); 3566} 3567 3568static int trident_suspend(struct pci_dev *dev, u32 unused) 3569{ 3570 struct trident_card *card = pci_get_drvdata(dev); 3571 3572 if(card->pci_id == PCI_DEVICE_ID_ALI_5451) { 3573 ali_save_regs(card); 3574 } 3575 return 0; 3576} 3577 3578static int trident_resume(struct pci_dev *dev) 3579{ 3580 struct trident_card *card = pci_get_drvdata(dev); 3581 3582 if(card->pci_id == PCI_DEVICE_ID_ALI_5451) { 3583 ali_restore_regs(card); 3584 } 3585 return 0; 3586} 3587 3588static struct trident_channel *ali_alloc_pcm_channel(struct trident_card *card) 3589{ 3590 struct trident_pcm_bank *bank; 3591 int idx; 3592 3593 bank = &card->banks[BANK_A]; 3594 3595 if (inl(TRID_REG(card, ALI_GLOBAL_CONTROL)) & (ALI_SPDIF_OUT_CH_ENABLE)) { 3596 idx = ALI_SPDIF_OUT_CHANNEL; 3597 if (!(bank->bitmap & (1 << idx))) { 3598 struct trident_channel *channel = &bank->channels[idx]; 3599 bank->bitmap |= 1 << idx; 3600 channel->num = idx; 3601 return channel; 3602 } 3603 } 3604 3605 for (idx = ALI_PCM_OUT_CHANNEL_FIRST; idx <= ALI_PCM_OUT_CHANNEL_LAST ; idx++) { 3606 if (!(bank->bitmap & (1 << idx))) { 3607 struct trident_channel *channel = &bank->channels[idx]; 3608 bank->bitmap |= 1 << idx; 3609 channel->num = idx; 3610 return channel; 3611 } 3612 } 3613 3614 /* no more free channels avaliable */ 3615// printk(KERN_ERR "ali: no more channels available on Bank A.\n"); 3616 return NULL; 3617} 3618 3619static struct trident_channel *ali_alloc_rec_pcm_channel(struct trident_card *card) 3620{ 3621 struct trident_pcm_bank *bank; 3622 int idx; 3623 3624 if (inl(TRID_REG(card, ALI_GLOBAL_CONTROL)) & ALI_SPDIF_IN_SUPPORT) 3625 idx = ALI_SPDIF_IN_CHANNEL; 3626 else idx = ALI_PCM_IN_CHANNEL; 3627 3628 bank = &card->banks[BANK_A]; 3629 3630 if (!(bank->bitmap & (1 << idx))) { 3631 struct trident_channel *channel = &bank->channels[idx]; 3632 bank->bitmap |= 1 << idx; 3633 channel->num = idx; 3634 return channel; 3635 } 3636 3637 /* no free recordable channels avaliable */ 3638// printk(KERN_ERR "ali: no recordable channels available on Bank A.\n"); 3639 return NULL; 3640} 3641 3642static void ali_set_spdif_out_rate(struct trident_card *card, unsigned int rate) 3643{ 3644 unsigned char ch_st_sel; 3645 unsigned short status_rate; 3646 3647 switch(rate) { 3648 case 44100: 3649 status_rate = 0; 3650 break; 3651 case 32000: 3652 status_rate = 0x300; 3653 break; 3654 case 48000: 3655 default: 3656 status_rate = 0x200; 3657 break; 3658 } 3659 3660 ch_st_sel = inb(TRID_REG(card, ALI_SPDIF_CTRL)) & ALI_SPDIF_OUT_CH_STATUS; //select spdif_out 3661 3662 ch_st_sel |= 0x80; //select right 3663 outb(ch_st_sel, TRID_REG(card, ALI_SPDIF_CTRL)); 3664 outb(status_rate | 0x20, TRID_REG(card, ALI_SPDIF_CS + 2)); 3665 3666 ch_st_sel &= (~0x80); //select left 3667 outb(ch_st_sel, TRID_REG(card, ALI_SPDIF_CTRL)); 3668 outw(status_rate | 0x10, TRID_REG(card, ALI_SPDIF_CS + 2)); 3669} 3670 3671static void ali_address_interrupt(struct trident_card *card) 3672{ 3673 int i, channel; 3674 struct trident_state *state; 3675 u32 mask, channel_mask; 3676 3677 mask = trident_get_interrupt_mask (card, 0); 3678 for (i = 0; i < NR_HW_CH; i++) { 3679 if ((state = card->states[i]) == NULL) 3680 continue; 3681 channel = state->dmabuf.channel->num; 3682 if ((channel_mask = 1 << channel) & mask) { 3683 mask &= ~channel_mask; 3684 trident_ack_channel_interrupt(card, channel); 3685 udelay(100); 3686 state->dmabuf.update_flag |= ALI_ADDRESS_INT_UPDATE; 3687 trident_update_ptr(state); 3688 } 3689 } 3690 if (mask) { 3691 for (i = 0; i < NR_HW_CH; i++) { 3692 if (mask & (1 << i)) { 3693 printk("ali: spurious channel irq %d.\n", i); 3694 trident_ack_channel_interrupt(card, i); 3695 trident_stop_voice(card, i); 3696 trident_disable_voice_irq(card, i); 3697 } 3698 } 3699 } 3700} 3701 3702/* Updating the values of counters of other_states' DMAs without lock 3703protection is no harm because all DMAs of multi-channels and interrupt 3704depend on a master state's DMA, and changing the counters of the master 3705state DMA is protected by a spinlock. 3706*/ 3707static int ali_write_5_1(struct trident_state *state, 3708 const char *buf, int cnt_for_multi_channel, 3709 unsigned int *copy_count, 3710 unsigned int *state_cnt) 3711{ 3712 3713 struct dmabuf *dmabuf = &state->dmabuf; 3714 struct dmabuf *dmabuf_temp; 3715 const char *buffer = buf; 3716 unsigned swptr, other_dma_nums, sample_s; 3717 unsigned int i, loop; 3718 3719 other_dma_nums = 4; 3720 sample_s = sample_size[dmabuf->fmt] >> 1; 3721 swptr = dmabuf->swptr; 3722 3723 if ((i = state->multi_channels_adjust_count) > 0) { 3724 if (i == 1) { 3725 if (copy_from_user(dmabuf->rawbuf + swptr, buffer, sample_s)) 3726 return -EFAULT; 3727 seek_offset(swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count); 3728 i--; 3729 (*state_cnt) += sample_s; 3730 state->multi_channels_adjust_count++; 3731 } 3732 else i = i - (state->chans_num - other_dma_nums); 3733 for (; (i < other_dma_nums) && (cnt_for_multi_channel > 0); i++) { 3734 dmabuf_temp = &state->other_states[i]->dmabuf; 3735 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr, buffer, sample_s)) 3736 return -EFAULT; 3737 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count); 3738 } 3739 if (cnt_for_multi_channel == 0) 3740 state->multi_channels_adjust_count += i; 3741 } 3742 if (cnt_for_multi_channel > 0) { 3743 loop = cnt_for_multi_channel / (state->chans_num * sample_s); 3744 for (i = 0; i < loop; i++) { 3745 if (copy_from_user(dmabuf->rawbuf + swptr, buffer, sample_s * 2)) 3746 return -EFAULT; 3747 seek_offset(swptr, buffer, cnt_for_multi_channel, sample_s * 2, *copy_count); 3748 (*state_cnt) += (sample_s * 2); 3749 3750 dmabuf_temp = &state->other_states[0]->dmabuf; 3751 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr, buffer, sample_s)) 3752 return -EFAULT; 3753 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count); 3754 3755 dmabuf_temp = &state->other_states[1]->dmabuf; 3756 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr, buffer, sample_s)) 3757 return -EFAULT; 3758 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count); 3759 3760 dmabuf_temp = &state->other_states[2]->dmabuf; 3761 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr, buffer, sample_s)) 3762 return -EFAULT; 3763 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count); 3764 3765 dmabuf_temp = &state->other_states[3]->dmabuf; 3766 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr, buffer, sample_s)) 3767 return -EFAULT; 3768 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count); 3769 } 3770 3771 if (cnt_for_multi_channel > 0) { 3772 state->multi_channels_adjust_count = cnt_for_multi_channel / sample_s; 3773 3774 if (copy_from_user(dmabuf->rawbuf + swptr, buffer, sample_s)) 3775 return -EFAULT; 3776 seek_offset(swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count); 3777 (*state_cnt) += sample_s; 3778 3779 if (cnt_for_multi_channel > 0) { 3780 if (copy_from_user(dmabuf->rawbuf + swptr, buffer, sample_s)) 3781 return -EFAULT; 3782 seek_offset(swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count); 3783 (*state_cnt) += sample_s; 3784 3785 if (cnt_for_multi_channel > 0) { 3786 loop = state->multi_channels_adjust_count - (state->chans_num - other_dma_nums); 3787 for (i = 0; i < loop; i++) { 3788 dmabuf_temp = &state->other_states[i]->dmabuf; 3789 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr, buffer, sample_s)) 3790 return -EFAULT; 3791 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count); 3792 } 3793 } 3794 } 3795 } 3796 else 3797 state->multi_channels_adjust_count = 0; 3798 } 3799 for (i = 0; i < other_dma_nums; i++) { 3800 dmabuf_temp = &state->other_states[i]->dmabuf; 3801 dmabuf_temp->swptr = dmabuf_temp->swptr % dmabuf_temp->dmasize; 3802 } 3803 return *state_cnt; 3804} 3805 3806static void ali_free_other_states_resources(struct trident_state *state) 3807{ 3808 int i; 3809 struct trident_card *card = state->card; 3810 struct trident_state *s; 3811 unsigned other_states_count; 3812 3813 other_states_count = state->chans_num - 2; /* except PCM L/R channels*/ 3814 for ( i = 0; i < other_states_count; i++) { 3815 s = state->other_states[i]; 3816 dealloc_dmabuf(&s->dmabuf, card->pci_dev); 3817 ali_disable_special_channel(s->card, s->dmabuf.channel->num); 3818 state->card->free_pcm_channel(s->card, s->dmabuf.channel->num); 3819 card->states[s->virt] = NULL; 3820 kfree(s); 3821 } 3822} 3823 3824struct proc_dir_entry *res; 3825static int ali_write_proc(struct file *file, const char *buffer, unsigned long count, void *data) 3826{ 3827 struct trident_card *card = (struct trident_card *)data; 3828 unsigned long flags; 3829 char c; 3830 3831 if (count<0) 3832 return -EINVAL; 3833 if (count == 0) 3834 return 0; 3835 if (get_user(c, buffer)) 3836 return -EFAULT; 3837 3838 spin_lock_irqsave(&card->lock, flags); 3839 switch (c) { 3840 case '0': 3841 ali_setup_spdif_out(card, ALI_PCM_TO_SPDIF_OUT); 3842 ali_disable_special_channel(card, ALI_SPDIF_OUT_CHANNEL); 3843 break; 3844 case '1': 3845 ali_setup_spdif_out(card, ALI_SPDIF_OUT_TO_SPDIF_OUT|ALI_SPDIF_OUT_PCM); 3846 break; 3847 case '2': 3848 ali_setup_spdif_out(card, ALI_SPDIF_OUT_TO_SPDIF_OUT|ALI_SPDIF_OUT_NON_PCM); 3849 break; 3850 case '3': 3851 ali_disable_spdif_in(card); //default 3852 break; 3853 case '4': 3854 ali_setup_spdif_in(card); 3855 break; 3856 } 3857 spin_unlock_irqrestore(&card->lock, flags); 3858 3859 return count; 3860} 3861 3862/* OSS /dev/mixer file operation methods */ 3863static int trident_open_mixdev(struct inode *inode, struct file *file) 3864{ 3865 int i = 0; 3866 int minor = MINOR(inode->i_rdev); 3867 struct trident_card *card = devs; 3868 3869 for (card = devs; card != NULL; card = card->next) 3870 for (i = 0; i < NR_AC97; i++) 3871 if (card->ac97_codec[i] != NULL && 3872 card->ac97_codec[i]->dev_mixer == minor) 3873 goto match; 3874 3875 if (!card) { 3876 return -ENODEV; 3877 } 3878 match: 3879 file->private_data = card->ac97_codec[i]; 3880 3881 3882 return 0; 3883} 3884 3885static int trident_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, 3886 unsigned long arg) 3887{ 3888 struct ac97_codec *codec = (struct ac97_codec *)file->private_data; 3889 3890 return codec->mixer_ioctl(codec, cmd, arg); 3891} 3892 3893static /*const*/ struct file_operations trident_mixer_fops = { 3894 owner: THIS_MODULE, 3895 llseek: no_llseek, 3896 ioctl: trident_ioctl_mixdev, 3897 open: trident_open_mixdev, 3898}; 3899 3900static int ali_reset_5451(struct trident_card *card) 3901{ 3902 struct pci_dev *pci_dev = NULL; 3903 unsigned int dwVal; 3904 unsigned short wCount, wReg; 3905 3906 pci_dev = pci_find_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, pci_dev); 3907 if (pci_dev == NULL) 3908 return -1; 3909 3910 pci_read_config_dword(pci_dev, 0x7c, &dwVal); 3911 pci_write_config_dword(pci_dev, 0x7c, dwVal | 0x08000000); 3912 udelay(5000); 3913 pci_read_config_dword(pci_dev, 0x7c, &dwVal); 3914 pci_write_config_dword(pci_dev, 0x7c, dwVal & 0xf7ffffff); 3915 udelay(5000); 3916 3917 pci_dev = card->pci_dev; 3918 if (pci_dev == NULL) 3919 return -1; 3920 3921 pci_read_config_dword(pci_dev, 0x44, &dwVal); 3922 pci_write_config_dword(pci_dev, 0x44, dwVal | 0x000c0000); 3923 udelay(500); 3924 pci_read_config_dword(pci_dev, 0x44, &dwVal); 3925 pci_write_config_dword(pci_dev, 0x44, dwVal & 0xfffbffff); 3926 udelay(5000); 3927 3928 wCount = 2000; 3929 while(wCount--) { 3930 wReg = ali_ac97_get(card, 0, AC97_POWER_CONTROL); 3931 if((wReg & 0x000f) == 0x000f) 3932 return 0; 3933 udelay(500); 3934 } 3935 return 0; 3936} 3937 3938/* AC97 codec initialisation. */ 3939static int __init trident_ac97_init(struct trident_card *card) 3940{ 3941 int num_ac97 = 0; 3942 unsigned long ready_2nd = 0; 3943 struct ac97_codec *codec; 3944 int i = 0; 3945 3946 3947 /* initialize controller side of AC link, and find out if secondary codes 3948 really exist */ 3949 switch (card->pci_id) 3950 { 3951 case PCI_DEVICE_ID_ALI_5451: 3952 if (ali_reset_5451(card)) 3953 { 3954 printk(KERN_ERR "trident_ac97_init: error resetting 5451.\n"); 3955 return -1; 3956 } 3957 outl(0x80000001,TRID_REG(card, ALI_GLOBAL_CONTROL)); 3958 outl(0x00000000,TRID_REG(card, T4D_AINTEN_A)); 3959 outl(0xffffffff,TRID_REG(card, T4D_AINT_A)); 3960 outl(0x00000000,TRID_REG(card, T4D_MUSICVOL_WAVEVOL)); 3961 outb(0x10, TRID_REG(card, ALI_MPUR2)); 3962 ready_2nd = inl(TRID_REG(card, ALI_SCTRL)); 3963 ready_2nd &= 0x3fff; 3964 outl(ready_2nd | PCMOUT | 0x8000, TRID_REG(card, ALI_SCTRL)); 3965 ready_2nd = inl(TRID_REG(card, ALI_SCTRL)); 3966 ready_2nd &= SI_AC97_SECONDARY_READY; 3967 if (card->revision < ALI_5451_V02) 3968 ready_2nd = 0; 3969 break; 3970 case PCI_DEVICE_ID_SI_7018: 3971 /* disable AC97 GPIO interrupt */ 3972 outl(0x00, TRID_REG(card, SI_AC97_GPIO)); 3973 /* when power up the AC link is in cold reset mode so stop it */ 3974 outl(PCMOUT|SURROUT|CENTEROUT|LFEOUT|SECONDARY_ID, 3975 TRID_REG(card, SI_SERIAL_INTF_CTRL)); 3976 /* it take a long time to recover from a cold reset (especially when you have 3977 more than one codec) */ 3978 udelay(2000); 3979 ready_2nd = inl(TRID_REG(card, SI_SERIAL_INTF_CTRL)); 3980 ready_2nd &= SI_AC97_SECONDARY_READY; 3981 break; 3982 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX: 3983 /* playback on */ 3984 outl(DX_AC97_PLAYBACK, TRID_REG(card, DX_ACR2_AC97_COM_STAT)); 3985 break; 3986 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX: 3987 /* enable AC97 Output Slot 3,4 (PCM Left/Right Playback) */ 3988 outl(NX_AC97_PCM_OUTPUT, TRID_REG(card, NX_ACR0_AC97_COM_STAT)); 3989 ready_2nd = inl(TRID_REG(card, NX_ACR0_AC97_COM_STAT)); 3990 ready_2nd &= NX_AC97_SECONDARY_READY; 3991 break; 3992 case PCI_DEVICE_ID_INTERG_5050: 3993 /* disable AC97 GPIO interrupt */ 3994 outl(0x00, TRID_REG(card, SI_AC97_GPIO)); 3995 /* when power up, the AC link is in cold reset mode, so stop it */ 3996 outl(PCMOUT|SURROUT|CENTEROUT|LFEOUT, 3997 TRID_REG(card, SI_SERIAL_INTF_CTRL)); 3998 /* it take a long time to recover from a cold reset (especially when you have 3999 more than one codec) */ 4000 udelay(2000); 4001 ready_2nd = inl(TRID_REG(card, SI_SERIAL_INTF_CTRL)); 4002 ready_2nd &= SI_AC97_SECONDARY_READY; 4003 break; 4004 } 4005 4006 for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) { 4007 if ((codec = kmalloc(sizeof(struct ac97_codec), GFP_KERNEL)) == NULL) 4008 return -ENOMEM; 4009 memset(codec, 0, sizeof(struct ac97_codec)); 4010 4011 /* initialize some basic codec information, other fields will be filled 4012 in ac97_probe_codec */ 4013 codec->private_data = card; 4014 codec->id = num_ac97; 4015 4016 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) { 4017 codec->codec_read = ali_ac97_read; 4018 codec->codec_write = ali_ac97_write; 4019 } 4020 else { 4021 codec->codec_read = trident_ac97_get; 4022 codec->codec_write = trident_ac97_set; 4023 } 4024 4025 if (ac97_probe_codec(codec) == 0) 4026 break; 4027 4028 if ((codec->dev_mixer = register_sound_mixer(&trident_mixer_fops, -1)) < 0) { 4029 printk(KERN_ERR "trident: couldn't register mixer!\n"); 4030 kfree(codec); 4031 break; 4032 } 4033 4034 card->ac97_codec[num_ac97] = codec; 4035 4036 /* if there is no secondary codec at all, don't probe any more */ 4037 if (!ready_2nd) 4038 break; 4039 } 4040 4041 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) { 4042 for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) { 4043 if (card->ac97_codec[num_ac97] == NULL) 4044 break; 4045 for (i=0; i<64;i++) 4046 card->mixer_regs[i][num_ac97] = ali_ac97_get(card, num_ac97,i*2); 4047 } 4048 } 4049 return num_ac97+1; 4050} 4051 4052/* install the driver, we do not allocate hardware channel nor DMA buffer now, they are defered 4053 until "ACCESS" time (in prog_dmabuf called by open/read/write/ioctl/mmap) */ 4054static int __init trident_probe(struct pci_dev *pci_dev, const struct pci_device_id *pci_id) 4055{ 4056 unsigned long iobase; 4057 struct trident_card *card; 4058 u8 bits; 4059 u8 revision; 4060 int i = 0; 4061 u16 temp; 4062 struct pci_dev *pci_dev_m1533 = NULL; 4063 int rc = -ENODEV; 4064 u64 dma_mask; 4065 4066 if (pci_enable_device(pci_dev)) 4067 goto out; 4068 4069 if (pci_dev->device == PCI_DEVICE_ID_ALI_5451) 4070 dma_mask = ALI_DMA_MASK; 4071 else 4072 dma_mask = TRIDENT_DMA_MASK; 4073 if (pci_set_dma_mask(pci_dev, dma_mask)) { 4074 printk(KERN_ERR "trident: architecture does not support" 4075 " %s PCI busmaster DMA\n", 4076 pci_dev->device == PCI_DEVICE_ID_ALI_5451 ? 4077 "32-bit" : "30-bit"); 4078 goto out; 4079 } 4080 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &revision); 4081 4082 if (pci_id->device == PCI_DEVICE_ID_INTERG_5050) 4083 iobase = pci_resource_start(pci_dev, 1); 4084 else 4085 iobase = pci_resource_start(pci_dev, 0); 4086 4087 if (!request_region(iobase, 256, card_names[pci_id->driver_data])) { 4088 printk(KERN_ERR "trident: can't allocate I/O space at 0x%4.4lx\n", 4089 iobase); 4090 goto out; 4091 } 4092 4093 rc = -ENOMEM; 4094 if ((card = kmalloc(sizeof(struct trident_card), GFP_KERNEL)) == NULL) { 4095 printk(KERN_ERR "trident: out of memory\n"); 4096 goto out_release_region; 4097 } 4098 memset(card, 0, sizeof(*card)); 4099 4100 card->iobase = iobase; 4101 card->pci_dev = pci_dev; 4102 card->pci_id = pci_id->device; 4103 card->revision = revision; 4104 card->irq = pci_dev->irq; 4105 card->next = devs; 4106 card->magic = TRIDENT_CARD_MAGIC; 4107 card->banks[BANK_A].addresses = &bank_a_addrs; 4108 card->banks[BANK_A].bitmap = 0UL; 4109 card->banks[BANK_B].addresses = &bank_b_addrs; 4110 card->banks[BANK_B].bitmap = 0UL; 4111 4112 init_MUTEX(&card->open_sem); 4113 spin_lock_init(&card->lock); 4114 init_timer(&card->timer); 4115 4116 devs = card; 4117 4118 pci_set_master(pci_dev); 4119 4120 printk(KERN_INFO "trident: %s found at IO 0x%04lx, IRQ %d\n", 4121 card_names[pci_id->driver_data], card->iobase, card->irq); 4122 4123 if(card->pci_id == PCI_DEVICE_ID_ALI_5451) { 4124 /* ALi channel Management */ 4125 card->alloc_pcm_channel = ali_alloc_pcm_channel; 4126 card->alloc_rec_pcm_channel = ali_alloc_rec_pcm_channel; 4127 card->free_pcm_channel = ali_free_pcm_channel; 4128 4129 card->address_interrupt = ali_address_interrupt; 4130 4131 /* Added by Matt Wu 01-05-2001 for spdif in */ 4132 card->multi_channel_use_count = 0; 4133 card->rec_channel_use_count = 0; 4134 4135 /* ALi SPDIF OUT function */ 4136 if(card->revision == ALI_5451_V02) { 4137 ali_setup_spdif_out(card, ALI_PCM_TO_SPDIF_OUT); 4138 res = create_proc_entry("ALi5451", 0, NULL); 4139 if (res) { 4140 res->write_proc = ali_write_proc; 4141 res->data = card; 4142 } 4143 } 4144 4145 /* Add H/W Volume Control By Matt Wu Jul. 06, 2001 */ 4146 card->hwvolctl = 0; 4147 pci_dev_m1533 = pci_find_device(PCI_VENDOR_ID_AL,PCI_DEVICE_ID_AL_M1533, pci_dev_m1533); 4148 rc = -ENODEV; 4149 if (pci_dev_m1533 == NULL) 4150 goto out_proc_fs; 4151 pci_read_config_byte(pci_dev_m1533, 0x63, &bits); 4152 if (bits & (1<<5)) 4153 card->hwvolctl = 1; 4154 if (card->hwvolctl) 4155 { 4156 /* Clear m1533 pci cfg 78h bit 30 to zero, which makes 4157 GPIO11/12/13 work as ACGP_UP/DOWN/MUTE. */ 4158 pci_read_config_byte(pci_dev_m1533, 0x7b, &bits); 4159 bits &= 0xbf; /*clear bit 6 */ 4160 pci_write_config_byte(pci_dev_m1533, 0x7b, bits); 4161 } 4162 } 4163 else if(card->pci_id == PCI_DEVICE_ID_INTERG_5050) 4164 { 4165 card->alloc_pcm_channel = cyber_alloc_pcm_channel; 4166 card->alloc_rec_pcm_channel = cyber_alloc_pcm_channel; 4167 card->free_pcm_channel = cyber_free_pcm_channel; 4168 card->address_interrupt = cyber_address_interrupt; 4169 cyber_init_ritual(card); 4170 } 4171 else 4172 { 4173 card->alloc_pcm_channel = trident_alloc_pcm_channel; 4174 card->alloc_rec_pcm_channel = trident_alloc_pcm_channel; 4175 card->free_pcm_channel = trident_free_pcm_channel; 4176 card->address_interrupt = trident_address_interrupt; 4177 } 4178 4179 /* claim our irq */ 4180 rc = -ENODEV; 4181 if (request_irq(card->irq, &trident_interrupt, SA_SHIRQ, 4182 card_names[pci_id->driver_data], card)) { 4183 printk(KERN_ERR "trident: unable to allocate irq %d\n", card->irq); 4184 goto out_proc_fs; 4185 } 4186 /* register /dev/dsp */ 4187 if ((card->dev_audio = register_sound_dsp(&trident_audio_fops, -1)) < 0) { 4188 printk(KERN_ERR "trident: couldn't register DSP device!\n"); 4189 goto out_free_irq; 4190 } 4191 card->mixer_regs_ready = 0; 4192 /* initialize AC97 codec and register /dev/mixer */ 4193 if (trident_ac97_init(card) <= 0) { 4194 /* unregister audio devices */ 4195 for (i = 0; i < NR_AC97; i++) { 4196 if (card->ac97_codec[i] != NULL) { 4197 unregister_sound_mixer(card->ac97_codec[i]->dev_mixer); 4198 kfree (card->ac97_codec[i]); 4199 } 4200 } 4201 goto out_unregister_sound_dsp; 4202 } 4203 card->mixer_regs_ready = 1; 4204 outl(0x00, TRID_REG(card, T4D_MUSICVOL_WAVEVOL)); 4205 4206 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) { 4207 /* Add H/W Volume Control By Matt Wu Jul. 06, 2001 */ 4208 if(card->hwvolctl) 4209 { 4210 /* Enable GPIO IRQ (MISCINT bit 18h)*/ 4211 temp = inw(TRID_REG(card, T4D_MISCINT + 2)); 4212 temp |= 0x0004; 4213 outw(temp, TRID_REG(card, T4D_MISCINT + 2)); 4214 4215 /* Enable H/W Volume Control GLOVAL CONTROL bit 0*/ 4216 temp = inw(TRID_REG(card, ALI_GLOBAL_CONTROL)); 4217 temp |= 0x0001; 4218 outw(temp, TRID_REG(card, ALI_GLOBAL_CONTROL)); 4219 4220 } 4221 if(card->revision == ALI_5451_V02) 4222 ali_close_multi_channels(); 4223 /* edited by HMSEO for GT sound */ 4224#if defined CONFIG_ALPHA_NAUTILUS || CONFIG_ALPHA_GENERIC 4225 { 4226 u16 ac97_data; 4227 extern struct hwrpb_struct *hwrpb; 4228 4229 if ((hwrpb->sys_type) == 201) { 4230 printk(KERN_INFO "trident: Running on Alpha system type Nautilus\n"); 4231 ac97_data = ali_ac97_get(card, 0, AC97_POWER_CONTROL); 4232 ali_ac97_set(card, 0, AC97_POWER_CONTROL, ac97_data | ALI_EAPD_POWER_DOWN); 4233 } 4234 } 4235#endif /* CONFIG_ALPHA_NAUTILUS || CONFIG_ALPHA_GENERIC */ 4236 /* edited by HMSEO for GT sound*/ 4237 } 4238 rc = 0; 4239 pci_set_drvdata(pci_dev, card); 4240 4241 /* Enable Address Engine Interrupts */ 4242 trident_enable_loop_interrupts(card); 4243 4244 /* Attach joystick */ 4245 if((pci_dev->vendor == PCI_VENDOR_ID_TRIDENT) || 4246 (pci_dev->vendor == PCI_VENDOR_ID_AL)) 4247 card->joystick = pcigame_attach(pci_dev, PCIGAME_4DWAVE); 4248out: return rc; 4249out_unregister_sound_dsp: 4250 unregister_sound_dsp(card->dev_audio); 4251out_free_irq: 4252 free_irq(card->irq, card); 4253out_proc_fs: 4254 if (res) { 4255 remove_proc_entry("ALi5451", NULL); 4256 res = NULL; 4257 } 4258 kfree(card); 4259 devs = NULL; 4260out_release_region: 4261 release_region(iobase, 256); 4262 goto out; 4263} 4264 4265static void __devexit trident_remove(struct pci_dev *pci_dev) 4266{ 4267 int i; 4268 struct trident_card *card = pci_get_drvdata(pci_dev); 4269 4270 /* 4271 * Kill running timers before unload. We can't have them 4272 * going off after rmmod! 4273 */ 4274 if(card->hwvolctl) 4275 del_timer_sync(&card->timer); 4276 4277 /* ALi S/PDIF and Power Management */ 4278 if(card->pci_id == PCI_DEVICE_ID_ALI_5451) { 4279 ali_setup_spdif_out(card, ALI_PCM_TO_SPDIF_OUT); 4280 ali_disable_special_channel(card, ALI_SPDIF_OUT_CHANNEL); 4281 ali_disable_spdif_in(card); 4282 remove_proc_entry("ALi5451", NULL); 4283 } 4284 4285 /* Kill interrupts, and SP/DIF */ 4286 trident_disable_loop_interrupts(card); 4287 4288 /* free hardware resources */ 4289 free_irq(card->irq, card); 4290 release_region(card->iobase, 256); 4291 4292 /* unregister audio devices */ 4293 for (i = 0; i < NR_AC97; i++) 4294 if (card->ac97_codec[i] != NULL) { 4295 unregister_sound_mixer(card->ac97_codec[i]->dev_mixer); 4296 kfree (card->ac97_codec[i]); 4297 } 4298 unregister_sound_dsp(card->dev_audio); 4299 4300 if(card->joystick) 4301 pcigame_detach(card->joystick); 4302 4303 kfree(card); 4304 4305 pci_set_drvdata(pci_dev, NULL); 4306} 4307 4308MODULE_AUTHOR("Alan Cox, Aaron Holtzman, Ollie Lho, Ching Ling Lee"); 4309MODULE_DESCRIPTION("Trident 4DWave/SiS 7018/ALi 5451 and Tvia/IGST CyberPro5050 PCI Audio Driver"); 4310MODULE_LICENSE("GPL"); 4311 4312 4313#define TRIDENT_MODULE_NAME "trident" 4314 4315static struct pci_driver trident_pci_driver = { 4316 name: TRIDENT_MODULE_NAME, 4317 id_table: trident_pci_tbl, 4318 probe: trident_probe, 4319 remove: __devexit_p(trident_remove), 4320 suspend: trident_suspend, 4321 resume: trident_resume 4322}; 4323 4324static int __init trident_init_module (void) 4325{ 4326 if (!pci_present()) /* No PCI bus in this machine! */ 4327 return -ENODEV; 4328 4329 printk(KERN_INFO "Trident 4DWave/SiS 7018/ALi 5451,Tvia CyberPro " 4330 "5050 PCI Audio, version " DRIVER_VERSION ", " 4331 __TIME__ " " __DATE__ "\n"); 4332 4333 if (!pci_register_driver(&trident_pci_driver)) { 4334 pci_unregister_driver(&trident_pci_driver); 4335 return -ENODEV; 4336 } 4337 return 0; 4338} 4339 4340static void __exit trident_cleanup_module (void) 4341{ 4342 pci_unregister_driver(&trident_pci_driver); 4343} 4344 4345module_init(trident_init_module); 4346module_exit(trident_cleanup_module); 4347