1/* 2 * Sun3 SCSI stuff by Erik Verbruggen (erik@bigmama.xtdnet.nl) 3 * 4 * Sun3 DMA routines added by Sam Creasey (sammy@oh.verio.com) 5 * 6 * Adapted from mac_scsinew.c: 7 */ 8/* 9 * Generic Macintosh NCR5380 driver 10 * 11 * Copyright 1998, Michael Schmitz <mschmitz@lbl.gov> 12 * 13 * derived in part from: 14 */ 15/* 16 * Generic Generic NCR5380 driver 17 * 18 * Copyright 1995, Russell King 19 * 20 * ALPHA RELEASE 1. 21 * 22 * For more information, please consult 23 * 24 * NCR 5380 Family 25 * SCSI Protocol Controller 26 * Databook 27 * 28 * NCR Microelectronics 29 * 1635 Aeroplaza Drive 30 * Colorado Springs, CO 80916 31 * 1+ (719) 578-3400 32 * 1+ (800) 334-5454 33 */ 34 35 36/* 37 * This is from mac_scsi.h, but hey, maybe this is useful for Sun3 too! :) 38 * 39 * Options : 40 * 41 * PARITY - enable parity checking. Not supported. 42 * 43 * SCSI2 - enable support for SCSI-II tagged queueing. Untested. 44 * 45 * USLEEP - enable support for devices that don't disconnect. Untested. 46 */ 47 48/* 49 * $Log: sun3_scsi.c,v $ 50 * Revision 1.1.1.1 2008/10/15 03:26:55 james26_jang 51 * Initial. 52 * 53 * Revision 1.1.1.1 2008/07/21 09:15:24 james26_jang 54 * New UI, New QoS, New wireless driver(4.151.10.29), ipmonitor. 55 * 56 * Revision 1.1.1.1 2008/07/02 14:39:42 james26_jang 57 * 4.100.10.29, New QoS and New UI. 58 * 59 * Revision 1.1.1.1 2003/02/03 22:37:54 mhuang 60 * LINUX_2_4 branch snapshot from linux-mips.org CVS 61 * 62 */ 63 64#define AUTOSENSE 65 66#include <linux/types.h> 67#include <linux/stddef.h> 68#include <linux/ctype.h> 69#include <linux/delay.h> 70 71#include <linux/module.h> 72#include <linux/signal.h> 73#include <linux/sched.h> 74#include <linux/ioport.h> 75#include <linux/init.h> 76#include <linux/blk.h> 77 78#include <asm/io.h> 79#include <asm/system.h> 80 81#include <asm/sun3ints.h> 82#include <asm/dvma.h> 83#include <asm/idprom.h> 84#include <asm/machines.h> 85 86/* dma on! */ 87#define REAL_DMA 88 89#include "scsi.h" 90#include "hosts.h" 91#include "sun3_scsi.h" 92#include "NCR5380.h" 93#include "constants.h" 94 95/* #define OLDDMA */ 96 97#define USE_WRAPPER 98/*#define RESET_BOOT */ 99#define DRIVER_SETUP 100 101#define NDEBUG 0 102 103/* 104 * BUG can be used to trigger a strange code-size related hang on 2.1 kernels 105 */ 106#ifdef BUG 107#undef RESET_BOOT 108#undef DRIVER_SETUP 109#endif 110 111/* #define SUPPORT_TAGS */ 112 113#define ENABLE_IRQ() enable_irq( IRQ_SUN3_SCSI ); 114 115 116static void scsi_sun3_intr(int irq, void *dummy, struct pt_regs *fp); 117static inline unsigned char sun3scsi_read(int reg); 118static inline void sun3scsi_write(int reg, int value); 119 120static int setup_can_queue = -1; 121static int setup_cmd_per_lun = -1; 122static int setup_sg_tablesize = -1; 123#ifdef SUPPORT_TAGS 124static int setup_use_tagged_queuing = -1; 125#endif 126static int setup_hostid = -1; 127 128static Scsi_Cmnd *sun3_dma_setup_done = NULL; 129 130#define AFTER_RESET_DELAY (HZ/2) 131 132/* ms to wait after hitting dma regs */ 133#define SUN3_DMA_DELAY 10 134 135/* dvma buffer to allocate -- 32k should hopefully be more than sufficient */ 136#define SUN3_DVMA_BUFSIZE 0xe000 137 138/* minimum number of bytes to do dma on */ 139#define SUN3_DMA_MINSIZE 128 140 141static volatile unsigned char *sun3_scsi_regp; 142static volatile struct sun3_dma_regs *dregs; 143#ifdef OLDDMA 144static unsigned char *dmabuf = NULL; /* dma memory buffer */ 145#endif 146static struct sun3_udc_regs *udc_regs = NULL; 147static unsigned char *sun3_dma_orig_addr = NULL; 148static unsigned long sun3_dma_orig_count = 0; 149static int sun3_dma_active = 0; 150static unsigned long last_residual = 0; 151 152/* 153 * NCR 5380 register access functions 154 */ 155 156static inline unsigned char sun3scsi_read(int reg) 157{ 158 return( sun3_scsi_regp[reg] ); 159} 160 161static inline void sun3scsi_write(int reg, int value) 162{ 163 sun3_scsi_regp[reg] = value; 164} 165 166/* dma controller register access functions */ 167 168static inline unsigned short sun3_udc_read(unsigned char reg) 169{ 170 unsigned short ret; 171 172 dregs->udc_addr = UDC_CSR; 173 udelay(SUN3_DMA_DELAY); 174 ret = dregs->udc_data; 175 udelay(SUN3_DMA_DELAY); 176 177 return ret; 178} 179 180static inline void sun3_udc_write(unsigned short val, unsigned char reg) 181{ 182 dregs->udc_addr = reg; 183 udelay(SUN3_DMA_DELAY); 184 dregs->udc_data = val; 185 udelay(SUN3_DMA_DELAY); 186} 187 188static struct Scsi_Host *default_instance; 189 190/* 191 * Function : int sun3scsi_detect(Scsi_Host_Template * tpnt) 192 * 193 * Purpose : initializes mac NCR5380 driver based on the 194 * command line / compile time port and irq definitions. 195 * 196 * Inputs : tpnt - template for this SCSI adapter. 197 * 198 * Returns : 1 if a host adapter was found, 0 if not. 199 * 200 */ 201 202int sun3scsi_detect(Scsi_Host_Template * tpnt) 203{ 204 unsigned long ioaddr, iopte; 205 int count = 0; 206 static int called = 0; 207 struct Scsi_Host *instance; 208 209 /* check that this machine has an onboard 5380 */ 210 switch(idprom->id_machtype) { 211 case SM_SUN3|SM_3_50: 212 case SM_SUN3|SM_3_60: 213 break; 214 215 default: 216 return 0; 217 } 218 219 if(called) 220 return 0; 221 222 tpnt->proc_name = "Sun3 5380 SCSI"; 223 224 /* setup variables */ 225 tpnt->can_queue = 226 (setup_can_queue > 0) ? setup_can_queue : CAN_QUEUE; 227 tpnt->cmd_per_lun = 228 (setup_cmd_per_lun > 0) ? setup_cmd_per_lun : CMD_PER_LUN; 229 tpnt->sg_tablesize = 230 (setup_sg_tablesize >= 0) ? setup_sg_tablesize : SG_TABLESIZE; 231 232 if (setup_hostid >= 0) 233 tpnt->this_id = setup_hostid; 234 else { 235 /* use 7 as default */ 236 tpnt->this_id = 7; 237 } 238 239 /* Taken from Sammy's lance driver: */ 240 /* IOBASE_SUN3_SCSI can be found within the IO pmeg with some effort */ 241 for(ioaddr = 0xfe00000; ioaddr < (0xfe00000 + SUN3_PMEG_SIZE); 242 ioaddr += SUN3_PTE_SIZE) { 243 244 iopte = sun3_get_pte(ioaddr); 245 if(!(iopte & SUN3_PAGE_TYPE_IO)) /* this an io page? */ 246 continue; 247 248 if(((iopte & SUN3_PAGE_PGNUM_MASK) << PAGE_SHIFT) == 249 IOBASE_SUN3_SCSI) { 250 count = 1; 251 break; 252 } 253 } 254 255 if(!count) { 256 printk("No Sun3 NCR5380 found!\n"); 257 return 0; 258 } 259 260 sun3_scsi_regp = (unsigned char *)ioaddr; 261 dregs = (struct sun3_dma_regs *)(((unsigned char *)ioaddr) + 8); 262 263 if((udc_regs = dvma_malloc(sizeof(struct sun3_udc_regs))) 264 == NULL) { 265 printk("SUN3 Scsi couldn't allocate DVMA memory!\n"); 266 return 0; 267 } 268#ifdef OLDDMA 269 if((dmabuf = dvma_malloc_align(SUN3_DVMA_BUFSIZE, 0x10000)) == NULL) { 270 printk("SUN3 Scsi couldn't allocate DVMA memory!\n"); 271 return 0; 272 } 273#endif 274#ifdef SUPPORT_TAGS 275 if (setup_use_tagged_queuing < 0) 276 setup_use_tagged_queuing = USE_TAGGED_QUEUING; 277#endif 278 279 instance = scsi_register (tpnt, sizeof(struct NCR5380_hostdata)); 280 if(instance == NULL) 281 return 0; 282 283 default_instance = instance; 284 285 instance->io_port = (unsigned long) ioaddr; 286 instance->irq = IRQ_SUN3_SCSI; 287 288 NCR5380_init(instance, 0); 289 290 instance->n_io_port = 32; 291 292 ((struct NCR5380_hostdata *)instance->hostdata)->ctrl = 0; 293 294 if (request_irq(instance->irq, scsi_sun3_intr, 295 0, "Sun3SCSI-5380", NULL)) { 296#ifndef REAL_DMA 297 printk("scsi%d: IRQ%d not free, interrupts disabled\n", 298 instance->host_no, instance->irq); 299 instance->irq = IRQ_NONE; 300#else 301 printk("scsi%d: IRQ%d not free, bailing out\n", 302 instance->host_no, instance->irq); 303 return 0; 304#endif 305 } 306 307 printk("scsi%d: Sun3 5380 at port %lX irq", instance->host_no, instance->io_port); 308 if (instance->irq == IRQ_NONE) 309 printk ("s disabled"); 310 else 311 printk (" %d", instance->irq); 312 printk(" options CAN_QUEUE=%d CMD_PER_LUN=%d release=%d", 313 instance->can_queue, instance->cmd_per_lun, 314 SUN3SCSI_PUBLIC_RELEASE); 315 printk("\nscsi%d:", instance->host_no); 316 NCR5380_print_options(instance); 317 printk("\n"); 318 319 dregs->csr = 0; 320 udelay(SUN3_DMA_DELAY); 321 dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR; 322 udelay(SUN3_DMA_DELAY); 323 dregs->fifo_count = 0; 324 325 called = 1; 326 327#ifdef RESET_BOOT 328 sun3_scsi_reset_boot(instance); 329#endif 330 331 return 1; 332} 333 334int sun3scsi_release (struct Scsi_Host *shpnt) 335{ 336 if (shpnt->irq != IRQ_NONE) 337 free_irq (shpnt->irq, NULL); 338 339 return 0; 340} 341 342#ifdef RESET_BOOT 343/* 344 * Our 'bus reset on boot' function 345 */ 346 347static void sun3_scsi_reset_boot(struct Scsi_Host *instance) 348{ 349 unsigned long end; 350 351 NCR5380_local_declare(); 352 NCR5380_setup(instance); 353 354 /* 355 * Do a SCSI reset to clean up the bus during initialization. No 356 * messing with the queues, interrupts, or locks necessary here. 357 */ 358 359 printk( "Sun3 SCSI: resetting the SCSI bus..." ); 360 361 /* switch off SCSI IRQ - catch an interrupt without IRQ bit set else */ 362// sun3_disable_irq( IRQ_SUN3_SCSI ); 363 364 /* get in phase */ 365 NCR5380_write( TARGET_COMMAND_REG, 366 PHASE_SR_TO_TCR( NCR5380_read(STATUS_REG) )); 367 368 /* assert RST */ 369 NCR5380_write( INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST ); 370 371 /* The min. reset hold time is 25us, so 40us should be enough */ 372 udelay( 50 ); 373 374 /* reset RST and interrupt */ 375 NCR5380_write( INITIATOR_COMMAND_REG, ICR_BASE ); 376 NCR5380_read( RESET_PARITY_INTERRUPT_REG ); 377 378 for( end = jiffies + AFTER_RESET_DELAY; time_before(jiffies, end); ) 379 barrier(); 380 381 /* switch on SCSI IRQ again */ 382// sun3_enable_irq( IRQ_SUN3_SCSI ); 383 384 printk( " done\n" ); 385} 386#endif 387 388const char * sun3scsi_info (struct Scsi_Host *spnt) { 389 return ""; 390} 391 392// safe bits for the CSR 393#define CSR_GOOD 0x060f 394 395static void scsi_sun3_intr(int irq, void *dummy, struct pt_regs *fp) 396{ 397 unsigned short csr = dregs->csr; 398 399 if(csr & ~CSR_GOOD) { 400 if(csr & CSR_DMA_BUSERR) { 401 printk("scsi%d: bus error in dma\n", default_instance->host_no); 402 } 403 404 if(csr & CSR_DMA_CONFLICT) { 405 printk("scsi%d: dma conflict\n", default_instance->host_no); 406 } 407 } 408 409 if(csr & (CSR_SDB_INT | CSR_DMA_INT)) 410 NCR5380_intr(irq, dummy, fp); 411} 412 413/* 414 * Debug stuff - to be called on NMI, or sysrq key. Use at your own risk; 415 * reentering NCR5380_print_status seems to have ugly side effects 416 */ 417 418/* this doesn't seem to get used at all -- sam */ 419 420 421/* sun3scsi_dma_setup() -- initialize the dma controller for a read/write */ 422static unsigned long sun3scsi_dma_setup(void *data, unsigned long count, int write_flag) 423{ 424#ifdef OLDDMA 425 if(write_flag) 426 memcpy(dmabuf, data, count); 427 else { 428 sun3_dma_orig_addr = data; 429 sun3_dma_orig_count = count; 430 } 431#else 432 void *addr; 433 434 if(sun3_dma_orig_addr != NULL) 435 dvma_unmap(sun3_dma_orig_addr); 436 437// addr = sun3_dvma_page((unsigned long)data, (unsigned long)dmabuf); 438 addr = (void *)dvma_map((unsigned long) data, count); 439 440 sun3_dma_orig_addr = addr; 441 sun3_dma_orig_count = count; 442#endif 443 dregs->fifo_count = 0; 444 sun3_udc_write(UDC_RESET, UDC_CSR); 445 446 /* reset fifo */ 447 dregs->csr &= ~CSR_FIFO; 448 dregs->csr |= CSR_FIFO; 449 450 /* set direction */ 451 if(write_flag) 452 dregs->csr |= CSR_SEND; 453 else 454 dregs->csr &= ~CSR_SEND; 455 456 /* byte count for fifo */ 457 dregs->fifo_count = count; 458 459 sun3_udc_write(UDC_RESET, UDC_CSR); 460 461 /* reset fifo */ 462 dregs->csr &= ~CSR_FIFO; 463 dregs->csr |= CSR_FIFO; 464 465 if(dregs->fifo_count != count) { 466 printk("scsi%d: fifo_mismatch %04x not %04x\n", 467 default_instance->host_no, dregs->fifo_count, 468 (unsigned int) count); 469 NCR5380_print(default_instance); 470 } 471 472 /* setup udc */ 473#ifdef OLDDMA 474 udc_regs->addr_hi = ((dvma_vtob(dmabuf) & 0xff0000) >> 8); 475 udc_regs->addr_lo = (dvma_vtob(dmabuf) & 0xffff); 476#else 477 udc_regs->addr_hi = (((unsigned long)(addr) & 0xff0000) >> 8); 478 udc_regs->addr_lo = ((unsigned long)(addr) & 0xffff); 479#endif 480 udc_regs->count = count/2; /* count in words */ 481 udc_regs->mode_hi = UDC_MODE_HIWORD; 482 if(write_flag) { 483 if(count & 1) 484 udc_regs->count++; 485 udc_regs->mode_lo = UDC_MODE_LSEND; 486 udc_regs->rsel = UDC_RSEL_SEND; 487 } else { 488 udc_regs->mode_lo = UDC_MODE_LRECV; 489 udc_regs->rsel = UDC_RSEL_RECV; 490 } 491 492 /* announce location of regs block */ 493 sun3_udc_write(((dvma_vtob(udc_regs) & 0xff0000) >> 8), 494 UDC_CHN_HI); 495 496 sun3_udc_write((dvma_vtob(udc_regs) & 0xffff), UDC_CHN_LO); 497 498 /* set dma master on */ 499 sun3_udc_write(0xd, UDC_MODE); 500 501 /* interrupt enable */ 502 sun3_udc_write(UDC_INT_ENABLE, UDC_CSR); 503 504 return count; 505 506} 507 508static inline unsigned long sun3scsi_dma_count(struct Scsi_Host *instance) 509{ 510 unsigned short resid; 511 512 dregs->udc_addr = 0x32; 513 udelay(SUN3_DMA_DELAY); 514 resid = dregs->udc_data; 515 udelay(SUN3_DMA_DELAY); 516 resid *= 2; 517 518 return (unsigned long) resid; 519} 520 521static inline unsigned long sun3scsi_dma_residual(struct Scsi_Host *instance) 522{ 523 return last_residual; 524} 525 526static inline unsigned long sun3scsi_dma_xfer_len(unsigned long wanted, Scsi_Cmnd *cmd, 527 int write_flag) 528{ 529 if((cmd->request.cmd == 0) || (cmd->request.cmd == 1)) 530 return wanted; 531 else 532 return 0; 533} 534 535/* clean up after our dma is done */ 536static int sun3scsi_dma_finish(int write_flag) 537{ 538 unsigned short count; 539 unsigned short fifo; 540 int ret = 0; 541 542 sun3_dma_active = 0; 543 // check to empty the fifo on a read 544 if(!write_flag) { 545 int tmo = 20000; /* .2 sec */ 546 547 while(1) { 548 if(dregs->csr & CSR_FIFO_EMPTY) 549 break; 550 551 if(--tmo <= 0) 552 return 1; 553 554 udelay(10); 555 } 556 } 557 558 559 count = sun3scsi_dma_count(default_instance); 560#ifdef OLDDMA 561 562 /* if we've finished a read, copy out the data we read */ 563 if(sun3_dma_orig_addr) { 564 /* check for residual bytes after dma end */ 565 if(count && (NCR5380_read(BUS_AND_STATUS_REG) & 566 (BASR_PHASE_MATCH | BASR_ACK))) { 567 printk("scsi%d: sun3_scsi_finish: read overrun baby... ", default_instance->host_no); 568 printk("basr now %02x\n", NCR5380_read(BUS_AND_STATUS_REG)); 569 ret = count; 570 } 571 572 /* copy in what we dma'd no matter what */ 573 memcpy(sun3_dma_orig_addr, dmabuf, sun3_dma_orig_count); 574 sun3_dma_orig_addr = NULL; 575 576 } 577#else 578 579 fifo = dregs->fifo_count; 580 last_residual = fifo; 581 582 /* empty bytes from the fifo which didn't make it */ 583 if((!write_flag) && (count - fifo) == 2) { 584 unsigned short data; 585 unsigned char *vaddr; 586 587 data = dregs->fifo_data; 588 vaddr = (unsigned char *)dvma_btov(sun3_dma_orig_addr); 589 590 vaddr += (sun3_dma_orig_count - fifo); 591 592 vaddr[-2] = (data & 0xff00) >> 8; 593 vaddr[-1] = (data & 0xff); 594 } 595 596 dvma_unmap(sun3_dma_orig_addr); 597 sun3_dma_orig_addr = NULL; 598#endif 599 sun3_udc_write(UDC_RESET, UDC_CSR); 600 dregs->fifo_count = 0; 601 dregs->csr &= ~CSR_SEND; 602 603 /* reset fifo */ 604 dregs->csr &= ~CSR_FIFO; 605 dregs->csr |= CSR_FIFO; 606 607 sun3_dma_setup_done = NULL; 608 609 return ret; 610 611} 612 613#include "sun3_NCR5380.c" 614 615static Scsi_Host_Template driver_template = SUN3_NCR5380; 616 617#include "scsi_module.c" 618 619MODULE_LICENSE("GPL"); 620