1/* 2 * tms380tr.h: TI TMS380 Token Ring driver for Linux 3 * 4 * Authors: 5 * - Christoph Goos <cgoos@syskonnect.de> 6 * - Adam Fritzler <mid@auk.cx> 7 */ 8 9#ifndef __LINUX_TMS380TR_H 10#define __LINUX_TMS380TR_H 11 12#ifdef __KERNEL__ 13 14/* module prototypes */ 15int tms380tr_open(struct net_device *dev); 16int tms380tr_close(struct net_device *dev); 17void tms380tr_interrupt(int irq, void *dev_id, struct pt_regs *regs); 18int tmsdev_init(struct net_device *dev, unsigned long dmalimit, 19 struct pci_dev *pdev); 20void tmsdev_term(struct net_device *dev); 21void tms380tr_wait(unsigned long time); 22 23#define TMS380TR_MAX_ADAPTERS 7 24 25#define SEND_TIMEOUT 10*HZ 26 27#define TR_RCF_LONGEST_FRAME_MASK 0x0070 28#define TR_RCF_FRAME4K 0x0030 29 30/*------------------------------------------------------------------*/ 31/* Bit order for adapter communication with DMA */ 32/* -------------------------------------------------------------- */ 33/* Bit 8 | 9| 10| 11|| 12| 13| 14| 15|| 0| 1| 2| 3|| 4| 5| 6| 7| */ 34/* -------------------------------------------------------------- */ 35/* The bytes in a word must be byte swapped. Also, if a double */ 36/* word is used for storage, then the words, as well as the bytes, */ 37/* must be swapped. */ 38/* Bit order for adapter communication with DIO */ 39/* -------------------------------------------------------------- */ 40/* Bit 0 | 1| 2| 3|| 4| 5| 6| 7|| 8| 9| 10| 11|| 12| 13| 14| 15| */ 41/* -------------------------------------------------------------- */ 42/*------------------------------------------------------------------*/ 43 44/* Swap words of a long. */ 45#define SWAPW(x) (((x) << 16) | ((x) >> 16)) 46 47/* Get the low byte of a word. */ 48#define LOBYTE(w) ((unsigned char)(w)) 49 50/* Get the high byte of a word. */ 51#define HIBYTE(w) ((unsigned char)((unsigned short)(w) >> 8)) 52 53/* Get the low word of a long. */ 54#define LOWORD(l) ((unsigned short)(l)) 55 56/* Get the high word of a long. */ 57#define HIWORD(l) ((unsigned short)((unsigned long)(l) >> 16)) 58 59 60 61/* Token ring adapter I/O addresses for normal mode. */ 62 63/* 64 * The SIF registers. Common to all adapters. 65 */ 66/* Basic SIF (SRSX = 0) */ 67#define SIFDAT 0x00 /* SIF/DMA data. */ 68#define SIFINC 0x02 /* IO Word data with auto increment. */ 69#define SIFINH 0x03 /* IO Byte data with auto increment. */ 70#define SIFADR 0x04 /* SIF/DMA Address. */ 71#define SIFCMD 0x06 /* SIF Command. */ 72#define SIFSTS 0x06 /* SIF Status. */ 73 74/* "Extended" SIF (SRSX = 1) */ 75#define SIFACL 0x08 /* SIF Adapter Control Register. */ 76#define SIFADD 0x0a /* SIF/DMA Address. -- 0x0a */ 77#define SIFADX 0x0c /* 0x0c */ 78#define DMALEN 0x0e /* SIF DMA length. -- 0x0e */ 79 80/* 81 * POS Registers. Only for ISA Adapters. 82 */ 83#define POSREG 0x10 /* Adapter Program Option Select (POS) 84 * Register: base IO address + 16 byte. 85 */ 86#define POSREG_2 24L /* only for TR4/16+ adapter 87 * base IO address + 24 byte. -- 0x18 88 */ 89 90/* SIFCMD command codes (high-low) */ 91#define CMD_INTERRUPT_ADAPTER 0x8000 /* Cause internal adapter interrupt */ 92#define CMD_ADAPTER_RESET 0x4000 /* Hardware reset of adapter */ 93#define CMD_SSB_CLEAR 0x2000 /* Acknowledge to adapter to 94 * system interrupts. 95 */ 96#define CMD_EXECUTE 0x1000 /* Execute SCB command */ 97#define CMD_SCB_REQUEST 0x0800 /* Request adapter to interrupt 98 * system when SCB is available for 99 * another command. 100 */ 101#define CMD_RX_CONTINUE 0x0400 /* Continue receive after odd pointer 102 * stop. (odd pointer receive method) 103 */ 104#define CMD_RX_VALID 0x0200 /* Now actual RPL is valid. */ 105#define CMD_TX_VALID 0x0100 /* Now actual TPL is valid. (valid 106 * bit receive/transmit method) 107 */ 108#define CMD_SYSTEM_IRQ 0x0080 /* Adapter-to-attached-system 109 * interrupt is reset. 110 */ 111#define CMD_CLEAR_SYSTEM_IRQ 0x0080 /* Clear SYSTEM_INTERRUPT bit. 112 * (write: 1=ignore, 0=reset) 113 */ 114#define EXEC_SOFT_RESET 0xFF00 /* adapter soft reset. (restart 115 * adapter after hardware reset) 116 */ 117 118 119/* ACL commands (high-low) */ 120#define ACL_SWHLDA 0x0800 /* Software hold acknowledge. */ 121#define ACL_SWDDIR 0x0400 /* Data transfer direction. */ 122#define ACL_SWHRQ 0x0200 /* Pseudo DMA operation. */ 123#define ACL_PSDMAEN 0x0100 /* Enable pseudo system DMA. */ 124#define ACL_ARESET 0x0080 /* Adapter hardware reset command. 125 * (held in reset condition as 126 * long as bit is set) 127 */ 128#define ACL_CPHALT 0x0040 /* Communication processor halt. 129 * (can only be set while ACL_ARESET 130 * bit is set; prevents adapter 131 * processor from executing code while 132 * downloading firmware) 133 */ 134#define ACL_BOOT 0x0020 135#define ACL_SINTEN 0x0008 /* System interrupt enable/disable 136 * (1/0): can be written if ACL_ARESET 137 * is zero. 138 */ 139#define ACL_PEN 0x0004 140 141#define ACL_NSELOUT0 0x0002 142#define ACL_NSELOUT1 0x0001 /* NSELOUTx have a card-specific 143 * meaning for setting ring speed. 144 */ 145 146#define PS_DMA_MASK (ACL_SWHRQ | ACL_PSDMAEN) 147 148 149/* SIFSTS register return codes (high-low) */ 150#define STS_SYSTEM_IRQ 0x0080 /* Adapter-to-attached-system 151 * interrupt is valid. 152 */ 153#define STS_INITIALIZE 0x0040 /* INITIALIZE status. (ready to 154 * initialize) 155 */ 156#define STS_TEST 0x0020 /* TEST status. (BUD not completed) */ 157#define STS_ERROR 0x0010 /* ERROR status. (unrecoverable 158 * HW error occurred) 159 */ 160#define STS_MASK 0x00F0 /* Mask interesting status bits. */ 161#define STS_ERROR_MASK 0x000F /* Get Error Code by masking the 162 * interrupt code bits. 163 */ 164#define ADAPTER_INT_PTRS 0x0A00 /* Address offset of adapter internal 165 * pointers 01:0a00 (high-low) have to 166 * be read after init and before open. 167 */ 168 169 170/* Interrupt Codes (only MAC IRQs) */ 171#define STS_IRQ_ADAPTER_CHECK 0x0000 /* unrecoverable hardware or 172 * software error. 173 */ 174#define STS_IRQ_RING_STATUS 0x0004 /* SSB is updated with ring status. */ 175#define STS_IRQ_LLC_STATUS 0x0005 /* Not used in MAC-only microcode */ 176#define STS_IRQ_SCB_CLEAR 0x0006 /* SCB clear, following an 177 * SCB_REQUEST IRQ. 178 */ 179#define STS_IRQ_TIMER 0x0007 /* Not normally used in MAC ucode */ 180#define STS_IRQ_COMMAND_STATUS 0x0008 /* SSB is updated with command 181 * status. 182 */ 183#define STS_IRQ_RECEIVE_STATUS 0x000A /* SSB is updated with receive 184 * status. 185 */ 186#define STS_IRQ_TRANSMIT_STATUS 0x000C /* SSB is updated with transmit 187 * status 188 */ 189#define STS_IRQ_RECEIVE_PENDING 0x000E /* Not used in MAC-only microcode */ 190#define STS_IRQ_MASK 0x000F /* = STS_ERROR_MASK. */ 191 192 193/* TRANSMIT_STATUS completion code: (SSB.Parm[0]) */ 194#define COMMAND_COMPLETE 0x0080 /* TRANSMIT command completed 195 * (avoid this!) issue another transmit 196 * to send additional frames. 197 */ 198#define FRAME_COMPLETE 0x0040 /* Frame has been transmitted; 199 * INTERRUPT_FRAME bit was set in the 200 * CSTAT request; indication of possibly 201 * more than one frame transmissions! 202 * SSB.Parm[0-1]: 32 bit pointer to 203 * TPL of last frame. 204 */ 205#define LIST_ERROR 0x0020 /* Error in one of the TPLs that 206 * compose the frame; TRANSMIT 207 * terminated; Parm[1-2]: 32bit pointer 208 * to TPL which starts the error 209 * frame; error details in bits 8-13. 210 * (14?) 211 */ 212#define FRAME_SIZE_ERROR 0x8000 /* FRAME_SIZE does not equal the sum of 213 * the valid DATA_COUNT fields; 214 * FRAME_SIZE less than header plus 215 * information field. (15 bytes + 216 * routing field) Or if FRAME_SIZE 217 * was specified as zero in one list. 218 */ 219#define TX_THRESHOLD 0x4000 /* FRAME_SIZE greater than (BUFFER_SIZE 220 * - 9) * TX_BUF_MAX. 221 */ 222#define ODD_ADDRESS 0x2000 /* Odd forward pointer value is 223 * read on a list without END_FRAME 224 * indication. 225 */ 226#define FRAME_ERROR 0x1000 /* START_FRAME bit (not) anticipated, 227 * but (not) set. 228 */ 229#define ACCESS_PRIORITY_ERROR 0x0800 /* Access priority requested has not 230 * been allowed. 231 */ 232#define UNENABLED_MAC_FRAME 0x0400 /* MAC frame has source class of zero 233 * or MAC frame PCF ATTN field is 234 * greater than one. 235 */ 236#define ILLEGAL_FRAME_FORMAT 0x0200 /* Bit 0 or FC field was set to one. */ 237 238 239/* 240 * Since we need to support some functions even if the adapter is in a 241 * CLOSED state, we have a (pseudo-) command queue which holds commands 242 * that are outstandig to be executed. 243 * 244 * Each time a command completes, an interrupt occurs and the next 245 * command is executed. The command queue is actually a simple word with 246 * a bit for each outstandig command. Therefore the commands will not be 247 * executed in the order they have been queued. 248 * 249 * The following defines the command code bits and the command queue: 250 */ 251#define OC_OPEN 0x0001 /* OPEN command */ 252#define OC_TRANSMIT 0x0002 /* TRANSMIT command */ 253#define OC_TRANSMIT_HALT 0x0004 /* TRANSMIT_HALT command */ 254#define OC_RECEIVE 0x0008 /* RECEIVE command */ 255#define OC_CLOSE 0x0010 /* CLOSE command */ 256#define OC_SET_GROUP_ADDR 0x0020 /* SET_GROUP_ADDR command */ 257#define OC_SET_FUNCT_ADDR 0x0040 /* SET_FUNCT_ADDR command */ 258#define OC_READ_ERROR_LOG 0x0080 /* READ_ERROR_LOG command */ 259#define OC_READ_ADAPTER 0x0100 /* READ_ADAPTER command */ 260#define OC_MODIFY_OPEN_PARMS 0x0400 /* MODIFY_OPEN_PARMS command */ 261#define OC_RESTORE_OPEN_PARMS 0x0800 /* RESTORE_OPEN_PARMS command */ 262#define OC_SET_FIRST_16_GROUP 0x1000 /* SET_FIRST_16_GROUP command */ 263#define OC_SET_BRIDGE_PARMS 0x2000 /* SET_BRIDGE_PARMS command */ 264#define OC_CONFIG_BRIDGE_PARMS 0x4000 /* CONFIG_BRIDGE_PARMS command */ 265 266#define OPEN 0x0300 /* C: open command. S: completion. */ 267#define TRANSMIT 0x0400 /* C: transmit command. S: completion 268 * status. (reject: COMMAND_REJECT if 269 * adapter not opened, TRANSMIT already 270 * issued or address passed in the SCB 271 * not word aligned) 272 */ 273#define TRANSMIT_HALT 0x0500 /* C: interrupt TX TPL chain; if no 274 * TRANSMIT command issued, the command 275 * is ignored (completion with TRANSMIT 276 * status (0x0400)!) 277 */ 278#define RECEIVE 0x0600 /* C: receive command. S: completion 279 * status. (reject: COMMAND_REJECT if 280 * adapter not opened, RECEIVE already 281 * issued or address passed in the SCB 282 * not word aligned) 283 */ 284#define CLOSE 0x0700 /* C: close adapter. S: completion. 285 * (COMMAND_REJECT if adapter not open) 286 */ 287#define SET_GROUP_ADDR 0x0800 /* C: alter adapter group address after 288 * OPEN. S: completion. (COMMAND_REJECT 289 * if adapter not open) 290 */ 291#define SET_FUNCT_ADDR 0x0900 /* C: alter adapter functional address 292 * after OPEN. S: completion. 293 * (COMMAND_REJECT if adapter not open) 294 */ 295#define READ_ERROR_LOG 0x0A00 /* C: read adapter error counters. 296 * S: completion. (command ignored 297 * if adapter not open!) 298 */ 299#define READ_ADAPTER 0x0B00 /* C: read data from adapter memory. 300 * (important: after init and before 301 * open!) S: completion. (ADAPTER_CHECK 302 * interrupt if undefined storage area 303 * read) 304 */ 305#define MODIFY_OPEN_PARMS 0x0D00 /* C: modify some adapter operational 306 * parameters. (bit correspondend to 307 * WRAP_INTERFACE is ignored) 308 * S: completion. (reject: 309 * COMMAND_REJECT) 310 */ 311#define RESTORE_OPEN_PARMS 0x0E00 /* C: modify some adapter operational 312 * parameters. (bit correspondend 313 * to WRAP_INTERFACE is ignored) 314 * S: completion. (reject: 315 * COMMAND_REJECT) 316 */ 317#define SET_FIRST_16_GROUP 0x0F00 /* C: alter the first two bytes in 318 * adapter group address. 319 * S: completion. (reject: 320 * COMMAND_REJECT) 321 */ 322#define SET_BRIDGE_PARMS 0x1000 /* C: values and conditions for the 323 * adapter hardware to use when frames 324 * are copied for forwarding. 325 * S: completion. (reject: 326 * COMMAND_REJECT) 327 */ 328#define CONFIG_BRIDGE_PARMS 0x1100 /* C: .. 329 * S: completion. (reject: 330 * COMMAND_REJECT) 331 */ 332 333#define SPEED_4 4 334#define SPEED_16 16 /* Default transmission speed */ 335 336 337/* Initialization Parameter Block (IPB); word alignment necessary! */ 338#define BURST_SIZE 0x0018 /* Default burst size */ 339#define BURST_MODE 0x9F00 /* Burst mode enable */ 340#define DMA_RETRIES 0x0505 /* Magic DMA retry number... */ 341 342#define CYCLE_TIME 3 /* Default AT-bus cycle time: 500 ns 343 * (later adapter version: fix cycle time!) 344 */ 345#define LINE_SPEED_BIT 0x80 346 347/* Macro definition for the wait function. */ 348#define ONE_SECOND_TICKS 1000000 349#define HALF_SECOND (ONE_SECOND_TICKS / 2) 350#define ONE_SECOND (ONE_SECOND_TICKS) 351#define TWO_SECONDS (ONE_SECOND_TICKS * 2) 352#define THREE_SECONDS (ONE_SECOND_TICKS * 3) 353#define FOUR_SECONDS (ONE_SECOND_TICKS * 4) 354#define FIVE_SECONDS (ONE_SECOND_TICKS * 5) 355 356#define BUFFER_SIZE 2048 /* Buffers on Adapter */ 357 358#pragma pack(1) 359typedef struct { 360 unsigned short Init_Options; /* Initialize with burst mode; 361 * LLC disabled. (MAC only) 362 */ 363 364 /* Interrupt vectors the adapter places on attached system bus. */ 365 u_int8_t CMD_Status_IV; /* Interrupt vector: command status. */ 366 u_int8_t TX_IV; /* Interrupt vector: transmit. */ 367 u_int8_t RX_IV; /* Interrupt vector: receive. */ 368 u_int8_t Ring_Status_IV; /* Interrupt vector: ring status. */ 369 u_int8_t SCB_Clear_IV; /* Interrupt vector: SCB clear. */ 370 u_int8_t Adapter_CHK_IV; /* Interrupt vector: adapter check. */ 371 372 u_int16_t RX_Burst_Size; /* Max. number of transfer cycles. */ 373 u_int16_t TX_Burst_Size; /* During DMA burst; even value! */ 374 u_int16_t DMA_Abort_Thrhld; /* Number of DMA retries. */ 375 376 u_int32_t SCB_Addr; /* SCB address: even, word aligned, high-low */ 377 u_int32_t SSB_Addr; /* SSB address: even, word aligned, high-low */ 378} IPB, *IPB_Ptr; 379#pragma pack() 380 381/* 382 * OPEN Command Parameter List (OCPL) (can be reused, if the adapter has to 383 * be reopened) 384 */ 385#define BUFFER_SIZE 2048 /* Buffers on Adapter. */ 386#define TPL_SIZE 8+6*TX_FRAG_NUM /* Depending on fragments per TPL. */ 387#define RPL_SIZE 14 /* (with TI firmware v2.26 handling 388 * up to nine fragments possible) 389 */ 390#define TX_BUF_MIN 20 /* ??? (Stephan: calculation with */ 391#define TX_BUF_MAX 40 /* BUFFER_SIZE and MAX_FRAME_SIZE) ??? 392 */ 393#define DISABLE_EARLY_TOKEN_RELEASE 0x1000 394 395/* OPEN Options (high-low) */ 396#define WRAP_INTERFACE 0x0080 /* Inserting omitted for test 397 * purposes; transmit data appears 398 * as receive data. (useful for 399 * testing; change: CLOSE necessary) 400 */ 401#define DISABLE_HARD_ERROR 0x0040 /* On HARD_ERROR & TRANSMIT_BEACON 402 * no RING.STATUS interrupt. 403 */ 404#define DISABLE_SOFT_ERROR 0x0020 /* On SOFT_ERROR, no RING.STATUS 405 * interrupt. 406 */ 407#define PASS_ADAPTER_MAC_FRAMES 0x0010 /* Passing unsupported MAC frames 408 * to system. 409 */ 410#define PASS_ATTENTION_FRAMES 0x0008 /* All changed attention MAC frames are 411 * passed to the system. 412 */ 413#define PAD_ROUTING_FIELD 0x0004 /* Routing field is padded to 18 414 * bytes. 415 */ 416#define FRAME_HOLD 0x0002 /*Adapter waits for entire frame before 417 * initiating DMA transfer; otherwise: 418 * DMA transfer initiation if internal 419 * buffer filled. 420 */ 421#define CONTENDER 0x0001 /* Adapter participates in the monitor 422 * contention process. 423 */ 424#define PASS_BEACON_MAC_FRAMES 0x8000 /* Adapter passes beacon MAC frames 425 * to the system. 426 */ 427#define EARLY_TOKEN_RELEASE 0x1000 /* Only valid in 16 Mbps operation; 428 * 0 = ETR. (no effect in 4 Mbps 429 * operation) 430 */ 431#define COPY_ALL_MAC_FRAMES 0x0400 /* All MAC frames are copied to 432 * the system. (after OPEN: duplicate 433 * address test (DAT) MAC frame is 434 * first received frame copied to the 435 * system) 436 */ 437#define COPY_ALL_NON_MAC_FRAMES 0x0200 /* All non MAC frames are copied to 438 * the system. 439 */ 440#define PASS_FIRST_BUF_ONLY 0x0100 /* Passes only first internal buffer 441 * of each received frame; FrameSize 442 * of RPLs must contain internal 443 * BUFFER_SIZE bits for promiscous mode. 444 */ 445#define ENABLE_FULL_DUPLEX_SELECTION 0x2000 446 /* Enable the use of full-duplex 447 * settings with bits in byte 22 in 448 * ocpl. (new feature in firmware 449 * version 3.09) 450 */ 451 452/* Full-duplex settings */ 453#define OPEN_FULL_DUPLEX_OFF 0x0000 454#define OPEN_FULL_DUPLEX_ON 0x00c0 455#define OPEN_FULL_DUPLEX_AUTO 0x0080 456 457#define PROD_ID_SIZE 18 /* Length of product ID. */ 458 459#define TX_FRAG_NUM 3 /* Number of fragments used in one TPL. */ 460#define TX_MORE_FRAGMENTS 0x8000 /* Bit set in DataCount to indicate more 461 * fragments following. 462 */ 463 464#define ISA_MAX_ADDRESS 0x00ffffff 465#define PCI_MAX_ADDRESS 0xffffffff 466 467#pragma pack(1) 468typedef struct { 469 u_int16_t OPENOptions; 470 u_int8_t NodeAddr[6]; /* Adapter node address; use ROM 471 * address 472 */ 473 u_int32_t GroupAddr; /* Multicast: high order 474 * bytes = 0xC000 475 */ 476 u_int32_t FunctAddr; /* High order bytes = 0xC000 */ 477 u_int16_t RxListSize; /* RPL size: 0 (=26), 14, 20 or 478 * 26 bytes read by the adapter. 479 * (Depending on the number of 480 * fragments/list) 481 */ 482 u_int16_t TxListSize; /* TPL size */ 483 u_int16_t BufSize; /* Is automatically rounded up to the 484 * nearest nK boundary. 485 */ 486 u_int16_t FullDuplex; 487 u_int16_t Reserved; 488 u_int8_t TXBufMin; /* Number of adapter buffers reserved 489 * for transmission a minimum of 2 490 * buffers must be allocated. 491 */ 492 u_int8_t TXBufMax; /* Maximum number of adapter buffers 493 * for transmit; a minimum of 2 buffers 494 * must be available for receive. 495 * Default: 6 496 */ 497 u_int16_t ProdIDAddr[2];/* Pointer to product ID. */ 498} OPB, *OPB_Ptr; 499#pragma pack() 500 501/* 502 * SCB: adapter commands enabled by the host system started by writing 503 * CMD_INTERRUPT_ADAPTER | CMD_EXECUTE (|SCB_REQUEST) to the SIFCMD IO 504 * register. (special case: | CMD_SYSTEM_IRQ for initialization) 505 */ 506#pragma pack(1) 507typedef struct { 508 u_int16_t CMD; /* Command code */ 509 u_int16_t Parm[2]; /* Pointer to Command Parameter Block */ 510} SCB; /* System Command Block (32 bit physical address; big endian)*/ 511#pragma pack() 512 513/* 514 * SSB: adapter command return status can be evaluated after COMMAND_STATUS 515 * adapter to system interrupt after reading SSB, the availability of the SSB 516 * has to be told the adapter by writing CMD_INTERRUPT_ADAPTER | CMD_SSB_CLEAR 517 * in the SIFCMD IO register. 518 */ 519#pragma pack(1) 520typedef struct { 521 u_int16_t STS; /* Status code */ 522 u_int16_t Parm[3]; /* Parameter or pointer to Status Parameter 523 * Block. 524 */ 525} SSB; /* System Status Block (big endian - physical address) */ 526#pragma pack() 527 528typedef struct { 529 unsigned short BurnedInAddrPtr; /* Pointer to adapter burned in 530 * address. (BIA) 531 */ 532 unsigned short SoftwareLevelPtr;/* Pointer to software level data. */ 533 unsigned short AdapterAddrPtr; /* Pointer to adapter addresses. */ 534 unsigned short AdapterParmsPtr; /* Pointer to adapter parameters. */ 535 unsigned short MACBufferPtr; /* Pointer to MAC buffer. (internal) */ 536 unsigned short LLCCountersPtr; /* Pointer to LLC counters. */ 537 unsigned short SpeedFlagPtr; /* Pointer to data rate flag. 538 * (4/16 Mbps) 539 */ 540 unsigned short AdapterRAMPtr; /* Pointer to adapter RAM found. (KB) */ 541} INTPTRS; /* Adapter internal pointers */ 542 543#pragma pack(1) 544typedef struct { 545 u_int8_t Line_Error; /* Line error: code violation in 546 * frame or in a token, or FCS error. 547 */ 548 u_int8_t Internal_Error; /* IBM specific. (Reserved_1) */ 549 u_int8_t Burst_Error; 550 u_int8_t ARI_FCI_Error; /* ARI/FCI bit zero in AMP or 551 * SMP MAC frame. 552 */ 553 u_int8_t AbortDelimeters; /* IBM specific. (Reserved_2) */ 554 u_int8_t Reserved_3; 555 u_int8_t Lost_Frame_Error; /* Receive of end of transmitted 556 * frame failed. 557 */ 558 u_int8_t Rx_Congest_Error; /* Adapter in repeat mode has not 559 * enough buffer space to copy incoming 560 * frame. 561 */ 562 u_int8_t Frame_Copied_Error; /* ARI bit not zero in frame 563 * addressed to adapter. 564 */ 565 u_int8_t Frequency_Error; /* IBM specific. (Reserved_4) */ 566 u_int8_t Token_Error; /* (active only in monitor station) */ 567 u_int8_t Reserved_5; 568 u_int8_t DMA_Bus_Error; /* DMA bus errors not exceeding the 569 * abort thresholds. 570 */ 571 u_int8_t DMA_Parity_Error; /* DMA parity errors not exceeding 572 * the abort thresholds. 573 */ 574} ERRORTAB; /* Adapter error counters */ 575#pragma pack() 576 577 578/*--------------------- Send and Receive definitions -------------------*/ 579#pragma pack(1) 580typedef struct { 581 u_int16_t DataCount; /* Value 0, even and odd values are 582 * permitted; value is unaltered most 583 * significant bit set: following 584 * fragments last fragment: most 585 * significant bit is not evaluated. 586 * (???) 587 */ 588 u_int32_t DataAddr; /* Pointer to frame data fragment; 589 * even or odd. 590 */ 591} Fragment; 592#pragma pack() 593 594#define MAX_FRAG_NUMBERS 9 /* Maximal number of fragments possible to use 595 * in one RPL/TPL. (depending on TI firmware 596 * version) 597 */ 598#define MAX_TX_QUEUE 10 /* Maximal number of skb's queued in driver. */ 599 600/* 601 * AC (1), FC (1), Dst (6), Src (6), RIF (18), Data (4472) = 4504 602 * The packet size can be one of the follows: 548, 1502, 2084, 4504, 8176, 603 * 11439, 17832. Refer to TMS380 Second Generation Token Ring User's Guide 604 * Page 2-27. 605 */ 606#define HEADER_SIZE (1 + 1 + 6 + 6) 607#define SRC_SIZE 18 608#define MIN_DATA_SIZE 516 609#define DEFAULT_DATA_SIZE 4472 610#define MAX_DATA_SIZE 17800 611 612#define DEFAULT_PACKET_SIZE (HEADER_SIZE + SRC_SIZE + DEFAULT_DATA_SIZE) 613#define MIN_PACKET_SIZE (HEADER_SIZE + SRC_SIZE + MIN_DATA_SIZE) 614#define MAX_PACKET_SIZE (HEADER_SIZE + SRC_SIZE + MAX_DATA_SIZE) 615 616/* 617 * Macros to deal with the frame status field. 618 */ 619#define AC_NOT_RECOGNIZED 0x00 620#define GROUP_BIT 0x80 621#define GET_TRANSMIT_STATUS_HIGH_BYTE(Ts) ((unsigned char)((Ts) >> 8)) 622#define GET_FRAME_STATUS_HIGH_AC(Fs) ((unsigned char)(((Fs) & 0xC0) >> 6)) 623#define GET_FRAME_STATUS_LOW_AC(Fs) ((unsigned char)(((Fs) & 0x0C) >> 2)) 624#define DIRECTED_FRAME(Context) (!((Context)->MData[2] & GROUP_BIT)) 625 626 627/*--------------------- Send Functions ---------------------------------*/ 628/* define TX_CSTAT _REQUEST (R) and _COMPLETE (C) values (high-low) */ 629 630#define TX_VALID 0x0080 /* R: set via TRANSMIT.VALID interrupt. 631 * C: always reset to zero! 632 */ 633#define TX_FRAME_COMPLETE 0x0040 /* R: must be reset to zero. 634 * C: set to one. 635 */ 636#define TX_START_FRAME 0x0020 /* R: start of a frame: 1 637 * C: unchanged. 638 */ 639#define TX_END_FRAME 0x0010 /* R: end of a frame: 1 640 * C: unchanged. 641 */ 642#define TX_FRAME_IRQ 0x0008 /* R: request interrupt generation 643 * after transmission. 644 * C: unchanged. 645 */ 646#define TX_ERROR 0x0004 /* R: reserved. 647 * C: set to one if Error occurred. 648 */ 649#define TX_INTERFRAME_WAIT 0x0004 650#define TX_PASS_CRC 0x0002 /* R: set if CRC value is already 651 * calculated. (valid only in 652 * FRAME_START TPL) 653 * C: unchanged. 654 */ 655#define TX_PASS_SRC_ADDR 0x0001 /* R: adapter uses explicit frame 656 * source address and does not overwrite 657 * with the adapter node address. 658 * (valid only in FRAME_START TPL) 659 * 660 * C: unchanged. 661 */ 662#define TX_STRIP_FS 0xFF00 /* R: reserved. 663 * C: if no Transmission Error, 664 * field contains copy of FS byte after 665 * stripping of frame. 666 */ 667 668/* 669 * Structure of Transmit Parameter Lists (TPLs) (only one frame every TPL, 670 * but possibly multiple TPLs for one frame) the length of the TPLs has to be 671 * initialized in the OPL. (OPEN parameter list) 672 */ 673#define TPL_NUM 3 /* Number of Transmit Parameter Lists. 674 * !! MUST BE >= 3 !! 675 */ 676 677#pragma pack(1) 678typedef struct s_TPL TPL; 679 680struct s_TPL { /* Transmit Parameter List (align on even word boundaries) */ 681 u_int32_t NextTPLAddr; /* Pointer to next TPL in chain; if 682 * pointer is odd: this is the last 683 * TPL. Pointing to itself can cause 684 * problems! 685 */ 686 volatile u_int16_t Status; /* Initialized by the adapter: 687 * CSTAT_REQUEST important: update least 688 * significant bit first! Set by the 689 * adapter: CSTAT_COMPLETE status. 690 */ 691 u_int16_t FrameSize; /* Number of bytes to be transmitted 692 * as a frame including AC/FC, 693 * Destination, Source, Routing field 694 * not including CRC, FS, End Delimiter 695 * (valid only if START_FRAME bit in 696 * CSTAT nonzero) must not be zero in 697 * any list; maximum value: (BUFFER_SIZE 698 * - 8) * TX_BUF_MAX sum of DataCount 699 * values in FragmentList must equal 700 * Frame_Size value in START_FRAME TPL! 701 * frame data fragment list. 702 */ 703 704 /* TPL/RPL size in OPEN parameter list depending on maximal 705 * numbers of fragments used in one parameter list. 706 */ 707 Fragment FragList[TX_FRAG_NUM]; /* Maximum: nine frame fragments in one 708 * TPL actual version of firmware: 9 709 * fragments possible. 710 */ 711#pragma pack() 712 713 /* Special proprietary data and precalculations */ 714 715 TPL *NextTPLPtr; /* Pointer to next TPL in chain. */ 716 unsigned char *MData; 717 struct sk_buff *Skb; 718 unsigned char TPLIndex; 719 volatile unsigned char BusyFlag;/* Flag: TPL busy? */ 720 dma_addr_t DMABuff; /* DMA IO bus address from pci_map */ 721}; 722 723/* ---------------------Receive Functions-------------------------------* 724 * define RECEIVE_CSTAT_REQUEST (R) and RECEIVE_CSTAT_COMPLETE (C) values. 725 * (high-low) 726 */ 727#define RX_VALID 0x0080 /* R: set; tell adapter with 728 * RECEIVE.VALID interrupt. 729 * C: reset to zero. 730 */ 731#define RX_FRAME_COMPLETE 0x0040 /* R: must be reset to zero, 732 * C: set to one. 733 */ 734#define RX_START_FRAME 0x0020 /* R: must be reset to zero. 735 * C: set to one on the list. 736 */ 737#define RX_END_FRAME 0x0010 /* R: must be reset to zero. 738 * C: set to one on the list 739 * that ends the frame. 740 */ 741#define RX_FRAME_IRQ 0x0008 /* R: request interrupt generation 742 * after receive. 743 * C: unchanged. 744 */ 745#define RX_INTERFRAME_WAIT 0x0004 /* R: after receiving a frame: 746 * interrupt and wait for a 747 * RECEIVE.CONTINUE. 748 * C: unchanged. 749 */ 750#define RX_PASS_CRC 0x0002 /* R: if set, the adapter includes 751 * the CRC in data passed. (last four 752 * bytes; valid only if FRAME_START is 753 * set) 754 * C: set, if CRC is included in 755 * received data. 756 */ 757#define RX_PASS_SRC_ADDR 0x0001 /* R: adapter uses explicit frame 758 * source address and does not 759 * overwrite with the adapter node 760 * address. (valid only if FRAME_START 761 * is set) 762 * C: unchanged. 763 */ 764#define RX_RECEIVE_FS 0xFC00 /* R: reserved; must be reset to zero. 765 * C: on lists with START_FRAME, field 766 * contains frame status field from 767 * received frame; otherwise cleared. 768 */ 769#define RX_ADDR_MATCH 0x0300 /* R: reserved; must be reset to zero. 770 * C: address match code mask. 771 */ 772#define RX_STATUS_MASK 0x00FF /* Mask for receive status bits. */ 773 774#define RX_INTERN_ADDR_MATCH 0x0100 /* C: internally address match. */ 775#define RX_EXTERN_ADDR_MATCH 0x0200 /* C: externally matched via 776 * XMATCH/XFAIL interface. 777 */ 778#define RX_INTEXT_ADDR_MATCH 0x0300 /* C: internally and externally 779 * matched. 780 */ 781#define RX_READY (RX_VALID | RX_FRAME_IRQ) /* Ready for receive. */ 782 783/* Constants for Command Status Interrupt. 784 * COMMAND_REJECT status field bit functions (SSB.Parm[0]) 785 */ 786#define ILLEGAL_COMMAND 0x0080 /* Set if an unknown command 787 * is issued to the adapter 788 */ 789#define ADDRESS_ERROR 0x0040 /* Set if any address field in 790 * the SCB is odd. (not word aligned) 791 */ 792#define ADAPTER_OPEN 0x0020 /* Command issued illegal with 793 * open adapter. 794 */ 795#define ADAPTER_CLOSE 0x0010 /* Command issued illegal with 796 * closed adapter. 797 */ 798#define SAME_COMMAND 0x0008 /* Command issued with same command 799 * already executing. 800 */ 801 802/* OPEN_COMPLETION values (SSB.Parm[0], MSB) */ 803#define NODE_ADDR_ERROR 0x0040 /* Wrong address or BIA read 804 * zero address. 805 */ 806#define LIST_SIZE_ERROR 0x0020 /* If List_Size value not in 0, 807 * 14, 20, 26. 808 */ 809#define BUF_SIZE_ERROR 0x0010 /* Not enough available memory for 810 * two buffers. 811 */ 812#define TX_BUF_COUNT_ERROR 0x0004 /* Remaining receive buffers less than 813 * two. 814 */ 815#define OPEN_ERROR 0x0002 /* Error during ring insertion; more 816 * information in bits 8-15. 817 */ 818 819/* Standard return codes */ 820#define GOOD_COMPLETION 0x0080 /* =OPEN_SUCCESSFULL */ 821#define INVALID_OPEN_OPTION 0x0001 /* OPEN options are not supported by 822 * the adapter. 823 */ 824 825/* OPEN phases; details of OPEN_ERROR (SSB.Parm[0], LSB) */ 826#define OPEN_PHASES_MASK 0xF000 /* Check only the bits 8-11. */ 827#define LOBE_MEDIA_TEST 0x1000 828#define PHYSICAL_INSERTION 0x2000 829#define ADDRESS_VERIFICATION 0x3000 830#define PARTICIPATION_IN_RING_POLL 0x4000 831#define REQUEST_INITIALISATION 0x5000 832#define FULLDUPLEX_CHECK 0x6000 833 834/* OPEN error codes; details of OPEN_ERROR (SSB.Parm[0], LSB) */ 835#define OPEN_ERROR_CODES_MASK 0x0F00 /* Check only the bits 12-15. */ 836#define OPEN_FUNCTION_FAILURE 0x0100 /* Unable to transmit to itself or 837 * frames received before insertion. 838 */ 839#define OPEN_SIGNAL_LOSS 0x0200 /* Signal loss condition detected at 840 * receiver. 841 */ 842#define OPEN_TIMEOUT 0x0500 /* Insertion timer expired before 843 * logical insertion. 844 */ 845#define OPEN_RING_FAILURE 0x0600 /* Unable to receive own ring purge 846 * MAC frames. 847 */ 848#define OPEN_RING_BEACONING 0x0700 /* Beacon MAC frame received after 849 * ring insertion. 850 */ 851#define OPEN_DUPLICATE_NODEADDR 0x0800 /* Other station in ring found 852 * with the same address. 853 */ 854#define OPEN_REQUEST_INIT 0x0900 /* RPS present but does not respond. */ 855#define OPEN_REMOVE_RECEIVED 0x0A00 /* Adapter received a remove adapter 856 * MAC frame. 857 */ 858#define OPEN_FULLDUPLEX_SET 0x0D00 /* Got this with full duplex on when 859 * trying to connect to a normal ring. 860 */ 861 862/* SET_BRIDGE_PARMS return codes: */ 863#define BRIDGE_INVALID_MAX_LEN 0x4000 /* MAX_ROUTING_FIELD_LENGTH odd, 864 * less than 6 or > 30. 865 */ 866#define BRIDGE_INVALID_SRC_RING 0x2000 /* SOURCE_RING number zero, too large 867 * or = TARGET_RING. 868 */ 869#define BRIDGE_INVALID_TRG_RING 0x1000 /* TARGET_RING number zero, too large 870 * or = SOURCE_RING. 871 */ 872#define BRIDGE_INVALID_BRDGE_NO 0x0800 /* BRIDGE_NUMBER too large. */ 873#define BRIDGE_INVALID_OPTIONS 0x0400 /* Invalid bridge options. */ 874#define BRIDGE_DIAGS_FAILED 0x0200 /* Diagnostics of TMS380SRA failed. */ 875#define BRIDGE_NO_SRA 0x0100 /* The TMS380SRA does not exist in HW 876 * configuration. 877 */ 878 879/* 880 * Bring Up Diagnostics error codes. 881 */ 882#define BUD_INITIAL_ERROR 0x0 883#define BUD_CHECKSUM_ERROR 0x1 884#define BUD_ADAPTER_RAM_ERROR 0x2 885#define BUD_INSTRUCTION_ERROR 0x3 886#define BUD_CONTEXT_ERROR 0x4 887#define BUD_PROTOCOL_ERROR 0x5 888#define BUD_INTERFACE_ERROR 0x6 889 890/* BUD constants */ 891#define BUD_MAX_RETRIES 3 892#define BUD_MAX_LOOPCNT 6 893#define BUD_TIMEOUT 3000 894 895/* Initialization constants */ 896#define INIT_MAX_RETRIES 3 /* Maximum three retries. */ 897#define INIT_MAX_LOOPCNT 22 /* Maximum loop counts. */ 898 899/* RING STATUS field values (high/low) */ 900#define SIGNAL_LOSS 0x0080 /* Loss of signal on the ring 901 * detected. 902 */ 903#define HARD_ERROR 0x0040 /* Transmitting or receiving beacon 904 * frames. 905 */ 906#define SOFT_ERROR 0x0020 /* Report error MAC frame 907 * transmitted. 908 */ 909#define TRANSMIT_BEACON 0x0010 /* Transmitting beacon frames on the 910 * ring. 911 */ 912#define LOBE_WIRE_FAULT 0x0008 /* Open or short circuit in the 913 * cable to concentrator; adapter 914 * closed. 915 */ 916#define AUTO_REMOVAL_ERROR 0x0004 /* Lobe wrap test failed, deinserted; 917 * adapter closed. 918 */ 919#define REMOVE_RECEIVED 0x0001 /* Received a remove ring station MAC 920 * MAC frame request; adapter closed. 921 */ 922#define COUNTER_OVERFLOW 0x8000 /* Overflow of one of the adapters 923 * error counters; READ.ERROR.LOG. 924 */ 925#define SINGLE_STATION 0x4000 /* Adapter is the only station on the 926 * ring. 927 */ 928#define RING_RECOVERY 0x2000 /* Claim token MAC frames on the ring; 929 * reset after ring purge frame. 930 */ 931 932#define ADAPTER_CLOSED (LOBE_WIRE_FAULT | AUTO_REMOVAL_ERROR |\ 933 REMOVE_RECEIVED) 934 935/* Adapter_check_block.Status field bit assignments: */ 936#define DIO_PARITY 0x8000 /* Adapter detects bad parity 937 * through direct I/O access. 938 */ 939#define DMA_READ_ABORT 0x4000 /* Aborting DMA read operation 940 * from system Parm[0]: 0=timeout, 941 * 1=parity error, 2=bus error; 942 * Parm[1]: 32 bit pointer to host 943 * system address at failure. 944 */ 945#define DMA_WRITE_ABORT 0x2000 /* Aborting DMA write operation 946 * to system. (parameters analogous to 947 * DMA_READ_ABORT) 948 */ 949#define ILLEGAL_OP_CODE 0x1000 /* Illegal operation code in the 950 * the adapters firmware Parm[0]-2: 951 * communications processor registers 952 * R13-R15. 953 */ 954#define PARITY_ERRORS 0x0800 /* Adapter detects internal bus 955 * parity error. 956 */ 957#define RAM_DATA_ERROR 0x0080 /* Valid only during RAM testing; 958 * RAM data error Parm[0-1]: 32 bit 959 * pointer to RAM location. 960 */ 961#define RAM_PARITY_ERROR 0x0040 /* Valid only during RAM testing; 962 * RAM parity error Parm[0-1]: 32 bit 963 * pointer to RAM location. 964 */ 965#define RING_UNDERRUN 0x0020 /* Internal DMA underrun when 966 * transmitting onto ring. 967 */ 968#define INVALID_IRQ 0x0008 /* Unrecognized interrupt generated 969 * internal to adapter Parm[0-2]: 970 * adapter register R13-R15. 971 */ 972#define INVALID_ERROR_IRQ 0x0004 /* Unrecognized error interrupt 973 * generated Parm[0-2]: adapter register 974 * R13-R15. 975 */ 976#define INVALID_XOP 0x0002 /* Unrecognized XOP request in 977 * communication processor Parm[0-2]: 978 * adapter register R13-R15. 979 */ 980#define CHECKADDR 0x05E0 /* Adapter check status information 981 * address offset. 982 */ 983#define ROM_PAGE_0 0x0000 /* Adapter ROM page 0. */ 984 985/* 986 * RECEIVE.STATUS interrupt result SSB values: (high-low) 987 * (RECEIVE_COMPLETE field bit definitions in SSB.Parm[0]) 988 */ 989#define RX_COMPLETE 0x0080 /* SSB.Parm[0]; SSB.Parm[1]: 32 990 * bit pointer to last RPL. 991 */ 992#define RX_SUSPENDED 0x0040 /* SSB.Parm[0]; SSB.Parm[1]: 32 993 * bit pointer to RPL with odd 994 * forward pointer. 995 */ 996 997/* Valid receive CSTAT: */ 998#define RX_FRAME_CONTROL_BITS (RX_VALID | RX_START_FRAME | RX_END_FRAME | \ 999 RX_FRAME_COMPLETE) 1000#define VALID_SINGLE_BUFFER_FRAME (RX_START_FRAME | RX_END_FRAME | \ 1001 RX_FRAME_COMPLETE) 1002 1003typedef enum SKB_STAT SKB_STAT; 1004enum SKB_STAT { 1005 SKB_UNAVAILABLE, 1006 SKB_DMA_DIRECT, 1007 SKB_DATA_COPY 1008}; 1009 1010/* Receive Parameter List (RPL) The length of the RPLs has to be initialized 1011 * in the OPL. (OPEN parameter list) 1012 */ 1013#define RPL_NUM 3 1014 1015#define RX_FRAG_NUM 1 /* Maximal number of used fragments in one RPL. 1016 * (up to firmware v2.24: 3, now: up to 9) 1017 */ 1018 1019#pragma pack(1) 1020typedef struct s_RPL RPL; 1021struct s_RPL { /* Receive Parameter List */ 1022 u_int32_t NextRPLAddr; /* Pointer to next RPL in chain 1023 * (normalized = physical 32 bit 1024 * address) if pointer is odd: this 1025 * is last RPL. Pointing to itself can 1026 * cause problems! 1027 */ 1028 volatile u_int16_t Status; /* Set by creation of Receive Parameter 1029 * List RECEIVE_CSTAT_COMPLETE set by 1030 * adapter in lists that start or end 1031 * a frame. 1032 */ 1033 volatile u_int16_t FrameSize; /* Number of bytes received as a 1034 * frame including AC/FC, Destination, 1035 * Source, Routing field not including 1036 * CRC, FS (Frame Status), End Delimiter 1037 * (valid only if START_FRAME bit in 1038 * CSTAT nonzero) must not be zero in 1039 * any list; maximum value: (BUFFER_SIZE 1040 * - 8) * TX_BUF_MAX sum of DataCount 1041 * values in FragmentList must equal 1042 * Frame_Size value in START_FRAME TPL! 1043 * frame data fragment list 1044 */ 1045 1046 /* TPL/RPL size in OPEN parameter list depending on maximal numbers 1047 * of fragments used in one parameter list. 1048 */ 1049 Fragment FragList[RX_FRAG_NUM]; /* Maximum: nine frame fragments in 1050 * one TPL. Actual version of firmware: 1051 * 9 fragments possible. 1052 */ 1053#pragma pack() 1054 1055 /* Special proprietary data and precalculations. */ 1056 RPL *NextRPLPtr; /* Logical pointer to next RPL in chain. */ 1057 unsigned char *MData; 1058 struct sk_buff *Skb; 1059 SKB_STAT SkbStat; 1060 int RPLIndex; 1061 dma_addr_t DMABuff; /* DMA IO bus address from pci_map */ 1062}; 1063 1064/* Information that need to be kept for each board. */ 1065typedef struct net_local { 1066#pragma pack(1) 1067 IPB ipb; /* Initialization Parameter Block. */ 1068 SCB scb; /* System Command Block: system to adapter 1069 * communication. 1070 */ 1071 SSB ssb; /* System Status Block: adapter to system 1072 * communication. 1073 */ 1074 OPB ocpl; /* Open Options Parameter Block. */ 1075 1076 ERRORTAB errorlogtable; /* Adapter statistic error counters. 1077 * (read from adapter memory) 1078 */ 1079 unsigned char ProductID[PROD_ID_SIZE + 1]; /* Product ID */ 1080#pragma pack() 1081 1082 TPL Tpl[TPL_NUM]; 1083 TPL *TplFree; 1084 TPL *TplBusy; 1085 unsigned char LocalTxBuffers[TPL_NUM][DEFAULT_PACKET_SIZE]; 1086 1087 RPL Rpl[RPL_NUM]; 1088 RPL *RplHead; 1089 RPL *RplTail; 1090 unsigned char LocalRxBuffers[RPL_NUM][DEFAULT_PACKET_SIZE]; 1091 1092 struct pci_dev *pdev; 1093 int DataRate; 1094 unsigned char ScbInUse; 1095 unsigned short CMDqueue; 1096 1097 unsigned long AdapterOpenFlag:1; 1098 unsigned long AdapterVirtOpenFlag:1; 1099 unsigned long OpenCommandIssued:1; 1100 unsigned long TransmitCommandActive:1; 1101 unsigned long TransmitHaltScheduled:1; 1102 unsigned long HaltInProgress:1; 1103 unsigned long LobeWireFaultLogged:1; 1104 unsigned long ReOpenInProgress:1; 1105 unsigned long Sleeping:1; 1106 1107 unsigned long LastOpenStatus; 1108 unsigned short CurrentRingStatus; 1109 unsigned long MaxPacketSize; 1110 1111 unsigned long StartTime; 1112 unsigned long LastSendTime; 1113 1114 struct sk_buff_head SendSkbQueue; 1115 unsigned short QueueSkb; 1116 1117 struct tr_statistics MacStat; /* MAC statistics structure */ 1118 1119 unsigned long dmalimit; /* the max DMA address (ie, ISA) */ 1120 dma_addr_t dmabuffer; /* the DMA bus address corresponding to 1121 priv. Might be different from virt_to_bus() 1122 for architectures with IO MMU (Alpha) */ 1123 1124 struct timer_list timer; 1125 1126 wait_queue_head_t wait_for_tok_int; 1127 1128 INTPTRS intptrs; /* Internal adapter pointer. Must be read 1129 * before OPEN command. 1130 */ 1131 unsigned short (*setnselout)(struct net_device *); 1132 unsigned short (*sifreadb)(struct net_device *, unsigned short); 1133 void (*sifwriteb)(struct net_device *, unsigned short, unsigned short); 1134 unsigned short (*sifreadw)(struct net_device *, unsigned short); 1135 void (*sifwritew)(struct net_device *, unsigned short, unsigned short); 1136 1137 void *tmspriv; 1138} NET_LOCAL; 1139 1140#endif /* __KERNEL__ */ 1141#endif /* __LINUX_TMS380TR_H */ 1142