1/* myri_sbus.h: MyriCOM MyriNET SBUS card driver. 2 * 3 * Copyright (C) 1996, 1999 David S. Miller (davem@redhat.com) 4 */ 5 6static char version[] = 7 "myri_sbus.c:v1.9 12/Sep/99 David S. Miller (davem@redhat.com)\n"; 8 9#include <linux/module.h> 10 11#include <linux/config.h> 12#include <linux/kernel.h> 13#include <linux/sched.h> 14#include <linux/types.h> 15#include <linux/fcntl.h> 16#include <linux/interrupt.h> 17#include <linux/ptrace.h> 18#include <linux/ioport.h> 19#include <linux/in.h> 20#include <linux/slab.h> 21#include <linux/string.h> 22#include <linux/delay.h> 23#include <linux/init.h> 24 25#include <asm/system.h> 26#include <asm/bitops.h> 27#include <asm/io.h> 28#include <asm/dma.h> 29#include <linux/errno.h> 30#include <asm/byteorder.h> 31 32#include <asm/idprom.h> 33#include <asm/sbus.h> 34#include <asm/openprom.h> 35#include <asm/oplib.h> 36#include <asm/auxio.h> 37#include <asm/pgtable.h> 38#include <asm/irq.h> 39 40#include <linux/netdevice.h> 41#include <linux/etherdevice.h> 42#include <linux/skbuff.h> 43 44#include <net/dst.h> 45#include <net/arp.h> 46#include <net/sock.h> 47#include <net/ipv6.h> 48 49#include <asm/checksum.h> 50 51#include "myri_sbus.h" 52 53#include "myri_code.h" 54 55/* #define DEBUG_DETECT */ 56/* #define DEBUG_IRQ */ 57/* #define DEBUG_TRANSMIT */ 58/* #define DEBUG_RECEIVE */ 59/* #define DEBUG_HEADER */ 60 61#ifdef DEBUG_DETECT 62#define DET(x) printk x 63#else 64#define DET(x) 65#endif 66 67#ifdef DEBUG_IRQ 68#define DIRQ(x) printk x 69#else 70#define DIRQ(x) 71#endif 72 73#ifdef DEBUG_TRANSMIT 74#define DTX(x) printk x 75#else 76#define DTX(x) 77#endif 78 79#ifdef DEBUG_RECEIVE 80#define DRX(x) printk x 81#else 82#define DRX(x) 83#endif 84 85#ifdef DEBUG_HEADER 86#define DHDR(x) printk x 87#else 88#define DHDR(x) 89#endif 90 91#ifdef MODULE 92static struct myri_eth *root_myri_dev; 93#endif 94 95static void myri_reset_off(unsigned long lp, unsigned long cregs) 96{ 97 /* Clear IRQ mask. */ 98 sbus_writel(0, lp + LANAI_EIMASK); 99 100 /* Turn RESET function off. */ 101 sbus_writel(CONTROL_ROFF, cregs + MYRICTRL_CTRL); 102} 103 104static void myri_reset_on(unsigned long cregs) 105{ 106 /* Enable RESET function. */ 107 sbus_writel(CONTROL_RON, cregs + MYRICTRL_CTRL); 108 109 /* Disable IRQ's. */ 110 sbus_writel(CONTROL_DIRQ, cregs + MYRICTRL_CTRL); 111} 112 113static void myri_disable_irq(unsigned long lp, unsigned long cregs) 114{ 115 sbus_writel(CONTROL_DIRQ, cregs + MYRICTRL_CTRL); 116 sbus_writel(0, lp + LANAI_EIMASK); 117 sbus_writel(ISTAT_HOST, lp + LANAI_ISTAT); 118} 119 120static void myri_enable_irq(unsigned long lp, unsigned long cregs) 121{ 122 sbus_writel(CONTROL_EIRQ, cregs + MYRICTRL_CTRL); 123 sbus_writel(ISTAT_HOST, lp + LANAI_EIMASK); 124} 125 126static inline void bang_the_chip(struct myri_eth *mp) 127{ 128 struct myri_shmem *shmem = mp->shmem; 129 unsigned long cregs = mp->cregs; 130 131 sbus_writel(1, &shmem->send); 132 sbus_writel(CONTROL_WON, cregs + MYRICTRL_CTRL); 133} 134 135static int myri_do_handshake(struct myri_eth *mp) 136{ 137 struct myri_shmem *shmem = mp->shmem; 138 unsigned long cregs = mp->cregs; 139 struct myri_channel *chan = &shmem->channel; 140 int tick = 0; 141 142 DET(("myri_do_handshake: ")); 143 if (sbus_readl(&chan->state) == STATE_READY) { 144 DET(("Already STATE_READY, failed.\n")); 145 return -1; /* We're hosed... */ 146 } 147 148 myri_disable_irq(mp->lregs, cregs); 149 150 while (tick++ <= 25) { 151 u32 softstate; 152 153 /* Wake it up. */ 154 DET(("shakedown, CONTROL_WON, ")); 155 sbus_writel(1, &shmem->shakedown); 156 sbus_writel(CONTROL_WON, cregs + MYRICTRL_CTRL); 157 158 softstate = sbus_readl(&chan->state); 159 DET(("chanstate[%08x] ", softstate)); 160 if (softstate == STATE_READY) { 161 DET(("wakeup successful, ")); 162 break; 163 } 164 165 if (softstate != STATE_WFN) { 166 DET(("not WFN setting that, ")); 167 sbus_writel(STATE_WFN, &chan->state); 168 } 169 170 udelay(20); 171 } 172 173 myri_enable_irq(mp->lregs, cregs); 174 175 if (tick > 25) { 176 DET(("25 ticks we lose, failure.\n")); 177 return -1; 178 } 179 DET(("success\n")); 180 return 0; 181} 182 183static int myri_load_lanai(struct myri_eth *mp) 184{ 185 struct net_device *dev = mp->dev; 186 struct myri_shmem *shmem = mp->shmem; 187 unsigned char *rptr; 188 int i; 189 190 myri_disable_irq(mp->lregs, mp->cregs); 191 myri_reset_on(mp->cregs); 192 193 rptr = (unsigned char *) mp->lanai; 194 for (i = 0; i < mp->eeprom.ramsz; i++) 195 sbus_writeb(0, &rptr[i]); 196 197 if (mp->eeprom.cpuvers >= CPUVERS_3_0) 198 sbus_writel(mp->eeprom.cval, mp->lregs + LANAI_CVAL); 199 200 /* Load executable code. */ 201 for (i = 0; i < sizeof(lanai4_code); i++) 202 sbus_writeb(lanai4_code[i], &rptr[(lanai4_code_off * 2) + i]); 203 204 /* Load data segment. */ 205 for (i = 0; i < sizeof(lanai4_data); i++) 206 sbus_writeb(lanai4_data[i], &rptr[(lanai4_data_off * 2) + i]); 207 208 /* Set device address. */ 209 sbus_writeb(0, &shmem->addr[0]); 210 sbus_writeb(0, &shmem->addr[1]); 211 for (i = 0; i < 6; i++) 212 sbus_writeb(dev->dev_addr[i], 213 &shmem->addr[i + 2]); 214 215 /* Set SBUS bursts and interrupt mask. */ 216 sbus_writel(((mp->myri_bursts & 0xf8) >> 3), &shmem->burst); 217 sbus_writel(SHMEM_IMASK_RX, &shmem->imask); 218 219 /* Release the LANAI. */ 220 myri_disable_irq(mp->lregs, mp->cregs); 221 myri_reset_off(mp->lregs, mp->cregs); 222 myri_disable_irq(mp->lregs, mp->cregs); 223 224 /* Wait for the reset to complete. */ 225 for (i = 0; i < 5000; i++) { 226 if (sbus_readl(&shmem->channel.state) != STATE_READY) 227 break; 228 else 229 udelay(10); 230 } 231 232 if (i == 5000) 233 printk(KERN_ERR "myricom: Chip would not reset after firmware load.\n"); 234 235 i = myri_do_handshake(mp); 236 if (i) 237 printk(KERN_ERR "myricom: Handshake with LANAI failed.\n"); 238 239 if (mp->eeprom.cpuvers == CPUVERS_4_0) 240 sbus_writel(0, mp->lregs + LANAI_VERS); 241 242 return i; 243} 244 245static void myri_clean_rings(struct myri_eth *mp) 246{ 247 struct sendq *sq = mp->sq; 248 struct recvq *rq = mp->rq; 249 int i; 250 251 sbus_writel(0, &rq->tail); 252 sbus_writel(0, &rq->head); 253 for (i = 0; i < (RX_RING_SIZE+1); i++) { 254 if (mp->rx_skbs[i] != NULL) { 255 struct myri_rxd *rxd = &rq->myri_rxd[i]; 256 u32 dma_addr; 257 258 dma_addr = sbus_readl(&rxd->myri_scatters[0].addr); 259 sbus_unmap_single(mp->myri_sdev, dma_addr, RX_ALLOC_SIZE, SBUS_DMA_FROMDEVICE); 260 dev_kfree_skb(mp->rx_skbs[i]); 261 mp->rx_skbs[i] = NULL; 262 } 263 } 264 265 mp->tx_old = 0; 266 sbus_writel(0, &sq->tail); 267 sbus_writel(0, &sq->head); 268 for (i = 0; i < TX_RING_SIZE; i++) { 269 if (mp->tx_skbs[i] != NULL) { 270 struct sk_buff *skb = mp->tx_skbs[i]; 271 struct myri_txd *txd = &sq->myri_txd[i]; 272 u32 dma_addr; 273 274 dma_addr = sbus_readl(&txd->myri_gathers[0].addr); 275 sbus_unmap_single(mp->myri_sdev, dma_addr, (skb->len + 3) & ~3, SBUS_DMA_TODEVICE); 276 dev_kfree_skb(mp->tx_skbs[i]); 277 mp->tx_skbs[i] = NULL; 278 } 279 } 280} 281 282static void myri_init_rings(struct myri_eth *mp, int from_irq) 283{ 284 struct recvq *rq = mp->rq; 285 struct myri_rxd *rxd = &rq->myri_rxd[0]; 286 struct net_device *dev = mp->dev; 287 int gfp_flags = GFP_KERNEL; 288 int i; 289 290 if (from_irq || in_interrupt()) 291 gfp_flags = GFP_ATOMIC; 292 293 myri_clean_rings(mp); 294 for (i = 0; i < RX_RING_SIZE; i++) { 295 struct sk_buff *skb = myri_alloc_skb(RX_ALLOC_SIZE, gfp_flags); 296 u32 dma_addr; 297 298 if (!skb) 299 continue; 300 mp->rx_skbs[i] = skb; 301 skb->dev = dev; 302 skb_put(skb, RX_ALLOC_SIZE); 303 304 dma_addr = sbus_map_single(mp->myri_sdev, skb->data, RX_ALLOC_SIZE, SBUS_DMA_FROMDEVICE); 305 sbus_writel(dma_addr, &rxd[i].myri_scatters[0].addr); 306 sbus_writel(RX_ALLOC_SIZE, &rxd[i].myri_scatters[0].len); 307 sbus_writel(i, &rxd[i].ctx); 308 sbus_writel(1, &rxd[i].num_sg); 309 } 310 sbus_writel(0, &rq->head); 311 sbus_writel(RX_RING_SIZE, &rq->tail); 312} 313 314static int myri_init(struct myri_eth *mp, int from_irq) 315{ 316 myri_init_rings(mp, from_irq); 317 return 0; 318} 319 320static void myri_is_not_so_happy(struct myri_eth *mp) 321{ 322} 323 324#ifdef DEBUG_HEADER 325static void dump_ehdr(struct ethhdr *ehdr) 326{ 327 printk("ehdr[h_dst(%02x:%02x:%02x:%02x:%02x:%02x)" 328 "h_source(%02x:%02x:%02x:%02x:%02x:%02x)h_proto(%04x)]\n", 329 ehdr->h_dest[0], ehdr->h_dest[1], ehdr->h_dest[2], 330 ehdr->h_dest[3], ehdr->h_dest[4], ehdr->h_dest[4], 331 ehdr->h_source[0], ehdr->h_source[1], ehdr->h_source[2], 332 ehdr->h_source[3], ehdr->h_source[4], ehdr->h_source[4], 333 ehdr->h_proto); 334} 335 336static void dump_ehdr_and_myripad(unsigned char *stuff) 337{ 338 struct ethhdr *ehdr = (struct ethhdr *) (stuff + 2); 339 340 printk("pad[%02x:%02x]", stuff[0], stuff[1]); 341 printk("ehdr[h_dst(%02x:%02x:%02x:%02x:%02x:%02x)" 342 "h_source(%02x:%02x:%02x:%02x:%02x:%02x)h_proto(%04x)]\n", 343 ehdr->h_dest[0], ehdr->h_dest[1], ehdr->h_dest[2], 344 ehdr->h_dest[3], ehdr->h_dest[4], ehdr->h_dest[4], 345 ehdr->h_source[0], ehdr->h_source[1], ehdr->h_source[2], 346 ehdr->h_source[3], ehdr->h_source[4], ehdr->h_source[4], 347 ehdr->h_proto); 348} 349#endif 350 351static void myri_tx(struct myri_eth *mp, struct net_device *dev) 352{ 353 struct sendq *sq = mp->sq; 354 int entry = mp->tx_old; 355 int limit = sbus_readl(&sq->head); 356 357 DTX(("entry[%d] limit[%d] ", entry, limit)); 358 if (entry == limit) 359 return; 360 while (entry != limit) { 361 struct sk_buff *skb = mp->tx_skbs[entry]; 362 u32 dma_addr; 363 364 DTX(("SKB[%d] ", entry)); 365 dma_addr = sbus_readl(&sq->myri_txd[entry].myri_gathers[0].addr); 366 sbus_unmap_single(mp->myri_sdev, dma_addr, skb->len, SBUS_DMA_TODEVICE); 367 dev_kfree_skb(skb); 368 mp->tx_skbs[entry] = NULL; 369 mp->enet_stats.tx_packets++; 370 entry = NEXT_TX(entry); 371 } 372 mp->tx_old = entry; 373} 374 375/* Determine the packet's protocol ID. The rule here is that we 376 * assume 802.3 if the type field is short enough to be a length. 377 * This is normal practice and works for any 'now in use' protocol. 378 */ 379static unsigned short myri_type_trans(struct sk_buff *skb, struct net_device *dev) 380{ 381 struct ethhdr *eth; 382 unsigned char *rawp; 383 384 skb->mac.raw = (((unsigned char *)skb->data) + MYRI_PAD_LEN); 385 skb_pull(skb, dev->hard_header_len); 386 eth = skb->mac.ethernet; 387 388#ifdef DEBUG_HEADER 389 DHDR(("myri_type_trans: ")); 390 dump_ehdr(eth); 391#endif 392 if (*eth->h_dest & 1) { 393 if (memcmp(eth->h_dest, dev->broadcast, ETH_ALEN)==0) 394 skb->pkt_type = PACKET_BROADCAST; 395 else 396 skb->pkt_type = PACKET_MULTICAST; 397 } else if (dev->flags & (IFF_PROMISC|IFF_ALLMULTI)) { 398 if (memcmp(eth->h_dest, dev->dev_addr, ETH_ALEN)) 399 skb->pkt_type = PACKET_OTHERHOST; 400 } 401 402 if (ntohs(eth->h_proto) >= 1536) 403 return eth->h_proto; 404 405 rawp = skb->data; 406 407 /* This is a magic hack to spot IPX packets. Older Novell breaks 408 * the protocol design and runs IPX over 802.3 without an 802.2 LLC 409 * layer. We look for FFFF which isn't a used 802.2 SSAP/DSAP. This 410 * won't work for fault tolerant netware but does for the rest. 411 */ 412 if (*(unsigned short *)rawp == 0xFFFF) 413 return htons(ETH_P_802_3); 414 415 /* Real 802.2 LLC */ 416 return htons(ETH_P_802_2); 417} 418 419static void myri_rx(struct myri_eth *mp, struct net_device *dev) 420{ 421 struct recvq *rq = mp->rq; 422 struct recvq *rqa = mp->rqack; 423 int entry = sbus_readl(&rqa->head); 424 int limit = sbus_readl(&rqa->tail); 425 int drops; 426 427 DRX(("entry[%d] limit[%d] ", entry, limit)); 428 if (entry == limit) 429 return; 430 drops = 0; 431 DRX(("\n")); 432 while (entry != limit) { 433 struct myri_rxd *rxdack = &rqa->myri_rxd[entry]; 434 u32 csum = sbus_readl(&rxdack->csum); 435 int len = sbus_readl(&rxdack->myri_scatters[0].len); 436 int index = sbus_readl(&rxdack->ctx); 437 struct myri_rxd *rxd = &rq->myri_rxd[rq->tail]; 438 struct sk_buff *skb = mp->rx_skbs[index]; 439 440 /* Ack it. */ 441 sbus_writel(NEXT_RX(entry), &rqa->head); 442 443 /* Check for errors. */ 444 DRX(("rxd[%d]: %p len[%d] csum[%08x] ", entry, rxd, len, csum)); 445 sbus_dma_sync_single(mp->myri_sdev, 446 sbus_readl(&rxd->myri_scatters[0].addr), 447 RX_ALLOC_SIZE, SBUS_DMA_FROMDEVICE); 448 if (len < (ETH_HLEN + MYRI_PAD_LEN) || (skb->data[0] != MYRI_PAD_LEN)) { 449 DRX(("ERROR[")); 450 mp->enet_stats.rx_errors++; 451 if (len < (ETH_HLEN + MYRI_PAD_LEN)) { 452 DRX(("BAD_LENGTH] ")); 453 mp->enet_stats.rx_length_errors++; 454 } else { 455 DRX(("NO_PADDING] ")); 456 mp->enet_stats.rx_frame_errors++; 457 } 458 459 /* Return it to the LANAI. */ 460 drop_it: 461 drops++; 462 DRX(("DROP ")); 463 mp->enet_stats.rx_dropped++; 464 sbus_writel(RX_ALLOC_SIZE, &rxd->myri_scatters[0].len); 465 sbus_writel(index, &rxd->ctx); 466 sbus_writel(1, &rxd->num_sg); 467 sbus_writel(NEXT_RX(sbus_readl(&rq->tail)), &rq->tail); 468 goto next; 469 } 470 471 DRX(("len[%d] ", len)); 472 if (len > RX_COPY_THRESHOLD) { 473 struct sk_buff *new_skb; 474 u32 dma_addr; 475 476 DRX(("BIGBUFF ")); 477 new_skb = myri_alloc_skb(RX_ALLOC_SIZE, GFP_ATOMIC); 478 if (new_skb == NULL) { 479 DRX(("skb_alloc(FAILED) ")); 480 goto drop_it; 481 } 482 sbus_unmap_single(mp->myri_sdev, 483 sbus_readl(&rxd->myri_scatters[0].addr), 484 RX_ALLOC_SIZE, 485 SBUS_DMA_FROMDEVICE); 486 mp->rx_skbs[index] = new_skb; 487 new_skb->dev = dev; 488 skb_put(new_skb, RX_ALLOC_SIZE); 489 dma_addr = sbus_map_single(mp->myri_sdev, 490 new_skb->data, 491 RX_ALLOC_SIZE, 492 SBUS_DMA_FROMDEVICE); 493 sbus_writel(dma_addr, &rxd->myri_scatters[0].addr); 494 sbus_writel(RX_ALLOC_SIZE, &rxd->myri_scatters[0].len); 495 sbus_writel(index, &rxd->ctx); 496 sbus_writel(1, &rxd->num_sg); 497 sbus_writel(NEXT_RX(sbus_readl(&rq->tail)), &rq->tail); 498 499 /* Trim the original skb for the netif. */ 500 DRX(("trim(%d) ", len)); 501 skb_trim(skb, len); 502 } else { 503 struct sk_buff *copy_skb = dev_alloc_skb(len); 504 505 DRX(("SMALLBUFF ")); 506 if (copy_skb == NULL) { 507 DRX(("dev_alloc_skb(FAILED) ")); 508 goto drop_it; 509 } 510 /* DMA sync already done above. */ 511 copy_skb->dev = dev; 512 DRX(("resv_and_put ")); 513 skb_put(copy_skb, len); 514 memcpy(copy_skb->data, skb->data, len); 515 516 /* Reuse original ring buffer. */ 517 DRX(("reuse ")); 518 sbus_writel(RX_ALLOC_SIZE, &rxd->myri_scatters[0].len); 519 sbus_writel(index, &rxd->ctx); 520 sbus_writel(1, &rxd->num_sg); 521 sbus_writel(NEXT_RX(sbus_readl(&rq->tail)), &rq->tail); 522 523 skb = copy_skb; 524 } 525 526 /* Just like the happy meal we get checksums from this card. */ 527 skb->csum = csum; 528 skb->ip_summed = CHECKSUM_UNNECESSARY; 529 530 skb->protocol = myri_type_trans(skb, dev); 531 DRX(("prot[%04x] netif_rx ", skb->protocol)); 532 netif_rx(skb); 533 534 dev->last_rx = jiffies; 535 mp->enet_stats.rx_packets++; 536 mp->enet_stats.rx_bytes += len; 537 next: 538 DRX(("NEXT\n")); 539 entry = NEXT_RX(entry); 540 } 541} 542 543static void myri_interrupt(int irq, void *dev_id, struct pt_regs *regs) 544{ 545 struct net_device *dev = (struct net_device *) dev_id; 546 struct myri_eth *mp = (struct myri_eth *) dev->priv; 547 unsigned long lregs = mp->lregs; 548 struct myri_channel *chan = &mp->shmem->channel; 549 u32 status; 550 551 status = sbus_readl(lregs + LANAI_ISTAT); 552 DIRQ(("myri_interrupt: status[%08x] ", status)); 553 if (status & ISTAT_HOST) { 554 u32 softstate; 555 556 DIRQ(("IRQ_DISAB ")); 557 myri_disable_irq(lregs, mp->cregs); 558 softstate = sbus_readl(&chan->state); 559 DIRQ(("state[%08x] ", softstate)); 560 if (softstate != STATE_READY) { 561 DIRQ(("myri_not_so_happy ")); 562 myri_is_not_so_happy(mp); 563 } 564 DIRQ(("\nmyri_rx: ")); 565 myri_rx(mp, dev); 566 DIRQ(("\nistat=ISTAT_HOST ")); 567 sbus_writel(ISTAT_HOST, lregs + LANAI_ISTAT); 568 DIRQ(("IRQ_ENAB ")); 569 myri_enable_irq(lregs, mp->cregs); 570 } 571 DIRQ(("\n")); 572} 573 574static int myri_open(struct net_device *dev) 575{ 576 struct myri_eth *mp = (struct myri_eth *) dev->priv; 577 578 return myri_init(mp, in_interrupt()); 579} 580 581static int myri_close(struct net_device *dev) 582{ 583 struct myri_eth *mp = (struct myri_eth *) dev->priv; 584 585 myri_clean_rings(mp); 586 return 0; 587} 588 589static void myri_tx_timeout(struct net_device *dev) 590{ 591 struct myri_eth *mp = (struct myri_eth *) dev->priv; 592 593 printk(KERN_ERR "%s: transmit timed out, resetting\n", dev->name); 594 595 mp->enet_stats.tx_errors++; 596 myri_init(mp, 0); 597 netif_wake_queue(dev); 598} 599 600static int myri_start_xmit(struct sk_buff *skb, struct net_device *dev) 601{ 602 struct myri_eth *mp = (struct myri_eth *) dev->priv; 603 struct sendq *sq = mp->sq; 604 struct myri_txd *txd; 605 unsigned long flags; 606 unsigned int head, tail; 607 int len, entry; 608 u32 dma_addr; 609 610 DTX(("myri_start_xmit: ")); 611 612 myri_tx(mp, dev); 613 614 netif_stop_queue(dev); 615 616 /* This is just to prevent multiple PIO reads for TX_BUFFS_AVAIL. */ 617 head = sbus_readl(&sq->head); 618 tail = sbus_readl(&sq->tail); 619 620 if (!TX_BUFFS_AVAIL(head, tail)) { 621 DTX(("no buffs available, returning 1\n")); 622 return 1; 623 } 624 625 save_and_cli(flags); 626 627 DHDR(("xmit[skbdata(%p)]\n", skb->data)); 628#ifdef DEBUG_HEADER 629 dump_ehdr_and_myripad(((unsigned char *) skb->data)); 630#endif 631 632 len = skb->len; 633 if (len & 3) { 634 DTX(("len&3 ")); 635 len = (len + 4) & (~3); 636 } 637 638 entry = sbus_readl(&sq->tail); 639 640 txd = &sq->myri_txd[entry]; 641 mp->tx_skbs[entry] = skb; 642 643 /* Must do this before we sbus map it. */ 644 if (skb->data[MYRI_PAD_LEN] & 0x1) { 645 sbus_writew(0xffff, &txd->addr[0]); 646 sbus_writew(0xffff, &txd->addr[1]); 647 sbus_writew(0xffff, &txd->addr[2]); 648 sbus_writew(0xffff, &txd->addr[3]); 649 } else { 650 sbus_writew(0xffff, &txd->addr[0]); 651 sbus_writew((skb->data[0] << 8) | skb->data[1], &txd->addr[1]); 652 sbus_writew((skb->data[2] << 8) | skb->data[3], &txd->addr[2]); 653 sbus_writew((skb->data[4] << 8) | skb->data[5], &txd->addr[3]); 654 } 655 656 dma_addr = sbus_map_single(mp->myri_sdev, skb->data, len, SBUS_DMA_TODEVICE); 657 sbus_writel(dma_addr, &txd->myri_gathers[0].addr); 658 sbus_writel(len, &txd->myri_gathers[0].len); 659 sbus_writel(1, &txd->num_sg); 660 sbus_writel(KERNEL_CHANNEL, &txd->chan); 661 sbus_writel(len, &txd->len); 662 sbus_writel((u32)-1, &txd->csum_off); 663 sbus_writel(0, &txd->csum_field); 664 665 sbus_writel(NEXT_TX(entry), &sq->tail); 666 DTX(("BangTheChip ")); 667 bang_the_chip(mp); 668 669 DTX(("tbusy=0, returning 0\n")); 670 netif_start_queue(dev); 671 restore_flags(flags); 672 return 0; 673} 674 675/* Create the MyriNet MAC header for an arbitrary protocol layer 676 * 677 * saddr=NULL means use device source address 678 * daddr=NULL means leave destination address (eg unresolved arp) 679 */ 680static int myri_header(struct sk_buff *skb, struct net_device *dev, unsigned short type, 681 void *daddr, void *saddr, unsigned len) 682{ 683 struct ethhdr *eth = (struct ethhdr *) skb_push(skb, ETH_HLEN); 684 unsigned char *pad = (unsigned char *) skb_push(skb, MYRI_PAD_LEN); 685 686#ifdef DEBUG_HEADER 687 DHDR(("myri_header: pad[%02x,%02x] ", pad[0], pad[1])); 688 dump_ehdr(eth); 689#endif 690 691 /* Set the MyriNET padding identifier. */ 692 pad[0] = MYRI_PAD_LEN; 693 pad[1] = 0xab; 694 695 /* Set the protocol type. For a packet of type ETH_P_802_3 we put the length 696 * in here instead. It is up to the 802.2 layer to carry protocol information. 697 */ 698 if (type != ETH_P_802_3) 699 eth->h_proto = htons(type); 700 else 701 eth->h_proto = htons(len); 702 703 /* Set the source hardware address. */ 704 if (saddr) 705 memcpy(eth->h_source, saddr, dev->addr_len); 706 else 707 memcpy(eth->h_source, dev->dev_addr, dev->addr_len); 708 709 /* Anyway, the loopback-device should never use this function... */ 710 if (dev->flags & IFF_LOOPBACK) { 711 int i; 712 for (i = 0; i < dev->addr_len; i++) 713 eth->h_dest[i] = 0; 714 return(dev->hard_header_len); 715 } 716 717 if (daddr) { 718 memcpy(eth->h_dest, daddr, dev->addr_len); 719 return dev->hard_header_len; 720 } 721 return -dev->hard_header_len; 722} 723 724/* Rebuild the MyriNet MAC header. This is called after an ARP 725 * (or in future other address resolution) has completed on this 726 * sk_buff. We now let ARP fill in the other fields. 727 */ 728static int myri_rebuild_header(struct sk_buff *skb) 729{ 730 unsigned char *pad = (unsigned char *) skb->data; 731 struct ethhdr *eth = (struct ethhdr *) (pad + MYRI_PAD_LEN); 732 struct net_device *dev = skb->dev; 733 734#ifdef DEBUG_HEADER 735 DHDR(("myri_rebuild_header: pad[%02x,%02x] ", pad[0], pad[1])); 736 dump_ehdr(eth); 737#endif 738 739 /* Refill MyriNet padding identifiers, this is just being anal. */ 740 pad[0] = MYRI_PAD_LEN; 741 pad[1] = 0xab; 742 743 switch (eth->h_proto) 744 { 745#ifdef CONFIG_INET 746 case __constant_htons(ETH_P_IP): 747 return arp_find(eth->h_dest, skb); 748#endif 749 750 default: 751 printk(KERN_DEBUG 752 "%s: unable to resolve type %X addresses.\n", 753 dev->name, (int)eth->h_proto); 754 755 memcpy(eth->h_source, dev->dev_addr, dev->addr_len); 756 return 0; 757 break; 758 } 759 760 return 0; 761} 762 763int myri_header_cache(struct neighbour *neigh, struct hh_cache *hh) 764{ 765 unsigned short type = hh->hh_type; 766 unsigned char *pad = (unsigned char *) hh->hh_data; 767 struct ethhdr *eth = (struct ethhdr *) (pad + MYRI_PAD_LEN); 768 struct net_device *dev = neigh->dev; 769 770 if (type == __constant_htons(ETH_P_802_3)) 771 return -1; 772 773 /* Refill MyriNet padding identifiers, this is just being anal. */ 774 pad[0] = MYRI_PAD_LEN; 775 pad[1] = 0xab; 776 777 eth->h_proto = type; 778 memcpy(eth->h_source, dev->dev_addr, dev->addr_len); 779 memcpy(eth->h_dest, neigh->ha, dev->addr_len); 780 hh->hh_len = 16; 781 return 0; 782} 783 784 785/* Called by Address Resolution module to notify changes in address. */ 786void myri_header_cache_update(struct hh_cache *hh, struct net_device *dev, unsigned char * haddr) 787{ 788 memcpy(((u8*)hh->hh_data) + 2, haddr, dev->addr_len); 789} 790 791static int myri_change_mtu(struct net_device *dev, int new_mtu) 792{ 793 if ((new_mtu < (ETH_HLEN + MYRI_PAD_LEN)) || (new_mtu > MYRINET_MTU)) 794 return -EINVAL; 795 dev->mtu = new_mtu; 796 return 0; 797} 798 799static struct net_device_stats *myri_get_stats(struct net_device *dev) 800{ return &(((struct myri_eth *)dev->priv)->enet_stats); } 801 802static void myri_set_multicast(struct net_device *dev) 803{ 804 /* Do nothing, all MyriCOM nodes transmit multicast frames 805 * as broadcast packets... 806 */ 807} 808 809static inline void set_boardid_from_idprom(struct myri_eth *mp, int num) 810{ 811 mp->eeprom.id[0] = 0; 812 mp->eeprom.id[1] = idprom->id_machtype; 813 mp->eeprom.id[2] = (idprom->id_sernum >> 16) & 0xff; 814 mp->eeprom.id[3] = (idprom->id_sernum >> 8) & 0xff; 815 mp->eeprom.id[4] = (idprom->id_sernum >> 0) & 0xff; 816 mp->eeprom.id[5] = num; 817} 818 819static inline void determine_reg_space_size(struct myri_eth *mp) 820{ 821 switch(mp->eeprom.cpuvers) { 822 case CPUVERS_2_3: 823 case CPUVERS_3_0: 824 case CPUVERS_3_1: 825 case CPUVERS_3_2: 826 mp->reg_size = (3 * 128 * 1024) + 4096; 827 break; 828 829 case CPUVERS_4_0: 830 case CPUVERS_4_1: 831 mp->reg_size = ((4096<<1) + mp->eeprom.ramsz); 832 break; 833 834 case CPUVERS_4_2: 835 case CPUVERS_5_0: 836 default: 837 printk("myricom: AIEEE weird cpu version %04x assuming pre4.0\n", 838 mp->eeprom.cpuvers); 839 mp->reg_size = (3 * 128 * 1024) + 4096; 840 }; 841} 842 843#ifdef DEBUG_DETECT 844static void dump_eeprom(struct myri_eth *mp) 845{ 846 printk("EEPROM: clockval[%08x] cpuvers[%04x] " 847 "id[%02x,%02x,%02x,%02x,%02x,%02x]\n", 848 mp->eeprom.cval, mp->eeprom.cpuvers, 849 mp->eeprom.id[0], mp->eeprom.id[1], mp->eeprom.id[2], 850 mp->eeprom.id[3], mp->eeprom.id[4], mp->eeprom.id[5]); 851 printk("EEPROM: ramsz[%08x]\n", mp->eeprom.ramsz); 852 printk("EEPROM: fvers[%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n", 853 mp->eeprom.fvers[0], mp->eeprom.fvers[1], mp->eeprom.fvers[2], 854 mp->eeprom.fvers[3], mp->eeprom.fvers[4], mp->eeprom.fvers[5], 855 mp->eeprom.fvers[6], mp->eeprom.fvers[7]); 856 printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n", 857 mp->eeprom.fvers[8], mp->eeprom.fvers[9], mp->eeprom.fvers[10], 858 mp->eeprom.fvers[11], mp->eeprom.fvers[12], mp->eeprom.fvers[13], 859 mp->eeprom.fvers[14], mp->eeprom.fvers[15]); 860 printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n", 861 mp->eeprom.fvers[16], mp->eeprom.fvers[17], mp->eeprom.fvers[18], 862 mp->eeprom.fvers[19], mp->eeprom.fvers[20], mp->eeprom.fvers[21], 863 mp->eeprom.fvers[22], mp->eeprom.fvers[23]); 864 printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x]\n", 865 mp->eeprom.fvers[24], mp->eeprom.fvers[25], mp->eeprom.fvers[26], 866 mp->eeprom.fvers[27], mp->eeprom.fvers[28], mp->eeprom.fvers[29], 867 mp->eeprom.fvers[30], mp->eeprom.fvers[31]); 868 printk("EEPROM: mvers[%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n", 869 mp->eeprom.mvers[0], mp->eeprom.mvers[1], mp->eeprom.mvers[2], 870 mp->eeprom.mvers[3], mp->eeprom.mvers[4], mp->eeprom.mvers[5], 871 mp->eeprom.mvers[6], mp->eeprom.mvers[7]); 872 printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x]\n", 873 mp->eeprom.mvers[8], mp->eeprom.mvers[9], mp->eeprom.mvers[10], 874 mp->eeprom.mvers[11], mp->eeprom.mvers[12], mp->eeprom.mvers[13], 875 mp->eeprom.mvers[14], mp->eeprom.mvers[15]); 876 printk("EEPROM: dlval[%04x] brd_type[%04x] bus_type[%04x] prod_code[%04x]\n", 877 mp->eeprom.dlval, mp->eeprom.brd_type, mp->eeprom.bus_type, 878 mp->eeprom.prod_code); 879 printk("EEPROM: serial_num[%08x]\n", mp->eeprom.serial_num); 880} 881#endif 882 883static int __init myri_ether_init(struct net_device *dev, struct sbus_dev *sdev, int num) 884{ 885 static unsigned version_printed; 886 struct myri_eth *mp; 887 unsigned char prop_buf[32]; 888 int i; 889 890 DET(("myri_ether_init(%p,%p,%d):\n", dev, sdev, num)); 891 dev = init_etherdev(0, sizeof(struct myri_eth)); 892 893 if (!dev) 894 return -ENOMEM; 895 896 if (version_printed++ == 0) 897 printk(version); 898 899 printk("%s: MyriCOM MyriNET Ethernet ", dev->name); 900 901 mp = (struct myri_eth *) dev->priv; 902 mp->myri_sdev = sdev; 903 904 /* Clean out skb arrays. */ 905 for (i = 0; i < (RX_RING_SIZE + 1); i++) 906 mp->rx_skbs[i] = NULL; 907 908 for (i = 0; i < TX_RING_SIZE; i++) 909 mp->tx_skbs[i] = NULL; 910 911 /* First check for EEPROM information. */ 912 i = prom_getproperty(sdev->prom_node, "myrinet-eeprom-info", 913 (char *)&mp->eeprom, sizeof(struct myri_eeprom)); 914 DET(("prom_getprop(myrinet-eeprom-info) returns %d\n", i)); 915 if (i == 0 || i == -1) { 916 /* No eeprom property, must cook up the values ourselves. */ 917 DET(("No EEPROM: ")); 918 mp->eeprom.bus_type = BUS_TYPE_SBUS; 919 mp->eeprom.cpuvers = prom_getintdefault(sdev->prom_node,"cpu_version",0); 920 mp->eeprom.cval = prom_getintdefault(sdev->prom_node,"clock_value",0); 921 mp->eeprom.ramsz = prom_getintdefault(sdev->prom_node,"sram_size",0); 922 DET(("cpuvers[%d] cval[%d] ramsz[%d]\n", mp->eeprom.cpuvers, 923 mp->eeprom.cval, mp->eeprom.ramsz)); 924 if (mp->eeprom.cpuvers == 0) { 925 DET(("EEPROM: cpuvers was zero, setting to %04x\n",CPUVERS_2_3)); 926 mp->eeprom.cpuvers = CPUVERS_2_3; 927 } 928 if (mp->eeprom.cpuvers < CPUVERS_3_0) { 929 DET(("EEPROM: cpuvers < CPUVERS_3_0, clockval set to zero.\n")); 930 mp->eeprom.cval = 0; 931 } 932 if (mp->eeprom.ramsz == 0) { 933 DET(("EEPROM: ramsz == 0, setting to 128k\n")); 934 mp->eeprom.ramsz = (128 * 1024); 935 } 936 i = prom_getproperty(sdev->prom_node, "myrinet-board-id", 937 &prop_buf[0], 10); 938 DET(("EEPROM: prom_getprop(myrinet-board-id) returns %d\n", i)); 939 if ((i != 0) && (i != -1)) 940 memcpy(&mp->eeprom.id[0], &prop_buf[0], 6); 941 else 942 set_boardid_from_idprom(mp, num); 943 i = prom_getproperty(sdev->prom_node, "fpga_version", 944 &mp->eeprom.fvers[0], 32); 945 DET(("EEPROM: prom_getprop(fpga_version) returns %d\n", i)); 946 if (i == 0 || i == -1) 947 memset(&mp->eeprom.fvers[0], 0, 32); 948 949 if (mp->eeprom.cpuvers == CPUVERS_4_1) { 950 DET(("EEPROM: cpuvers CPUVERS_4_1, ")); 951 if (mp->eeprom.ramsz == (128 * 1024)) { 952 DET(("ramsize 128k, setting to 256k, ")); 953 mp->eeprom.ramsz = (256 * 1024); 954 } 955 if ((mp->eeprom.cval==0x40414041)||(mp->eeprom.cval==0x90449044)){ 956 DET(("changing cval from %08x to %08x ", 957 mp->eeprom.cval, 0x50e450e4)); 958 mp->eeprom.cval = 0x50e450e4; 959 } 960 DET(("\n")); 961 } 962 } 963#ifdef DEBUG_DETECT 964 dump_eeprom(mp); 965#endif 966 967 for (i = 0; i < 6; i++) 968 printk("%2.2x%c", 969 dev->dev_addr[i] = mp->eeprom.id[i], 970 i == 5 ? ' ' : ':'); 971 printk("\n"); 972 973 determine_reg_space_size(mp); 974 975 /* Map in the MyriCOM register/localram set. */ 976 if (mp->eeprom.cpuvers < CPUVERS_4_0) { 977 DET(("Mapping regs for cpuvers < CPUVERS_4_0\n")); 978 mp->regs = sbus_ioremap(&sdev->resource[0], 0, 979 mp->reg_size, "MyriCOM Regs"); 980 if (!mp->regs) { 981 printk("MyriCOM: Cannot map MyriCOM registers.\n"); 982 goto err; 983 } 984 mp->lanai = (unsigned short *) (mp->regs + (256 * 1024)); 985 mp->lanai3 = (unsigned int *) mp->lanai; 986 mp->lregs = (unsigned long) &mp->lanai[0x10000]; 987 } else { 988 DET(("Mapping regs for cpuvers >= CPUVERS_4_0\n")); 989 mp->cregs = sbus_ioremap(&sdev->resource[0], 0, 990 PAGE_SIZE, "MyriCOM Control Regs"); 991 mp->lregs = sbus_ioremap(&sdev->resource[0], (256 * 1024), 992 PAGE_SIZE, "MyriCOM LANAI Regs"); 993 mp->lanai = (unsigned short *) 994 sbus_ioremap(&sdev->resource[0], (512 * 1024), 995 mp->eeprom.ramsz, "MyriCOM SRAM"); 996 mp->lanai3 = (unsigned int *) mp->lanai; 997 } 998 DET(("Registers mapped: cregs[%lx] lregs[%lx] lanai[%p] lanai3[%p]\n", 999 mp->cregs, mp->lregs, mp->lanai, mp->lanai3)); 1000 1001 if (mp->eeprom.cpuvers >= CPUVERS_4_0) 1002 mp->shmem_base = 0xf000; 1003 else 1004 mp->shmem_base = 0x8000; 1005 1006 DET(("Shared memory base is %04x, ", mp->shmem_base)); 1007 1008 mp->shmem = (struct myri_shmem *) &mp->lanai[mp->shmem_base]; 1009 DET(("shmem mapped at %p\n", mp->shmem)); 1010 1011 mp->rqack = &mp->shmem->channel.recvqa; 1012 mp->rq = &mp->shmem->channel.recvq; 1013 mp->sq = &mp->shmem->channel.sendq; 1014 1015 /* Reset the board. */ 1016 DET(("Resetting LANAI\n")); 1017 myri_reset_off(mp->lregs, mp->cregs); 1018 myri_reset_on(mp->cregs); 1019 1020 /* Turn IRQ's off. */ 1021 myri_disable_irq(mp->lregs, mp->cregs); 1022 1023 /* Reset once more. */ 1024 myri_reset_on(mp->cregs); 1025 1026 /* Get the supported DVMA burst sizes from our SBUS. */ 1027 mp->myri_bursts = prom_getintdefault(mp->myri_sdev->bus->prom_node, 1028 "burst-sizes", 0x00); 1029 1030 if (!sbus_can_burst64(sdev)) 1031 mp->myri_bursts &= ~(DMA_BURST64); 1032 1033 DET(("MYRI bursts %02x\n", mp->myri_bursts)); 1034 1035 /* Encode SBUS interrupt level in second control register. */ 1036 i = prom_getint(sdev->prom_node, "interrupts"); 1037 if (i == 0) 1038 i = 4; 1039 DET(("prom_getint(interrupts)==%d, irqlvl set to %04x\n", 1040 i, (1 << i))); 1041 1042 sbus_writel((1 << i), mp->cregs + MYRICTRL_IRQLVL); 1043 1044 mp->dev = dev; 1045 dev->open = &myri_open; 1046 dev->stop = &myri_close; 1047 dev->hard_start_xmit = &myri_start_xmit; 1048 dev->tx_timeout = &myri_tx_timeout; 1049 dev->watchdog_timeo = 5*HZ; 1050 dev->get_stats = &myri_get_stats; 1051 dev->set_multicast_list = &myri_set_multicast; 1052 dev->irq = sdev->irqs[0]; 1053 1054 /* Register interrupt handler now. */ 1055 DET(("Requesting MYRIcom IRQ line.\n")); 1056 if (request_irq(dev->irq, &myri_interrupt, 1057 SA_SHIRQ, "MyriCOM Ethernet", (void *) dev)) { 1058 printk("MyriCOM: Cannot register interrupt handler.\n"); 1059 goto err; 1060 } 1061 1062 DET(("ether_setup()\n")); 1063 ether_setup(dev); 1064 1065 dev->mtu = MYRINET_MTU; 1066 dev->change_mtu = myri_change_mtu; 1067 dev->hard_header = myri_header; 1068 dev->rebuild_header = myri_rebuild_header; 1069 dev->hard_header_len = (ETH_HLEN + MYRI_PAD_LEN); 1070 dev->hard_header_cache = myri_header_cache; 1071 dev->header_cache_update= myri_header_cache_update; 1072 1073 /* Load code onto the LANai. */ 1074 DET(("Loading LANAI firmware\n")); 1075 myri_load_lanai(mp); 1076 1077#ifdef MODULE 1078 dev->ifindex = dev_new_index(); 1079 mp->next_module = root_myri_dev; 1080 root_myri_dev = mp; 1081#endif 1082 return 0; 1083err: unregister_netdev(dev); 1084 kfree(dev); 1085 return -ENODEV; 1086} 1087 1088static int __init myri_sbus_match(struct sbus_dev *sdev) 1089{ 1090 char *name = sdev->prom_name; 1091 1092 if (!strcmp(name, "MYRICOM,mlanai") || 1093 !strcmp(name, "myri")) 1094 return 1; 1095 1096 return 0; 1097} 1098 1099static int __init myri_sbus_probe(void) 1100{ 1101 struct net_device *dev = NULL; 1102 struct sbus_bus *bus; 1103 struct sbus_dev *sdev = 0; 1104 static int called; 1105 int cards = 0, v; 1106 1107#ifdef MODULE 1108 root_myri_dev = NULL; 1109#endif 1110 1111 if (called) 1112 return -ENODEV; 1113 called++; 1114 1115 for_each_sbus(bus) { 1116 for_each_sbusdev(sdev, bus) { 1117 if (cards) 1118 dev = NULL; 1119 if (myri_sbus_match(sdev)) { 1120 cards++; 1121 DET(("Found myricom myrinet as %s\n", sdev->prom_name)); 1122 if ((v = myri_ether_init(dev, sdev, (cards - 1)))) 1123 return v; 1124 } 1125 } 1126 } 1127 if (!cards) 1128 return -ENODEV; 1129 return 0; 1130} 1131 1132static void __exit myri_sbus_cleanup(void) 1133{ 1134#ifdef MODULE 1135 /* No need to check MOD_IN_USE, as sys_delete_module() checks. */ 1136 while (root_myri_dev) { 1137 struct myri_eth *next = root_myri_dev->next_module; 1138 1139 unregister_netdev(root_myri_dev->dev); 1140 kfree(root_myri_dev->dev); 1141 root_myri_dev = next; 1142 } 1143#endif /* MODULE */ 1144} 1145 1146module_init(myri_sbus_probe); 1147module_exit(myri_sbus_cleanup); 1148MODULE_LICENSE("GPL"); 1149