1/* 2 * stradis.c - stradis 4:2:2 mpeg decoder driver 3 * 4 * Stradis 4:2:2 MPEG-2 Decoder Driver 5 * Copyright (C) 1999 Nathan Laredo <laredo@gnu.org> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 20 */ 21 22#include <linux/module.h> 23#include <linux/version.h> 24#include <linux/delay.h> 25#include <linux/errno.h> 26#include <linux/fs.h> 27#include <linux/kernel.h> 28#include <linux/major.h> 29#include <linux/slab.h> 30#include <linux/mm.h> 31#include <linux/init.h> 32#include <linux/poll.h> 33#include <linux/pci.h> 34#include <linux/signal.h> 35#include <asm/io.h> 36#include <linux/ioport.h> 37#include <asm/pgtable.h> 38#include <asm/page.h> 39#include <linux/sched.h> 40#include <asm/segment.h> 41#include <asm/types.h> 42#include <linux/types.h> 43#include <linux/wrapper.h> 44#include <linux/interrupt.h> 45#include <asm/uaccess.h> 46#include <linux/vmalloc.h> 47#include <linux/videodev.h> 48#include <linux/i2c-old.h> 49 50#include "saa7146.h" 51#include "saa7146reg.h" 52#include "ibmmpeg2.h" 53#include "saa7121.h" 54#include "cs8420.h" 55 56#define DEBUG(x) /* debug driver */ 57#undef IDEBUG /* debug irq handler */ 58#undef MDEBUG /* debug memory management */ 59 60#define SAA7146_MAX 6 61 62static struct saa7146 saa7146s[SAA7146_MAX]; 63 64static int saa_num = 0; /* number of SAA7146s in use */ 65 66static int video_nr = -1; 67MODULE_PARM(video_nr,"i"); 68MODULE_LICENSE("GPL"); 69 70 71#define nDebNormal 0x00480000 72#define nDebNoInc 0x00480000 73#define nDebVideo 0xd0480000 74#define nDebAudio 0xd0400000 75#define nDebDMA 0x02c80000 76 77#define oDebNormal 0x13c80000 78#define oDebNoInc 0x13c80000 79#define oDebVideo 0xd1080000 80#define oDebAudio 0xd1080000 81#define oDebDMA 0x03080000 82 83#define NewCard (saa->boardcfg[3]) 84#define ChipControl (saa->boardcfg[1]) 85#define NTSCFirstActive (saa->boardcfg[4]) 86#define PALFirstActive (saa->boardcfg[5]) 87#define NTSCLastActive (saa->boardcfg[54]) 88#define PALLastActive (saa->boardcfg[55]) 89#define Have2MB (saa->boardcfg[18] & 0x40) 90#define HaveCS8420 (saa->boardcfg[18] & 0x04) 91#define IBMMPEGCD20 (saa->boardcfg[18] & 0x20) 92#define HaveCS3310 (saa->boardcfg[18] & 0x01) 93#define CS3310MaxLvl ((saa->boardcfg[30] << 8) | saa->boardcfg[31]) 94#define HaveCS4341 (saa->boardcfg[40] == 2) 95#define SDIType (saa->boardcfg[27]) 96#define CurrentMode (saa->boardcfg[2]) 97 98#define debNormal (NewCard ? nDebNormal : oDebNormal) 99#define debNoInc (NewCard ? nDebNoInc : oDebNoInc) 100#define debVideo (NewCard ? nDebVideo : oDebVideo) 101#define debAudio (NewCard ? nDebAudio : oDebAudio) 102#define debDMA (NewCard ? nDebDMA : oDebDMA) 103 104#ifdef DEBUG 105int stradis_driver(void) /* for the benefit of ksymoops */ 106{ 107 return 1; 108} 109#endif 110 111#ifdef USE_RESCUE_EEPROM_SDM275 112static unsigned char rescue_eeprom[64] = { 1130x00,0x01,0x04,0x13,0x26,0x0f,0x10,0x00,0x00,0x00,0x43,0x63,0x22,0x01,0x29,0x15,0x73,0x00,0x1f, 'd', 'e', 'c', 'x', 'l', 'd', 'v', 'a',0x02,0x00,0x01,0x00,0xcc,0xa4,0x63,0x09,0xe2,0x10,0x00,0x0a,0x00,0x02,0x02, 'd', 'e', 'c', 'x', 'l', 'a',0x00,0x00,0x42,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 114}; 115#endif 116 117/* ----------------------------------------------------------------------- */ 118/* Hardware I2C functions */ 119static void I2CWipe(struct saa7146 *saa) 120{ 121 int i; 122 /* set i2c to ~=100kHz, abort transfer, clear busy */ 123 saawrite(0x600 | SAA7146_I2C_ABORT, SAA7146_I2C_STATUS); 124 saawrite((SAA7146_MC2_UPLD_I2C << 16) | 125 SAA7146_MC2_UPLD_I2C, SAA7146_MC2); 126 /* wait for i2c registers to be programmed */ 127 for (i = 0; i < 1000 && 128 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++) 129 schedule(); 130 saawrite(0x600, SAA7146_I2C_STATUS); 131 saawrite((SAA7146_MC2_UPLD_I2C << 16) | 132 SAA7146_MC2_UPLD_I2C, SAA7146_MC2); 133 /* wait for i2c registers to be programmed */ 134 for (i = 0; i < 1000 && 135 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++) 136 schedule(); 137 saawrite(0x600, SAA7146_I2C_STATUS); 138 saawrite((SAA7146_MC2_UPLD_I2C << 16) | 139 SAA7146_MC2_UPLD_I2C, SAA7146_MC2); 140 /* wait for i2c registers to be programmed */ 141 for (i = 0; i < 1000 && 142 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++) 143 schedule(); 144} 145/* read I2C */ 146static int I2CRead(struct i2c_bus *bus, unsigned char addr, 147 unsigned char subaddr, int dosub) 148{ 149 struct saa7146 *saa = (struct saa7146 *) bus->data; 150 int i; 151 152 153 if (saaread(SAA7146_I2C_STATUS) & 0x3c) 154 I2CWipe(saa); 155 for (i = 0; i < 1000 && 156 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++) 157 schedule(); 158 if (i == 1000) 159 I2CWipe(saa); 160 if (dosub) 161 saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 8) | 162 ((subaddr & 0xff) << 16) | 0xed, SAA7146_I2C_TRANSFER); 163 else 164 saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 16) | 165 0xf1, SAA7146_I2C_TRANSFER); 166 saawrite((SAA7146_MC2_UPLD_I2C << 16) | 167 SAA7146_MC2_UPLD_I2C, SAA7146_MC2); 168 /* wait for i2c registers to be programmed */ 169 for (i = 0; i < 1000 && 170 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++) 171 schedule(); 172 /* wait for valid data */ 173 for (i = 0; i < 1000 && 174 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++) 175 schedule(); 176 if (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_ERR) 177 return -1; 178 if (i == 1000) 179 printk("i2c setup read timeout\n"); 180 saawrite(0x41, SAA7146_I2C_TRANSFER); 181 saawrite((SAA7146_MC2_UPLD_I2C << 16) | 182 SAA7146_MC2_UPLD_I2C, SAA7146_MC2); 183 /* wait for i2c registers to be programmed */ 184 for (i = 0; i < 1000 && 185 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++) 186 schedule(); 187 /* wait for valid data */ 188 for (i = 0; i < 1000 && 189 (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_BUSY); i++) 190 schedule(); 191 if (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_ERR) 192 return -1; 193 if (i == 1000) 194 printk("i2c read timeout\n"); 195 return ((saaread(SAA7146_I2C_TRANSFER) >> 24) & 0xff); 196} 197static int I2CReadOld(struct i2c_bus *bus, unsigned char addr) 198{ 199 return I2CRead(bus, addr, 0, 0); 200} 201 202/* set both to write both bytes, reset it to write only b1 */ 203 204static int I2CWrite(struct i2c_bus *bus, unsigned char addr, unsigned char b1, 205 unsigned char b2, int both) 206{ 207 struct saa7146 *saa = (struct saa7146 *) bus->data; 208 int i; 209 u32 data; 210 211 if (saaread(SAA7146_I2C_STATUS) & 0x3c) 212 I2CWipe(saa); 213 for (i = 0; i < 1000 && 214 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++) 215 schedule(); 216 if (i == 1000) 217 I2CWipe(saa); 218 data = ((addr & 0xfe) << 24) | ((b1 & 0xff) << 16); 219 if (both) 220 data |= ((b2 & 0xff) << 8) | 0xe5; 221 else 222 data |= 0xd1; 223 saawrite(data, SAA7146_I2C_TRANSFER); 224 saawrite((SAA7146_MC2_UPLD_I2C << 16) | SAA7146_MC2_UPLD_I2C, 225 SAA7146_MC2); 226 return 0; 227} 228 229static void attach_inform(struct i2c_bus *bus, int id) 230{ 231 struct saa7146 *saa = (struct saa7146 *) bus->data; 232 int i; 233 234 DEBUG(printk(KERN_DEBUG "stradis%d: i2c: device found=%02x\n", saa->nr, id)); 235 if (id == 0xa0) { /* we have rev2 or later board, fill in info */ 236 for (i = 0; i < 64; i++) 237 saa->boardcfg[i] = I2CRead(bus, 0xa0, i, 1); 238#ifdef USE_RESCUE_EEPROM_SDM275 239 if (saa->boardcfg[0] != 0) { 240 printk("stradis%d: WARNING: EEPROM STORED VALUES HAVE BEEN IGNORED\n", saa->nr); 241 for (i = 0; i < 64; i++) 242 saa->boardcfg[i] = rescue_eeprom[i]; 243 } 244#endif 245 printk("stradis%d: config =", saa->nr); 246 for (i = 0; i < 51; i++) { 247 printk(" %02x",saa->boardcfg[i]); 248 } 249 printk("\n"); 250 } 251} 252 253static void detach_inform(struct i2c_bus *bus, int id) 254{ 255 struct saa7146 *saa = (struct saa7146 *) bus->data; 256 int i; 257 i = saa->nr; 258} 259 260static void I2CBusScan(struct i2c_bus *bus) 261{ 262 int i; 263 for (i = 0; i < 0xff; i += 2) 264 if ((I2CRead(bus, i, 0, 0)) >= 0) 265 attach_inform(bus, i); 266} 267 268static struct i2c_bus saa7146_i2c_bus_template = 269{ 270 "saa7146", 271 I2C_BUSID_BT848, 272 NULL, 273 SPIN_LOCK_UNLOCKED, 274 attach_inform, 275 detach_inform, 276 NULL, 277 NULL, 278 I2CReadOld, 279 I2CWrite, 280}; 281 282static int debiwait_maxwait = 0; 283 284static int wait_for_debi_done(struct saa7146 *saa) 285{ 286 int i; 287 288 /* wait for registers to be programmed */ 289 for (i = 0; i < 100000 && 290 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_DEBI); i++) 291 saaread(SAA7146_MC2); 292 /* wait for transfer to complete */ 293 for (i = 0; i < 500000 && 294 (saaread(SAA7146_PSR) & SAA7146_PSR_DEBI_S); i++) 295 saaread(SAA7146_MC2); 296 if (i > debiwait_maxwait) 297 printk("wait-for-debi-done maxwait: %d\n", 298 debiwait_maxwait = i); 299 300 if (i == 500000) 301 return -1; 302 return 0; 303} 304 305static int debiwrite(struct saa7146 *saa, u32 config, int addr, 306 u32 val, int count) 307{ 308 u32 cmd; 309 if (count <= 0 || count > 32764) 310 return -1; 311 if (wait_for_debi_done(saa) < 0) 312 return -1; 313 saawrite(config, SAA7146_DEBI_CONFIG); 314 if (count <= 4) /* immediate transfer */ 315 saawrite(val, SAA7146_DEBI_AD); 316 else /* block transfer */ 317 saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD); 318 saawrite((cmd = (count << 17) | (addr & 0xffff)), SAA7146_DEBI_COMMAND); 319 saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI, 320 SAA7146_MC2); 321 return 0; 322} 323 324static u32 debiread(struct saa7146 *saa, u32 config, int addr, int count) 325{ 326 u32 result = 0; 327 328 if (count > 32764 || count <= 0) 329 return 0; 330 if (wait_for_debi_done(saa) < 0) 331 return 0; 332 saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD); 333 saawrite((count << 17) | 0x10000 | (addr & 0xffff), 334 SAA7146_DEBI_COMMAND); 335 saawrite(config, SAA7146_DEBI_CONFIG); 336 saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI, 337 SAA7146_MC2); 338 if (count > 4) /* not an immediate transfer */ 339 return count; 340 wait_for_debi_done(saa); 341 result = saaread(SAA7146_DEBI_AD); 342 if (count == 1) 343 result &= 0xff; 344 if (count == 2) 345 result &= 0xffff; 346 if (count == 3) 347 result &= 0xffffff; 348 return result; 349} 350 351 352static void do_irq_send_data(struct saa7146 *saa) 353{ 354 int split, audbytes, vidbytes; 355 356 saawrite(SAA7146_PSR_PIN1, SAA7146_IER); 357 /* if special feature mode in effect, disable audio sending */ 358 if (saa->playmode != VID_PLAY_NORMAL) 359 saa->audtail = saa->audhead = 0; 360 if (saa->audhead <= saa->audtail) 361 audbytes = saa->audtail - saa->audhead; 362 else 363 audbytes = 65536 - (saa->audhead - saa->audtail); 364 if (saa->vidhead <= saa->vidtail) 365 vidbytes = saa->vidtail - saa->vidhead; 366 else 367 vidbytes = 524288 - (saa->vidhead - saa->vidtail); 368 if (audbytes == 0 && vidbytes == 0 && saa->osdtail == saa->osdhead) { 369 saawrite(0, SAA7146_IER); 370 return; 371 } 372 /* if at least 1 block audio waiting and audio fifo isn't full */ 373 if (audbytes >= 2048 && (debiread(saa, debNormal, 374 IBM_MP2_AUD_FIFO, 2) & 0xff) < 60) { 375 if (saa->audhead > saa->audtail) 376 split = 65536 - saa->audhead; 377 else 378 split = 0; 379 audbytes = 2048; 380 if (split > 0 && split < 2048) { 381 memcpy(saa->dmadebi, saa->audbuf + saa->audhead, 382 split); 383 saa->audhead = 0; 384 audbytes -= split; 385 } else 386 split = 0; 387 memcpy(saa->dmadebi + split, saa->audbuf + saa->audhead, 388 audbytes); 389 saa->audhead += audbytes; 390 saa->audhead &= 0xffff; 391 debiwrite(saa, debAudio, (NewCard? IBM_MP2_AUD_FIFO : 392 IBM_MP2_AUD_FIFOW), 0, 2048); 393 wake_up_interruptible(&saa->audq); 394 /* if at least 1 block video waiting and video fifo isn't full */ 395 } else if (vidbytes >= 30720 && (debiread(saa, debNormal, 396 IBM_MP2_FIFO, 2)) < 16384) { 397 if (saa->vidhead > saa->vidtail) 398 split = 524288 - saa->vidhead; 399 else 400 split = 0; 401 vidbytes = 30720; 402 if (split > 0 && split < 30720) { 403 memcpy(saa->dmadebi, saa->vidbuf + saa->vidhead, 404 split); 405 saa->vidhead = 0; 406 vidbytes -= split; 407 } else 408 split = 0; 409 memcpy(saa->dmadebi + split, saa->vidbuf + saa->vidhead, 410 vidbytes); 411 saa->vidhead += vidbytes; 412 saa->vidhead &= 0x7ffff; 413 debiwrite(saa, debVideo, (NewCard ? IBM_MP2_FIFO : 414 IBM_MP2_FIFOW), 0, 30720); 415 wake_up_interruptible(&saa->vidq); 416 } 417 saawrite(SAA7146_PSR_DEBI_S | SAA7146_PSR_PIN1, SAA7146_IER); 418} 419 420static void send_osd_data(struct saa7146 *saa) 421{ 422 int size = saa->osdtail - saa->osdhead; 423 if (size > 30720) 424 size = 30720; 425 /* ensure some multiple of 8 bytes is transferred */ 426 size = 8 * ((size + 8)>>3); 427 if (size) { 428 debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR, 429 (saa->osdhead>>3), 2); 430 memcpy(saa->dmadebi, &saa->osdbuf[saa->osdhead], size); 431 saa->osdhead += size; 432 /* block transfer of next 8 bytes to ~32k bytes */ 433 debiwrite(saa, debNormal, IBM_MP2_OSD_DATA, 0, size); 434 } 435 if (saa->osdhead >= saa->osdtail) { 436 saa->osdhead = saa->osdtail = 0; 437 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2); 438 } 439} 440 441static void saa7146_irq(int irq, void *dev_id, struct pt_regs *regs) 442{ 443 struct saa7146 *saa = (struct saa7146 *) dev_id; 444 u32 stat, astat; 445 int count; 446 447 count = 0; 448 while (1) { 449 /* get/clear interrupt status bits */ 450 stat = saaread(SAA7146_ISR); 451 astat = stat & saaread(SAA7146_IER); 452 if (!astat) 453 return; 454 saawrite(astat, SAA7146_ISR); 455 if (astat & SAA7146_PSR_DEBI_S) { 456 do_irq_send_data(saa); 457 } 458 if (astat & SAA7146_PSR_PIN1) { 459 int istat; 460 /* the following read will trigger DEBI_S */ 461 istat = debiread(saa, debNormal, IBM_MP2_HOST_INT, 2); 462 if (istat & 1) { 463 saawrite(0, SAA7146_IER); 464 send_osd_data(saa); 465 saawrite(SAA7146_PSR_DEBI_S | 466 SAA7146_PSR_PIN1, SAA7146_IER); 467 } 468 if (istat & 0x20) { /* Video Start */ 469 saa->vidinfo.frame_count++; 470 } 471 if (istat & 0x400) { /* Picture Start */ 472 /* update temporal reference */ 473 } 474 if (istat & 0x200) { /* Picture Resolution Change */ 475 /* read new resolution */ 476 } 477 if (istat & 0x100) { /* New User Data found */ 478 /* read new user data */ 479 } 480 if (istat & 0x1000) { /* new GOP/SMPTE */ 481 /* read new SMPTE */ 482 } 483 if (istat & 0x8000) { /* Sequence Start Code */ 484 /* reset frame counter, load sizes */ 485 saa->vidinfo.frame_count = 0; 486 saa->vidinfo.h_size = 704; 487 saa->vidinfo.v_size = 480; 488 } 489 if (istat & 0x4000) { /* Sequence Error Code */ 490 if (saa->endmarkhead != saa->endmarktail) { 491 saa->audhead = 492 saa->endmark[saa->endmarkhead]; 493 saa->endmarkhead++; 494 if (saa->endmarkhead >= MAX_MARKS) 495 saa->endmarkhead = 0; 496 } 497 } 498 } 499#ifdef IDEBUG 500 if (astat & SAA7146_PSR_PPEF) { 501 IDEBUG(printk("stradis%d irq: PPEF\n", saa->nr)); 502 } 503 if (astat & SAA7146_PSR_PABO) { 504 IDEBUG(printk("stradis%d irq: PABO\n", saa->nr)); 505 } 506 if (astat & SAA7146_PSR_PPED) { 507 IDEBUG(printk("stradis%d irq: PPED\n", saa->nr)); 508 } 509 if (astat & SAA7146_PSR_RPS_I1) { 510 IDEBUG(printk("stradis%d irq: RPS_I1\n", saa->nr)); 511 } 512 if (astat & SAA7146_PSR_RPS_I0) { 513 IDEBUG(printk("stradis%d irq: RPS_I0\n", saa->nr)); 514 } 515 if (astat & SAA7146_PSR_RPS_LATE1) { 516 IDEBUG(printk("stradis%d irq: RPS_LATE1\n", saa->nr)); 517 } 518 if (astat & SAA7146_PSR_RPS_LATE0) { 519 IDEBUG(printk("stradis%d irq: RPS_LATE0\n", saa->nr)); 520 } 521 if (astat & SAA7146_PSR_RPS_E1) { 522 IDEBUG(printk("stradis%d irq: RPS_E1\n", saa->nr)); 523 } 524 if (astat & SAA7146_PSR_RPS_E0) { 525 IDEBUG(printk("stradis%d irq: RPS_E0\n", saa->nr)); 526 } 527 if (astat & SAA7146_PSR_RPS_TO1) { 528 IDEBUG(printk("stradis%d irq: RPS_TO1\n", saa->nr)); 529 } 530 if (astat & SAA7146_PSR_RPS_TO0) { 531 IDEBUG(printk("stradis%d irq: RPS_TO0\n", saa->nr)); 532 } 533 if (astat & SAA7146_PSR_UPLD) { 534 IDEBUG(printk("stradis%d irq: UPLD\n", saa->nr)); 535 } 536 if (astat & SAA7146_PSR_DEBI_E) { 537 IDEBUG(printk("stradis%d irq: DEBI_E\n", saa->nr)); 538 } 539 if (astat & SAA7146_PSR_I2C_S) { 540 IDEBUG(printk("stradis%d irq: I2C_S\n", saa->nr)); 541 } 542 if (astat & SAA7146_PSR_I2C_E) { 543 IDEBUG(printk("stradis%d irq: I2C_E\n", saa->nr)); 544 } 545 if (astat & SAA7146_PSR_A2_IN) { 546 IDEBUG(printk("stradis%d irq: A2_IN\n", saa->nr)); 547 } 548 if (astat & SAA7146_PSR_A2_OUT) { 549 IDEBUG(printk("stradis%d irq: A2_OUT\n", saa->nr)); 550 } 551 if (astat & SAA7146_PSR_A1_IN) { 552 IDEBUG(printk("stradis%d irq: A1_IN\n", saa->nr)); 553 } 554 if (astat & SAA7146_PSR_A1_OUT) { 555 IDEBUG(printk("stradis%d irq: A1_OUT\n", saa->nr)); 556 } 557 if (astat & SAA7146_PSR_AFOU) { 558 IDEBUG(printk("stradis%d irq: AFOU\n", saa->nr)); 559 } 560 if (astat & SAA7146_PSR_V_PE) { 561 IDEBUG(printk("stradis%d irq: V_PE\n", saa->nr)); 562 } 563 if (astat & SAA7146_PSR_VFOU) { 564 IDEBUG(printk("stradis%d irq: VFOU\n", saa->nr)); 565 } 566 if (astat & SAA7146_PSR_FIDA) { 567 IDEBUG(printk("stradis%d irq: FIDA\n", saa->nr)); 568 } 569 if (astat & SAA7146_PSR_FIDB) { 570 IDEBUG(printk("stradis%d irq: FIDB\n", saa->nr)); 571 } 572 if (astat & SAA7146_PSR_PIN3) { 573 IDEBUG(printk("stradis%d irq: PIN3\n", saa->nr)); 574 } 575 if (astat & SAA7146_PSR_PIN2) { 576 IDEBUG(printk("stradis%d irq: PIN2\n", saa->nr)); 577 } 578 if (astat & SAA7146_PSR_PIN0) { 579 IDEBUG(printk("stradis%d irq: PIN0\n", saa->nr)); 580 } 581 if (astat & SAA7146_PSR_ECS) { 582 IDEBUG(printk("stradis%d irq: ECS\n", saa->nr)); 583 } 584 if (astat & SAA7146_PSR_EC3S) { 585 IDEBUG(printk("stradis%d irq: EC3S\n", saa->nr)); 586 } 587 if (astat & SAA7146_PSR_EC0S) { 588 IDEBUG(printk("stradis%d irq: EC0S\n", saa->nr)); 589 } 590#endif 591 count++; 592 if (count > 15) 593 printk(KERN_WARNING "stradis%d: irq loop %d\n", 594 saa->nr, count); 595 if (count > 20) { 596 saawrite(0, SAA7146_IER); 597 printk(KERN_ERR 598 "stradis%d: IRQ loop cleared\n", saa->nr); 599 } 600 } 601} 602 603static int ibm_send_command(struct saa7146 *saa, 604 int command, int data, int chain) 605{ 606 int i; 607 608 if (chain) 609 debiwrite(saa, debNormal, IBM_MP2_COMMAND, (command << 1) | 1, 2); 610 else 611 debiwrite(saa, debNormal, IBM_MP2_COMMAND, command << 1, 2); 612 debiwrite(saa, debNormal, IBM_MP2_CMD_DATA, data, 2); 613 debiwrite(saa, debNormal, IBM_MP2_CMD_STAT, 1, 2); 614 for (i = 0; i < 100 && 615 (debiread(saa, debNormal, IBM_MP2_CMD_STAT, 2) & 1); i++) 616 schedule(); 617 if (i == 100) 618 return -1; 619 return 0; 620} 621 622static void cs4341_setlevel(struct saa7146 *saa, int left, int right) 623{ 624 I2CWrite(&(saa->i2c), 0x22, 0x03, 625 left > 94 ? 94 : left, 2); 626 I2CWrite(&(saa->i2c), 0x22, 0x04, 627 right > 94 ? 94 : right, 2); 628} 629 630static void initialize_cs4341(struct saa7146 *saa) 631{ 632 int i; 633 for (i = 0; i < 200; i++) { 634 /* auto mute off, power on, no de-emphasis */ 635 /* I2S data up to 24-bit 64xFs internal SCLK */ 636 I2CWrite(&(saa->i2c), 0x22, 0x01, 0x11, 2); 637 /* ATAPI mixer settings */ 638 I2CWrite(&(saa->i2c), 0x22, 0x02, 0x49, 2); 639 /* attenuation left 3db */ 640 I2CWrite(&(saa->i2c), 0x22, 0x03, 0x00, 2); 641 /* attenuation right 3db */ 642 I2CWrite(&(saa->i2c), 0x22, 0x04, 0x00, 2); 643 I2CWrite(&(saa->i2c), 0x22, 0x01, 0x10, 2); 644 if (I2CRead(&(saa->i2c), 0x22, 0x02, 1) == 0x49) 645 break; 646 schedule(); 647 } 648 printk("stradis%d: CS4341 initialized (%d)\n", saa->nr, i); 649 return; 650} 651 652static void initialize_cs8420(struct saa7146 *saa, int pro) 653{ 654 int i; 655 u8 *sequence; 656 if (pro) 657 sequence = mode8420pro; 658 else 659 sequence = mode8420con; 660 for (i = 0; i < INIT8420LEN; i++) 661 I2CWrite(&(saa->i2c), 0x20, init8420[i * 2], 662 init8420[i * 2 + 1], 2); 663 for (i = 0; i < MODE8420LEN; i++) 664 I2CWrite(&(saa->i2c), 0x20, sequence[i * 2], 665 sequence[i * 2 + 1], 2); 666 printk("stradis%d: CS8420 initialized\n", saa->nr); 667} 668 669static void initialize_saa7121(struct saa7146 *saa, int dopal) 670{ 671 int i, mod; 672 u8 *sequence; 673 if (dopal) 674 sequence = init7121pal; 675 else 676 sequence = init7121ntsc; 677 mod = saaread(SAA7146_PSR) & 0x08; 678 /* initialize PAL/NTSC video encoder */ 679 for (i = 0; i < INIT7121LEN; i++) { 680 if (NewCard) { /* handle new card encoder differences */ 681 if (sequence[i*2] == 0x3a) 682 I2CWrite(&(saa->i2c), 0x88, 0x3a, 0x13, 2); 683 else if (sequence[i*2] == 0x6b) 684 I2CWrite(&(saa->i2c), 0x88, 0x6b, 0x20, 2); 685 else if (sequence[i*2] == 0x6c) 686 I2CWrite(&(saa->i2c), 0x88, 0x6c, 687 dopal ? 0x09 : 0xf5, 2); 688 else if (sequence[i*2] == 0x6d) 689 I2CWrite(&(saa->i2c), 0x88, 0x6d, 690 dopal ? 0x20 : 0x00, 2); 691 else if (sequence[i*2] == 0x7a) 692 I2CWrite(&(saa->i2c), 0x88, 0x7a, 693 dopal ? (PALFirstActive - 1) : 694 (NTSCFirstActive - 4), 2); 695 else if (sequence[i*2] == 0x7b) 696 I2CWrite(&(saa->i2c), 0x88, 0x7b, 697 dopal ? PALLastActive : 698 NTSCLastActive, 2); 699 else I2CWrite(&(saa->i2c), 0x88, sequence[i * 2], 700 sequence[i * 2 + 1], 2); 701 } else { 702 if (sequence[i*2] == 0x6b && mod) 703 I2CWrite(&(saa->i2c), 0x88, 0x6b, 704 (sequence[i * 2 + 1] ^ 0x09), 2); 705 else if (sequence[i*2] == 0x7a) 706 I2CWrite(&(saa->i2c), 0x88, 0x7a, 707 dopal ? (PALFirstActive - 1) : 708 (NTSCFirstActive - 4), 2); 709 else if (sequence[i*2] == 0x7b) 710 I2CWrite(&(saa->i2c), 0x88, 0x7b, 711 dopal ? PALLastActive : 712 NTSCLastActive, 2); 713 else 714 I2CWrite(&(saa->i2c), 0x88, sequence[i * 2], 715 sequence[i * 2 + 1], 2); 716 } 717 } 718} 719 720static void set_genlock_offset(struct saa7146 *saa, int noffset) 721{ 722 int nCode; 723 int PixelsPerLine = 858; 724 if (CurrentMode == VIDEO_MODE_PAL) 725 PixelsPerLine = 864; 726 if (noffset > 500) 727 noffset = 500; 728 else if (noffset < -500) 729 noffset = -500; 730 nCode = noffset + 0x100; 731 if (nCode == 1) 732 nCode = 0x401; 733 else if (nCode < 1) nCode = 0x400 + PixelsPerLine + nCode; 734 debiwrite(saa, debNormal, XILINX_GLDELAY, nCode, 2); 735} 736 737static void set_out_format(struct saa7146 *saa, int mode) 738{ 739 initialize_saa7121(saa, (mode == VIDEO_MODE_NTSC ? 0 : 1)); 740 saa->boardcfg[2] = mode; 741 /* do not adjust analog video parameters here, use saa7121 init */ 742 /* you will affect the SDI output on the new card */ 743 if (mode == VIDEO_MODE_PAL) { /* PAL */ 744 debiwrite(saa, debNormal, XILINX_CTL0, 0x0808, 2); 745 mdelay(50); 746 saawrite(0x012002c0, SAA7146_NUM_LINE_BYTE1); 747 if (NewCard) { 748 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE, 749 0xe100, 2); 750 mdelay(50); 751 } 752 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE, 753 NewCard ? 0xe500: 0x6500, 2); 754 debiwrite(saa, debNormal, IBM_MP2_DISP_DLY, 755 (1 << 8) | 756 (NewCard ? PALFirstActive : PALFirstActive-6), 2); 757 } else { /* NTSC */ 758 debiwrite(saa, debNormal, XILINX_CTL0, 0x0800, 2); 759 mdelay(50); 760 saawrite(0x00f002c0, SAA7146_NUM_LINE_BYTE1); 761 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE, 762 NewCard ? 0xe100: 0x6100, 2); 763 debiwrite(saa, debNormal, IBM_MP2_DISP_DLY, 764 (1 << 8) | 765 (NewCard ? NTSCFirstActive : NTSCFirstActive-6), 2); 766 } 767} 768 769 770/* Intialize bitmangler to map from a byte value to the mangled word that 771 * must be output to program the Xilinx part through the DEBI port. 772 * Xilinx Data Bit->DEBI Bit: 0->15 1->7 2->6 3->12 4->11 5->2 6->1 7->0 773 * transfer FPGA code, init IBM chip, transfer IBM microcode 774 * rev2 card mangles: 0->7 1->6 2->5 3->4 4->3 5->2 6->1 7->0 775 */ 776static u16 bitmangler[256]; 777 778static int initialize_fpga(struct video_code *bitdata) 779{ 780 int i, num, startindex, failure = 0, loadtwo, loadfile = 0; 781 u16 *dmabuf; 782 u8 *newdma; 783 struct saa7146 *saa; 784 785 /* verify fpga code */ 786 for (startindex = 0; startindex < bitdata->datasize; startindex++) 787 if (bitdata->data[startindex] == 255) 788 break; 789 if (startindex == bitdata->datasize) { 790 printk(KERN_INFO "stradis: bad fpga code\n"); 791 return -1; 792 } 793 /* initialize all detected cards */ 794 for (num = 0; num < saa_num; num++) { 795 saa = &saa7146s[num]; 796 if (saa->boardcfg[0] > 20) 797 continue; /* card was programmed */ 798 loadtwo = (saa->boardcfg[18] & 0x10); 799 if (!NewCard) /* we have an old board */ 800 for (i = 0; i < 256; i++) 801 bitmangler[i] = ((i & 0x01) << 15) | 802 ((i & 0x02) << 6) | ((i & 0x04) << 4) | 803 ((i & 0x08) << 9) | ((i & 0x10) << 7) | 804 ((i & 0x20) >> 3) | ((i & 0x40) >> 5) | 805 ((i & 0x80) >> 7); 806 else /* else we have a new board */ 807 for (i = 0; i < 256; i++) 808 bitmangler[i] = ((i & 0x01) << 7) | 809 ((i & 0x02) << 5) | ((i & 0x04) << 3) | 810 ((i & 0x08) << 1) | ((i & 0x10) >> 1) | 811 ((i & 0x20) >> 3) | ((i & 0x40) >> 5) | 812 ((i & 0x80) >> 7); 813 814 dmabuf = (u16 *) saa->dmadebi; 815 newdma = (u8 *) saa->dmadebi; 816 if (NewCard) { /* SDM2xxx */ 817 if (!strncmp(bitdata->loadwhat, "decoder2", 8)) 818 continue; /* fpga not for this card */ 819 if (!strncmp(&saa->boardcfg[42], 820 bitdata->loadwhat, 8)) { 821 loadfile = 1; 822 } else if (loadtwo && !strncmp(&saa->boardcfg[19], 823 bitdata->loadwhat, 8)) { 824 loadfile = 2; 825 } else if (!saa->boardcfg[42] && /* special */ 826 !strncmp("decxl", bitdata->loadwhat, 8)) { 827 loadfile = 1; 828 } else 829 continue; /* fpga not for this card */ 830 if (loadfile != 1 && loadfile != 2) { 831 continue; /* skip to next card */ 832 } 833 if (saa->boardcfg[0] && loadfile == 1 ) 834 continue; /* skip to next card */ 835 if (saa->boardcfg[0] != 1 && loadfile == 2) 836 continue; /* skip to next card */ 837 saa->boardcfg[0]++; /* mark fpga handled */ 838 printk("stradis%d: loading %s\n", saa->nr, 839 bitdata->loadwhat); 840 if (loadtwo && loadfile == 2) 841 goto send_fpga_stuff; 842 /* turn on the Audio interface to set PROG low */ 843 saawrite(0x00400040, SAA7146_GPIO_CTRL); 844 saaread(SAA7146_PSR); /* ensure posted write */ 845 /* wait for everyone to reset */ 846 mdelay(10); 847 saawrite(0x00400000, SAA7146_GPIO_CTRL); 848 } else { /* original card */ 849 if (strncmp(bitdata->loadwhat, "decoder2", 8)) 850 continue; /* fpga not for this card */ 851 /* Pull the Xilinx PROG signal WS3 low */ 852 saawrite(0x02000200, SAA7146_MC1); 853 /* Turn on the Audio interface so can set PROG low */ 854 saawrite(0x000000c0, SAA7146_ACON1); 855 /* Pull the Xilinx INIT signal (GPIO2) low */ 856 saawrite(0x00400000, SAA7146_GPIO_CTRL); 857 /* Make sure everybody resets */ 858 saaread(SAA7146_PSR); /* ensure posted write */ 859 mdelay(10); 860 /* Release the Xilinx PROG signal */ 861 saawrite(0x00000000, SAA7146_ACON1); 862 /* Turn off the Audio interface */ 863 saawrite(0x02000000, SAA7146_MC1); 864 } 865 /* Release Xilinx INIT signal (WS2) */ 866 saawrite(0x00000000, SAA7146_GPIO_CTRL); 867 /* Wait for the INIT to go High */ 868 for (i = 0; i < 10000 && 869 !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2); i++) 870 schedule(); 871 if (i == 1000) { 872 printk(KERN_INFO "stradis%d: no fpga INIT\n", saa->nr); 873 return -1; 874 } 875send_fpga_stuff: 876 if (NewCard) { 877 for (i = startindex; i < bitdata->datasize; i++) 878 newdma[i - startindex] = 879 bitmangler[bitdata->data[i]]; 880 debiwrite(saa, 0x01420000, 0, 0, 881 ((bitdata->datasize - startindex) + 5)); 882 if (loadtwo) { 883 if (loadfile == 1) { 884 printk("stradis%d: " 885 "awaiting 2nd FPGA bitfile\n", 886 saa->nr); 887 continue; /* skip to next card */ 888 } 889 890 } 891 } else { 892 for (i = startindex; i < bitdata->datasize; i++) 893 dmabuf[i - startindex] = 894 bitmangler[bitdata->data[i]]; 895 debiwrite(saa, 0x014a0000, 0, 0, 896 ((bitdata->datasize - startindex) + 5) * 2); 897 } 898 for (i = 0; i < 1000 && 899 !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2); i++) 900 schedule(); 901 if (i == 1000) { 902 printk(KERN_INFO "stradis%d: FPGA load failed\n", 903 saa->nr); 904 failure++; 905 continue; 906 } 907 if (!NewCard) { 908 /* Pull the Xilinx INIT signal (GPIO2) low */ 909 saawrite(0x00400000, SAA7146_GPIO_CTRL); 910 saaread(SAA7146_PSR); /* ensure posted write */ 911 mdelay(2); 912 saawrite(0x00000000, SAA7146_GPIO_CTRL); 913 mdelay(2); 914 } 915 printk(KERN_INFO "stradis%d: FPGA Loaded\n", saa->nr); 916 saa->boardcfg[0] = 26; /* mark fpga programmed */ 917 /* set VXCO to its lowest frequency */ 918 debiwrite(saa, debNormal, XILINX_PWM, 0, 2); 919 if (NewCard) { 920 /* mute CS3310 */ 921 if (HaveCS3310) 922 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, 923 0, 2); 924 /* set VXCO to PWM mode, release reset, blank on */ 925 debiwrite(saa, debNormal, XILINX_CTL0, 0xffc4, 2); 926 mdelay(10); 927 /* unmute CS3310 */ 928 if (HaveCS3310) 929 debiwrite(saa, debNormal, XILINX_CTL0, 930 0x2020, 2); 931 } 932 /* set source Black */ 933 debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2); 934 saa->boardcfg[4] = 22; /* set NTSC First Active Line */ 935 saa->boardcfg[5] = 23; /* set PAL First Active Line */ 936 saa->boardcfg[54] = 2; /* set NTSC Last Active Line - 256 */ 937 saa->boardcfg[55] = 54; /* set PAL Last Active Line - 256 */ 938 set_out_format(saa, VIDEO_MODE_NTSC); 939 mdelay(50); 940 /* begin IBM chip init */ 941 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2); 942 saaread(SAA7146_PSR); /* wait for reset */ 943 mdelay(5); 944 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2); 945 debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2); 946 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0x10, 2); 947 debiwrite(saa, debNormal, IBM_MP2_CMD_ADDR, 0, 2); 948 debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2); 949 if (NewCard) { 950 mdelay(5); 951 /* set i2s rate converter to 48KHz */ 952 debiwrite(saa, debNormal, 0x80c0, 6, 2); 953 /* we must init CS8420 first since rev b pulls i2s */ 954 /* master clock low and CS4341 needs i2s master to */ 955 /* run the i2c port. */ 956 if (HaveCS8420) { 957 /* 0=consumer, 1=pro */ 958 initialize_cs8420(saa, 0); 959 } 960 mdelay(5); 961 if (HaveCS4341) 962 initialize_cs4341(saa); 963 } 964 debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2); 965 debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2); 966 debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2); 967 debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2); 968 if (NewCard) 969 set_genlock_offset(saa, 0); 970 debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2); 971 /* disable genlock */ 972 debiwrite(saa, debNormal, XILINX_CTL0, 0x8080, 2); 973 } 974 return failure; 975} 976 977static int do_ibm_reset(struct saa7146 *saa) 978{ 979 /* failure if decoder not previously programmed */ 980 if (saa->boardcfg[0] < 37) 981 return -EIO; 982 /* mute CS3310 */ 983 if (HaveCS3310) 984 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, 0, 2); 985 /* disable interrupts */ 986 saawrite(0, SAA7146_IER); 987 saa->audhead = saa->audtail = 0; 988 saa->vidhead = saa->vidtail = 0; 989 /* tristate debi bus, disable debi transfers */ 990 saawrite(0x00880000, SAA7146_MC1); 991 /* ensure posted write */ 992 saaread(SAA7146_MC1); 993 mdelay(50); 994 /* re-enable debi transfers */ 995 saawrite(0x00880088, SAA7146_MC1); 996 /* set source Black */ 997 debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2); 998 /* begin IBM chip init */ 999 set_out_format(saa, CurrentMode); 1000 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2); 1001 saaread(SAA7146_PSR); /* wait for reset */ 1002 mdelay(5); 1003 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2); 1004 debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2); 1005 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2); 1006 debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2); 1007 if (NewCard) { 1008 mdelay(5); 1009 /* set i2s rate converter to 48KHz */ 1010 debiwrite(saa, debNormal, 0x80c0, 6, 2); 1011 /* we must init CS8420 first since rev b pulls i2s */ 1012 /* master clock low and CS4341 needs i2s master to */ 1013 /* run the i2c port. */ 1014 if (HaveCS8420) { 1015 /* 0=consumer, 1=pro */ 1016 initialize_cs8420(saa, 1); 1017 } 1018 mdelay(5); 1019 if (HaveCS4341) 1020 initialize_cs4341(saa); 1021 } 1022 debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2); 1023 debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2); 1024 debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2); 1025 debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2); 1026 if (NewCard) 1027 set_genlock_offset(saa, 0); 1028 debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2); 1029 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2); 1030 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2); 1031 if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER, 1032 (ChipControl == 0x43 ? 0xe800 : 0xe000), 1)) { 1033 printk(KERN_ERR "stradis%d: IBM config failed\n", saa->nr); 1034 } 1035 if (HaveCS3310) { 1036 int i = CS3310MaxLvl; 1037 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, ((i<<8)|i), 2); 1038 } 1039 /* start video decoder */ 1040 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2); 1041 /* 256k vid, 3520 bytes aud */ 1042 debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD, 0x4037, 2); 1043 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2); 1044 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0); 1045 /* enable buffer threshold irq */ 1046 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2); 1047 /* clear pending interrupts */ 1048 debiread(saa, debNormal, IBM_MP2_HOST_INT, 2); 1049 debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2); 1050 return 0; 1051} 1052 1053/* load the decoder microcode */ 1054static int initialize_ibmmpeg2(struct video_code *microcode) 1055{ 1056 int i, num; 1057 struct saa7146 *saa; 1058 1059 for (num = 0; num < saa_num; num++) { 1060 saa = &saa7146s[num]; 1061 /* check that FPGA is loaded */ 1062 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0xa55a, 2); 1063 if ((i = debiread(saa, debNormal, IBM_MP2_OSD_SIZE, 2)) != 1064 0xa55a) { 1065 printk(KERN_INFO "stradis%d: %04x != 0xa55a\n", 1066 saa->nr, i); 1067 } 1068 if (!strncmp(microcode->loadwhat, "decoder.vid", 11)) { 1069 if (saa->boardcfg[0] > 27) 1070 continue; /* skip to next card */ 1071 /* load video control store */ 1072 saa->boardcfg[1] = 0x13; /* no-sync default */ 1073 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2); 1074 debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2); 1075 for (i = 0; i < microcode->datasize / 2; i++) 1076 debiwrite(saa, debNormal, IBM_MP2_PROC_IDATA, 1077 (microcode->data[i * 2] << 8) | 1078 microcode->data[i * 2 + 1], 2); 1079 debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2); 1080 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2); 1081 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 1082 ChipControl, 2); 1083 saa->boardcfg[0] = 28; 1084 } 1085 if (!strncmp(microcode->loadwhat, "decoder.aud", 11)) { 1086 if (saa->boardcfg[0] > 35) 1087 continue; /* skip to next card */ 1088 /* load audio control store */ 1089 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2); 1090 debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2); 1091 for (i = 0; i < microcode->datasize; i++) 1092 debiwrite(saa, debNormal, IBM_MP2_AUD_IDATA, 1093 microcode->data[i], 1); 1094 debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2); 1095 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2); 1096 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2); 1097 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2); 1098 if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER, 1099 0xe000, 1)) { 1100 printk(KERN_ERR 1101 "stradis%d: IBM config failed\n", 1102 saa->nr); 1103 return -1; 1104 } 1105 /* set PWM to center value */ 1106 if (NewCard) { 1107 debiwrite(saa, debNormal, XILINX_PWM, 1108 saa->boardcfg[14] + 1109 (saa->boardcfg[13]<<8), 2); 1110 } else 1111 debiwrite(saa, debNormal, XILINX_PWM, 1112 0x46, 2); 1113 if (HaveCS3310) { 1114 i = CS3310MaxLvl; 1115 debiwrite(saa, debNormal, 1116 XILINX_CS3310_CMPLT, ((i<<8)|i), 2); 1117 } 1118 printk(KERN_INFO 1119 "stradis%d: IBM MPEGCD%d Initialized\n", 1120 saa->nr, 18 + (debiread(saa, debNormal, 1121 IBM_MP2_CHIP_CONTROL, 2) >> 12)); 1122 /* start video decoder */ 1123 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 1124 ChipControl, 2); 1125 debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD, 1126 0x4037, 2); /* 256k vid, 3520 bytes aud */ 1127 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2); 1128 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0); 1129 /* enable buffer threshold irq */ 1130 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2); 1131 debiread(saa, debNormal, IBM_MP2_HOST_INT, 2); 1132 /* enable gpio irq */ 1133 saawrite(0x00002000, SAA7146_GPIO_CTRL); 1134 /* enable decoder output to HPS */ 1135 debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2); 1136 saa->boardcfg[0] = 37; 1137 } 1138 } 1139 return 0; 1140} 1141 1142static u32 palette2fmt[] = 1143{ /* some of these YUV translations are wrong */ 1144 0xffffffff, 0x86000000, 0x87000000, 0x80000000, 0x8100000, 0x82000000, 1145 0x83000000, 0x00000000, 0x03000000, 0x03000000, 0x0a00000, 0x03000000, 1146 0x06000000, 0x00000000, 0x03000000, 0x0a000000, 0x0300000 1147}; 1148static int bpp2fmt[4] = 1149{ 1150 VIDEO_PALETTE_HI240, VIDEO_PALETTE_RGB565, VIDEO_PALETTE_RGB24, 1151 VIDEO_PALETTE_RGB32 1152}; 1153 1154/* I wish I could find a formula to calculate these... */ 1155static u32 h_prescale[64] = 1156{ 1157 0x10000000, 0x18040202, 0x18080000, 0x380c0606, 0x38100204, 0x38140808, 1158 0x38180000, 0x381c0000, 0x3820161c, 0x38242a3b, 0x38281230, 0x382c4460, 1159 0x38301040, 0x38340080, 0x38380000, 0x383c0000, 0x3840fefe, 0x3844ee9f, 1160 0x3848ee9f, 0x384cee9f, 0x3850ee9f, 0x38542a3b, 0x38581230, 0x385c0000, 1161 0x38600000, 0x38640000, 0x38680000, 0x386c0000, 0x38700000, 0x38740000, 1162 0x38780000, 0x387c0000, 0x30800000, 0x38840000, 0x38880000, 0x388c0000, 1163 0x38900000, 0x38940000, 0x38980000, 0x389c0000, 0x38a00000, 0x38a40000, 1164 0x38a80000, 0x38ac0000, 0x38b00000, 0x38b40000, 0x38b80000, 0x38bc0000, 1165 0x38c00000, 0x38c40000, 0x38c80000, 0x38cc0000, 0x38d00000, 0x38d40000, 1166 0x38d80000, 0x38dc0000, 0x38e00000, 0x38e40000, 0x38e80000, 0x38ec0000, 1167 0x38f00000, 0x38f40000, 0x38f80000, 0x38fc0000, 1168}; 1169static u32 v_gain[64] = 1170{ 1171 0x016000ff, 0x016100ff, 0x016100ff, 0x016200ff, 0x016200ff, 0x016200ff, 1172 0x016200ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff, 1173 0x016300ff, 0x016300ff, 0x016300ff, 0x016400ff, 0x016400ff, 0x016400ff, 1174 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1175 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1176 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1177 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1178 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1179 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1180 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1181 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1182}; 1183 1184 1185static void saa7146_set_winsize(struct saa7146 *saa) 1186{ 1187 u32 format; 1188 int offset, yacl, ysci; 1189 saa->win.color_fmt = format = 1190 (saa->win.depth == 15) ? palette2fmt[VIDEO_PALETTE_RGB555] : 1191 palette2fmt[bpp2fmt[(saa->win.bpp - 1) & 3]]; 1192 offset = saa->win.x * saa->win.bpp + saa->win.y * saa->win.bpl; 1193 saawrite(saa->win.vidadr + offset, SAA7146_BASE_EVEN1); 1194 saawrite(saa->win.vidadr + offset + saa->win.bpl, SAA7146_BASE_ODD1); 1195 saawrite(saa->win.bpl * 2, SAA7146_PITCH1); 1196 saawrite(saa->win.vidadr + saa->win.bpl * saa->win.sheight, 1197 SAA7146_PROT_ADDR1); 1198 saawrite(0, SAA7146_PAGE1); 1199 saawrite(format|0x60, SAA7146_CLIP_FORMAT_CTRL); 1200 offset = (704 / (saa->win.width - 1)) & 0x3f; 1201 saawrite(h_prescale[offset], SAA7146_HPS_H_PRESCALE); 1202 offset = (720896 / saa->win.width) / (offset + 1); 1203 saawrite((offset<<12)|0x0c, SAA7146_HPS_H_SCALE); 1204 if (CurrentMode == VIDEO_MODE_NTSC) { 1205 yacl = /*(480 / saa->win.height - 1) & 0x3f*/ 0; 1206 ysci = 1024 - (saa->win.height * 1024 / 480); 1207 } else { 1208 yacl = /*(576 / saa->win.height - 1) & 0x3f*/ 0; 1209 ysci = 1024 - (saa->win.height * 1024 / 576); 1210 } 1211 saawrite((1<<31)|(ysci<<21)|(yacl<<15), SAA7146_HPS_V_SCALE); 1212 saawrite(v_gain[yacl], SAA7146_HPS_V_GAIN); 1213 saawrite(((SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_HPS_V | 1214 SAA7146_MC2_UPLD_HPS_H) << 16) | (SAA7146_MC2_UPLD_DMA1 | 1215 SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_HPS_H), 1216 SAA7146_MC2); 1217} 1218 1219/* clip_draw_rectangle(cm,x,y,w,h) -- handle clipping an area 1220 * bitmap is fixed width, 128 bytes (1024 pixels represented) 1221 * arranged most-sigificant-bit-left in 32-bit words 1222 * based on saa7146 clipping hardware, it swaps bytes if LE 1223 * much of this makes up for egcs brain damage -- so if you 1224 * are wondering "why did he do this?" it is because the C 1225 * was adjusted to generate the optimal asm output without 1226 * writing non-portable __asm__ directives. 1227 */ 1228 1229static void clip_draw_rectangle(u32 *clipmap, int x, int y, int w, int h) 1230{ 1231 register int startword, endword; 1232 register u32 bitsleft, bitsright; 1233 u32 *temp; 1234 if (x < 0) { 1235 w += x; 1236 x = 0; 1237 } 1238 if (y < 0) { 1239 h += y; 1240 y = 0; 1241 } 1242 if (w <= 0 || h <= 0 || x > 1023 || y > 639) 1243 return; /* throw away bad clips */ 1244 if (x + w > 1024) 1245 w = 1024 - x; 1246 if (y + h > 640) 1247 h = 640 - y; 1248 startword = (x >> 5); 1249 endword = ((x + w) >> 5); 1250 bitsleft = (0xffffffff >> (x & 31)); 1251 bitsright = (0xffffffff << (~((x + w) - (endword<<5)))); 1252 temp = &clipmap[(y<<5) + startword]; 1253 w = endword - startword; 1254 if (!w) { 1255 bitsleft |= bitsright; 1256 for (y = 0; y < h; y++) { 1257 *temp |= bitsleft; 1258 temp += 32; 1259 } 1260 } else { 1261 for (y = 0; y < h; y++) { 1262 *temp++ |= bitsleft; 1263 for (x = 1; x < w; x++) 1264 *temp++ = 0xffffffff; 1265 *temp |= bitsright; 1266 temp += (32 - w); 1267 } 1268 } 1269} 1270 1271static void make_clip_tab(struct saa7146 *saa, struct video_clip *cr, int ncr) 1272{ 1273 int i, width, height; 1274 u32 *clipmap; 1275 1276 clipmap = saa->dmavid2; 1277 if((width=saa->win.width)>1023) 1278 width = 1023; /* sanity check */ 1279 if((height=saa->win.height)>640) 1280 height = 639; /* sanity check */ 1281 if (ncr > 0) { /* rectangles pased */ 1282 /* convert rectangular clips to a bitmap */ 1283 memset(clipmap, 0, VIDEO_CLIPMAP_SIZE); /* clear map */ 1284 for (i = 0; i < ncr; i++) 1285 clip_draw_rectangle(clipmap, cr[i].x, cr[i].y, 1286 cr[i].width, cr[i].height); 1287 } 1288 /* clip against viewing window AND screen 1289 so we do not have to rely on the user program 1290 */ 1291 clip_draw_rectangle(clipmap,(saa->win.x+width>saa->win.swidth) ? 1292 (saa->win.swidth-saa->win.x) : width, 0, 1024, 768); 1293 clip_draw_rectangle(clipmap,0,(saa->win.y+height>saa->win.sheight) ? 1294 (saa->win.sheight-saa->win.y) : height,1024,768); 1295 if (saa->win.x<0) 1296 clip_draw_rectangle(clipmap, 0, 0, -(saa->win.x), 768); 1297 if (saa->win.y<0) 1298 clip_draw_rectangle(clipmap, 0, 0, 1024, -(saa->win.y)); 1299} 1300 1301static int saa_ioctl(struct video_device *dev, unsigned int cmd, void *arg) 1302{ 1303 struct saa7146 *saa = (struct saa7146 *) dev; 1304 switch (cmd) { 1305 case VIDIOCGCAP: 1306 { 1307 struct video_capability b; 1308 strcpy(b.name, saa->video_dev.name); 1309 b.type = VID_TYPE_CAPTURE | 1310 VID_TYPE_OVERLAY | 1311 VID_TYPE_CLIPPING | 1312 VID_TYPE_FRAMERAM | 1313 VID_TYPE_SCALES; 1314 b.channels = 1; 1315 b.audios = 1; 1316 b.maxwidth = 768; 1317 b.maxheight = 576; 1318 b.minwidth = 32; 1319 b.minheight = 32; 1320 if (copy_to_user(arg, &b, sizeof(b))) 1321 return -EFAULT; 1322 return 0; 1323 } 1324 case VIDIOCGPICT: 1325 { 1326 struct video_picture p = saa->picture; 1327 if (saa->win.depth == 8) 1328 p.palette = VIDEO_PALETTE_HI240; 1329 if (saa->win.depth == 15) 1330 p.palette = VIDEO_PALETTE_RGB555; 1331 if (saa->win.depth == 16) 1332 p.palette = VIDEO_PALETTE_RGB565; 1333 if (saa->win.depth == 24) 1334 p.palette = VIDEO_PALETTE_RGB24; 1335 if (saa->win.depth == 32) 1336 p.palette = VIDEO_PALETTE_RGB32; 1337 if (copy_to_user(arg, &p, sizeof(p))) 1338 return -EFAULT; 1339 return 0; 1340 } 1341 case VIDIOCSPICT: 1342 { 1343 struct video_picture p; 1344 u32 format; 1345 if (copy_from_user(&p, arg, sizeof(p))) 1346 return -EFAULT; 1347 if (p.palette < sizeof(palette2fmt) / sizeof(u32)) { 1348 format = palette2fmt[p.palette]; 1349 saa->win.color_fmt = format; 1350 saawrite(format|0x60, SAA7146_CLIP_FORMAT_CTRL); 1351 } 1352 saawrite(((p.brightness & 0xff00) << 16) | 1353 ((p.contrast & 0xfe00) << 7) | 1354 ((p.colour & 0xfe00) >> 9), SAA7146_BCS_CTRL); 1355 saa->picture = p; 1356 /* upload changed registers */ 1357 saawrite(((SAA7146_MC2_UPLD_HPS_H | 1358 SAA7146_MC2_UPLD_HPS_V) << 16) | 1359 SAA7146_MC2_UPLD_HPS_H | SAA7146_MC2_UPLD_HPS_V, 1360 SAA7146_MC2); 1361 return 0; 1362 } 1363 case VIDIOCSWIN: 1364 { 1365 struct video_window vw; 1366 struct video_clip *vcp = NULL; 1367 1368 if (copy_from_user(&vw, arg, sizeof(vw))) 1369 return -EFAULT; 1370 1371 if (vw.flags || vw.width < 16 || vw.height < 16) { /* stop capture */ 1372 saawrite((SAA7146_MC1_TR_E_1 << 16), SAA7146_MC1); 1373 return -EINVAL; 1374 } 1375 if (saa->win.bpp < 4) { /* 32-bit align start and adjust width */ 1376 int i = vw.x; 1377 vw.x = (vw.x + 3) & ~3; 1378 i = vw.x - i; 1379 vw.width -= i; 1380 } 1381 saa->win.x = vw.x; 1382 saa->win.y = vw.y; 1383 saa->win.width = vw.width; 1384 if (saa->win.width > 768) 1385 saa->win.width = 768; 1386 saa->win.height = vw.height; 1387 if (CurrentMode == VIDEO_MODE_NTSC) { 1388 if (saa->win.height > 480) 1389 saa->win.height = 480; 1390 } else { 1391 if (saa->win.height > 576) 1392 saa->win.height = 576; 1393 } 1394 1395 /* stop capture */ 1396 saawrite((SAA7146_MC1_TR_E_1 << 16), SAA7146_MC1); 1397 saa7146_set_winsize(saa); 1398 1399 /* 1400 * Do any clips. 1401 */ 1402 if (vw.clipcount < 0) { 1403 if (copy_from_user(saa->dmavid2, vw.clips, 1404 VIDEO_CLIPMAP_SIZE)) 1405 return -EFAULT; 1406 } 1407 else if (vw.clipcount > 16384) { 1408 return -EINVAL; 1409 } else if (vw.clipcount > 0) { 1410 if ((vcp = vmalloc(sizeof(struct video_clip) * 1411 (vw.clipcount))) == NULL) 1412 return -ENOMEM; 1413 if (copy_from_user(vcp, vw.clips, 1414 sizeof(struct video_clip) * 1415 vw.clipcount)) { 1416 vfree(vcp); 1417 return -EFAULT; 1418 } 1419 } else /* nothing clipped */ 1420 memset(saa->dmavid2, 0, VIDEO_CLIPMAP_SIZE); 1421 make_clip_tab(saa, vcp, vw.clipcount); 1422 if (vw.clipcount > 0) 1423 vfree(vcp); 1424 1425 /* start capture & clip dma if we have an address */ 1426 if ((saa->cap & 3) && saa->win.vidadr != 0) 1427 saawrite(((SAA7146_MC1_TR_E_1 | 1428 SAA7146_MC1_TR_E_2) << 16) | 0xffff, 1429 SAA7146_MC1); 1430 return 0; 1431 } 1432 case VIDIOCGWIN: 1433 { 1434 struct video_window vw; 1435 vw.x = saa->win.x; 1436 vw.y = saa->win.y; 1437 vw.width = saa->win.width; 1438 vw.height = saa->win.height; 1439 vw.chromakey = 0; 1440 vw.flags = 0; 1441 if (copy_to_user(arg, &vw, sizeof(vw))) 1442 return -EFAULT; 1443 return 0; 1444 } 1445 case VIDIOCCAPTURE: 1446 { 1447 int v; 1448 if (copy_from_user(&v, arg, sizeof(v))) 1449 return -EFAULT; 1450 if (v == 0) { 1451 saa->cap &= ~1; 1452 saawrite((SAA7146_MC1_TR_E_1 << 16), 1453 SAA7146_MC1); 1454 } else { 1455 if (saa->win.vidadr == 0 || saa->win.width == 0 1456 || saa->win.height == 0) 1457 return -EINVAL; 1458 saa->cap |= 1; 1459 saawrite((SAA7146_MC1_TR_E_1 << 16) | 0xffff, 1460 SAA7146_MC1); 1461 } 1462 return 0; 1463 } 1464 case VIDIOCGFBUF: 1465 { 1466 struct video_buffer v; 1467 v.base = (void *) saa->win.vidadr; 1468 v.height = saa->win.sheight; 1469 v.width = saa->win.swidth; 1470 v.depth = saa->win.depth; 1471 v.bytesperline = saa->win.bpl; 1472 if (copy_to_user(arg, &v, sizeof(v))) 1473 return -EFAULT; 1474 return 0; 1475 1476 } 1477 case VIDIOCSFBUF: 1478 { 1479 struct video_buffer v; 1480 if (!capable(CAP_SYS_ADMIN)) 1481 return -EPERM; 1482 if (copy_from_user(&v, arg, sizeof(v))) 1483 return -EFAULT; 1484 if (v.depth != 8 && v.depth != 15 && v.depth != 16 && 1485 v.depth != 24 && v.depth != 32 && v.width > 16 && 1486 v.height > 16 && v.bytesperline > 16) 1487 return -EINVAL; 1488 if (v.base) 1489 saa->win.vidadr = (unsigned long) v.base; 1490 saa->win.sheight = v.height; 1491 saa->win.swidth = v.width; 1492 saa->win.bpp = ((v.depth + 7) & 0x38) / 8; 1493 saa->win.depth = v.depth; 1494 saa->win.bpl = v.bytesperline; 1495 1496 DEBUG(printk("Display at %p is %d by %d, bytedepth %d, bpl %d\n", 1497 v.base, v.width, v.height, saa->win.bpp, saa->win.bpl)); 1498 saa7146_set_winsize(saa); 1499 return 0; 1500 } 1501 case VIDIOCKEY: 1502 { 1503 /* Will be handled higher up .. */ 1504 return 0; 1505 } 1506 1507 case VIDIOCGAUDIO: 1508 { 1509 struct video_audio v; 1510 v = saa->audio_dev; 1511 v.flags &= ~(VIDEO_AUDIO_MUTE | VIDEO_AUDIO_MUTABLE); 1512 v.flags |= VIDEO_AUDIO_MUTABLE | VIDEO_AUDIO_VOLUME; 1513 strcpy(v.name, "MPEG"); 1514 v.mode = VIDEO_SOUND_STEREO; 1515 if (copy_to_user(arg, &v, sizeof(v))) 1516 return -EFAULT; 1517 return 0; 1518 } 1519 case VIDIOCSAUDIO: 1520 { 1521 struct video_audio v; 1522 int i; 1523 if (copy_from_user(&v, arg, sizeof(v))) 1524 return -EFAULT; 1525 i = (~(v.volume>>8))&0xff; 1526 if (!HaveCS4341) { 1527 if (v.flags & VIDEO_AUDIO_MUTE) { 1528 debiwrite(saa, debNormal, 1529 IBM_MP2_FRNT_ATTEN, 1530 0xffff, 2); 1531 } 1532 if (!(v.flags & VIDEO_AUDIO_MUTE)) 1533 debiwrite(saa, debNormal, 1534 IBM_MP2_FRNT_ATTEN, 1535 0x0000, 2); 1536 if (v.flags & VIDEO_AUDIO_VOLUME) 1537 debiwrite(saa, debNormal, 1538 IBM_MP2_FRNT_ATTEN, 1539 (i<<8)|i, 2); 1540 } else { 1541 if (v.flags & VIDEO_AUDIO_MUTE) 1542 cs4341_setlevel(saa, 0xff, 0xff); 1543 if (!(v.flags & VIDEO_AUDIO_MUTE)) 1544 cs4341_setlevel(saa, 0, 0); 1545 if (v.flags & VIDEO_AUDIO_VOLUME) 1546 cs4341_setlevel(saa, i, i); 1547 } 1548 saa->audio_dev = v; 1549 return 0; 1550 } 1551 1552 case VIDIOCGUNIT: 1553 { 1554 struct video_unit vu; 1555 vu.video = saa->video_dev.minor; 1556 vu.vbi = VIDEO_NO_UNIT; 1557 vu.radio = VIDEO_NO_UNIT; 1558 vu.audio = VIDEO_NO_UNIT; 1559 vu.teletext = VIDEO_NO_UNIT; 1560 if (copy_to_user((void *) arg, (void *) &vu, sizeof(vu))) 1561 return -EFAULT; 1562 return 0; 1563 } 1564 case VIDIOCSPLAYMODE: 1565 { 1566 struct video_play_mode pmode; 1567 if (copy_from_user((void *) &pmode, arg, 1568 sizeof(struct video_play_mode))) 1569 return -EFAULT; 1570 switch (pmode.mode) { 1571 case VID_PLAY_VID_OUT_MODE: 1572 if (pmode.p1 != VIDEO_MODE_NTSC && 1573 pmode.p1 != VIDEO_MODE_PAL) 1574 return -EINVAL; 1575 set_out_format(saa, pmode.p1); 1576 return 0; 1577 case VID_PLAY_GENLOCK: 1578 debiwrite(saa, debNormal, 1579 XILINX_CTL0, 1580 (pmode.p1 ? 0x8000 : 0x8080), 1581 2); 1582 if (NewCard) 1583 set_genlock_offset(saa, 1584 pmode.p2); 1585 return 0; 1586 case VID_PLAY_NORMAL: 1587 debiwrite(saa, debNormal, 1588 IBM_MP2_CHIP_CONTROL, 1589 ChipControl, 2); 1590 ibm_send_command(saa, 1591 IBM_MP2_PLAY, 0, 0); 1592 saa->playmode = pmode.mode; 1593 return 0; 1594 case VID_PLAY_PAUSE: 1595 /* IBM removed the PAUSE command */ 1596 /* they say use SINGLE_FRAME now */ 1597 case VID_PLAY_SINGLE_FRAME: 1598 ibm_send_command(saa, 1599 IBM_MP2_SINGLE_FRAME, 1600 0, 0); 1601 if (saa->playmode == pmode.mode) { 1602 debiwrite(saa, debNormal, 1603 IBM_MP2_CHIP_CONTROL, 1604 ChipControl, 2); 1605 } 1606 saa->playmode = pmode.mode; 1607 return 0; 1608 case VID_PLAY_FAST_FORWARD: 1609 ibm_send_command(saa, 1610 IBM_MP2_FAST_FORWARD, 0, 0); 1611 saa->playmode = pmode.mode; 1612 return 0; 1613 case VID_PLAY_SLOW_MOTION: 1614 ibm_send_command(saa, 1615 IBM_MP2_SLOW_MOTION, 1616 pmode.p1, 0); 1617 saa->playmode = pmode.mode; 1618 return 0; 1619 case VID_PLAY_IMMEDIATE_NORMAL: 1620 /* ensure transfers resume */ 1621 debiwrite(saa, debNormal, 1622 IBM_MP2_CHIP_CONTROL, 1623 ChipControl, 2); 1624 ibm_send_command(saa, 1625 IBM_MP2_IMED_NORM_PLAY, 0, 0); 1626 saa->playmode = VID_PLAY_NORMAL; 1627 return 0; 1628 case VID_PLAY_SWITCH_CHANNELS: 1629 saa->audhead = saa->audtail = 0; 1630 saa->vidhead = saa->vidtail = 0; 1631 ibm_send_command(saa, 1632 IBM_MP2_FREEZE_FRAME, 0, 1); 1633 ibm_send_command(saa, 1634 IBM_MP2_RESET_AUD_RATE, 0, 1); 1635 debiwrite(saa, debNormal, 1636 IBM_MP2_CHIP_CONTROL, 0, 2); 1637 ibm_send_command(saa, 1638 IBM_MP2_CHANNEL_SWITCH, 0, 1); 1639 debiwrite(saa, debNormal, 1640 IBM_MP2_CHIP_CONTROL, 1641 ChipControl, 2); 1642 ibm_send_command(saa, 1643 IBM_MP2_PLAY, 0, 0); 1644 saa->playmode = VID_PLAY_NORMAL; 1645 return 0; 1646 case VID_PLAY_FREEZE_FRAME: 1647 ibm_send_command(saa, 1648 IBM_MP2_FREEZE_FRAME, 0, 0); 1649 saa->playmode = pmode.mode; 1650 return 0; 1651 case VID_PLAY_STILL_MODE: 1652 ibm_send_command(saa, 1653 IBM_MP2_SET_STILL_MODE, 0, 0); 1654 saa->playmode = pmode.mode; 1655 return 0; 1656 case VID_PLAY_MASTER_MODE: 1657 if (pmode.p1 == VID_PLAY_MASTER_NONE) 1658 saa->boardcfg[1] = 0x13; 1659 else if (pmode.p1 == 1660 VID_PLAY_MASTER_VIDEO) 1661 saa->boardcfg[1] = 0x23; 1662 else if (pmode.p1 == 1663 VID_PLAY_MASTER_AUDIO) 1664 saa->boardcfg[1] = 0x43; 1665 else 1666 return -EINVAL; 1667 debiwrite(saa, debNormal, 1668 IBM_MP2_CHIP_CONTROL, 1669 ChipControl, 2); 1670 return 0; 1671 case VID_PLAY_ACTIVE_SCANLINES: 1672 if (CurrentMode == VIDEO_MODE_PAL) { 1673 if (pmode.p1 < 1 || 1674 pmode.p2 > 625) 1675 return -EINVAL; 1676 saa->boardcfg[5] = pmode.p1; 1677 saa->boardcfg[55] = (pmode.p1 + 1678 (pmode.p2/2) - 1) & 1679 0xff; 1680 } else { 1681 if (pmode.p1 < 4 || 1682 pmode.p2 > 525) 1683 return -EINVAL; 1684 saa->boardcfg[4] = pmode.p1; 1685 saa->boardcfg[54] = (pmode.p1 + 1686 (pmode.p2/2) - 4) & 1687 0xff; 1688 } 1689 set_out_format(saa, CurrentMode); 1690 case VID_PLAY_RESET: 1691 return do_ibm_reset(saa); 1692 case VID_PLAY_END_MARK: 1693 if (saa->endmarktail < 1694 saa->endmarkhead) { 1695 if (saa->endmarkhead - 1696 saa->endmarktail < 2) 1697 return -ENOSPC; 1698 } else if (saa->endmarkhead <= 1699 saa->endmarktail) { 1700 if (saa->endmarktail - 1701 saa->endmarkhead > 1702 (MAX_MARKS - 2)) 1703 return -ENOSPC; 1704 } else 1705 return -ENOSPC; 1706 saa->endmark[saa->endmarktail] = 1707 saa->audtail; 1708 saa->endmarktail++; 1709 if (saa->endmarktail >= MAX_MARKS) 1710 saa->endmarktail = 0; 1711 } 1712 return -EINVAL; 1713 } 1714 case VIDIOCSWRITEMODE: 1715 { 1716 int mode; 1717 if (copy_from_user((void *) &mode, arg, sizeof(int))) 1718 return -EFAULT; 1719 if (mode == VID_WRITE_MPEG_AUD || 1720 mode == VID_WRITE_MPEG_VID || 1721 mode == VID_WRITE_CC || 1722 mode == VID_WRITE_TTX || 1723 mode == VID_WRITE_OSD) { 1724 saa->writemode = mode; 1725 return 0; 1726 } 1727 return -EINVAL; 1728 } 1729 case VIDIOCSMICROCODE: 1730 { 1731 struct video_code ucode; 1732 __u8 *udata; 1733 int i; 1734 if (copy_from_user((void *) &ucode, arg, 1735 sizeof(ucode))) 1736 return -EFAULT; 1737 if (ucode.datasize > 65536 || ucode.datasize < 1024 || 1738 strncmp(ucode.loadwhat, "dec", 3)) 1739 return -EINVAL; 1740 if ((udata = vmalloc(ucode.datasize)) == NULL) 1741 return -ENOMEM; 1742 if (copy_from_user((void *) udata, ucode.data, 1743 ucode.datasize)) { 1744 vfree(udata); 1745 return -EFAULT; 1746 } 1747 ucode.data = udata; 1748 if (!strncmp(ucode.loadwhat, "decoder.aud", 11) 1749 || !strncmp(ucode.loadwhat, "decoder.vid", 11)) 1750 i = initialize_ibmmpeg2(&ucode); 1751 else 1752 i = initialize_fpga(&ucode); 1753 vfree(udata); 1754 if (i) 1755 return -EINVAL; 1756 return 0; 1757 1758 } 1759 case VIDIOCGCHAN: /* this makes xawtv happy */ 1760 { 1761 struct video_channel v; 1762 if (copy_from_user(&v, arg, sizeof(v))) 1763 return -EFAULT; 1764 v.flags = VIDEO_VC_AUDIO; 1765 v.tuners = 0; 1766 v.type = VID_TYPE_MPEG_DECODER; 1767 v.norm = CurrentMode; 1768 strcpy(v.name, "MPEG2"); 1769 if (copy_to_user(arg, &v, sizeof(v))) 1770 return -EFAULT; 1771 return 0; 1772 } 1773 case VIDIOCSCHAN: /* this makes xawtv happy */ 1774 { 1775 struct video_channel v; 1776 if (copy_from_user(&v, arg, sizeof(v))) 1777 return -EFAULT; 1778 /* do nothing */ 1779 return 0; 1780 } 1781 default: 1782 return -ENOIOCTLCMD; 1783 } 1784 return 0; 1785} 1786 1787static int saa_mmap(struct video_device *dev, const char *adr, 1788 unsigned long size) 1789{ 1790 struct saa7146 *saa = (struct saa7146 *) dev; 1791 printk(KERN_DEBUG "stradis%d: saa_mmap called\n", saa->nr); 1792 return -EINVAL; 1793} 1794 1795static long saa_read(struct video_device *dev, char *buf, 1796 unsigned long count, int nonblock) 1797{ 1798 return -EINVAL; 1799} 1800 1801static long saa_write(struct video_device *dev, const char *buf, 1802 unsigned long count, int nonblock) 1803{ 1804 struct saa7146 *saa = (struct saa7146 *) dev; 1805 unsigned long todo = count; 1806 int blocksize, split; 1807 unsigned long flags; 1808 1809 while (todo > 0) { 1810 if (saa->writemode == VID_WRITE_MPEG_AUD) { 1811 spin_lock_irqsave(&saa->lock, flags); 1812 if (saa->audhead <= saa->audtail) 1813 blocksize = 65536-(saa->audtail - saa->audhead); 1814 else 1815 blocksize = saa->audhead - saa->audtail; 1816 spin_unlock_irqrestore(&saa->lock, flags); 1817 if (blocksize < 16384) { 1818 saawrite(SAA7146_PSR_DEBI_S | 1819 SAA7146_PSR_PIN1, SAA7146_IER); 1820 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR); 1821 /* wait for buffer space to open */ 1822 interruptible_sleep_on(&saa->audq); 1823 } 1824 spin_lock_irqsave(&saa->lock, flags); 1825 if (saa->audhead <= saa->audtail) { 1826 blocksize = 65536-(saa->audtail - saa->audhead); 1827 split = 65536 - saa->audtail; 1828 } else { 1829 blocksize = saa->audhead - saa->audtail; 1830 split = 65536; 1831 } 1832 spin_unlock_irqrestore(&saa->lock, flags); 1833 blocksize--; 1834 if (blocksize > todo) 1835 blocksize = todo; 1836 /* double check that we really have space */ 1837 if (!blocksize) 1838 return -ENOSPC; 1839 if (split < blocksize) { 1840 if (copy_from_user(saa->audbuf + 1841 saa->audtail, buf, split)) 1842 return -EFAULT; 1843 buf += split; 1844 todo -= split; 1845 blocksize -= split; 1846 saa->audtail = 0; 1847 } 1848 if (copy_from_user(saa->audbuf + saa->audtail, buf, 1849 blocksize)) 1850 return -EFAULT; 1851 saa->audtail += blocksize; 1852 todo -= blocksize; 1853 buf += blocksize; 1854 saa->audtail &= 0xffff; 1855 } else if (saa->writemode == VID_WRITE_MPEG_VID) { 1856 spin_lock_irqsave(&saa->lock, flags); 1857 if (saa->vidhead <= saa->vidtail) 1858 blocksize=524288-(saa->vidtail - saa->vidhead); 1859 else 1860 blocksize = saa->vidhead - saa->vidtail; 1861 spin_unlock_irqrestore(&saa->lock, flags); 1862 if (blocksize < 65536) { 1863 saawrite(SAA7146_PSR_DEBI_S | 1864 SAA7146_PSR_PIN1, SAA7146_IER); 1865 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR); 1866 /* wait for buffer space to open */ 1867 interruptible_sleep_on(&saa->vidq); 1868 } 1869 spin_lock_irqsave(&saa->lock, flags); 1870 if (saa->vidhead <= saa->vidtail) { 1871 blocksize=524288-(saa->vidtail - saa->vidhead); 1872 split = 524288 - saa->vidtail; 1873 } else { 1874 blocksize = saa->vidhead - saa->vidtail; 1875 split = 524288; 1876 } 1877 spin_unlock_irqrestore(&saa->lock, flags); 1878 blocksize--; 1879 if (blocksize > todo) 1880 blocksize = todo; 1881 /* double check that we really have space */ 1882 if (!blocksize) 1883 return -ENOSPC; 1884 if (split < blocksize) { 1885 if (copy_from_user(saa->vidbuf + 1886 saa->vidtail, buf, split)) 1887 return -EFAULT; 1888 buf += split; 1889 todo -= split; 1890 blocksize -= split; 1891 saa->vidtail = 0; 1892 } 1893 if (copy_from_user(saa->vidbuf + saa->vidtail, buf, 1894 blocksize)) 1895 return -EFAULT; 1896 saa->vidtail += blocksize; 1897 todo -= blocksize; 1898 buf += blocksize; 1899 saa->vidtail &= 0x7ffff; 1900 } else if (saa->writemode == VID_WRITE_OSD) { 1901 if (count > 131072) 1902 return -ENOSPC; 1903 if (copy_from_user(saa->osdbuf, buf, count)) 1904 return -EFAULT; 1905 buf += count; 1906 saa->osdhead = 0; 1907 saa->osdtail = count; 1908 debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR, 0, 2); 1909 debiwrite(saa, debNormal, IBM_MP2_OSD_LINK_ADDR, 0, 2); 1910 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00d, 2); 1911 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE, 1912 debiread(saa, debNormal, 1913 IBM_MP2_DISP_MODE, 2) | 1, 2); 1914 /* trigger osd data transfer */ 1915 saawrite(SAA7146_PSR_DEBI_S | 1916 SAA7146_PSR_PIN1, SAA7146_IER); 1917 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR); 1918 } 1919 } 1920 return count; 1921} 1922 1923static int saa_open(struct video_device *dev, int flags) 1924{ 1925 struct saa7146 *saa = (struct saa7146 *) dev; 1926 1927 saa->video_dev.users--; 1928 saa->user++; 1929 if (saa->user > 1) 1930 return 0; /* device open already, don't reset */ 1931 saa->writemode = VID_WRITE_MPEG_VID; /* default to video */ 1932 return 0; 1933} 1934 1935static void saa_close(struct video_device *dev) 1936{ 1937 struct saa7146 *saa = (struct saa7146 *) dev; 1938 saa->user--; 1939 saa->video_dev.users++; 1940 if (saa->user > 0) /* still someone using device */ 1941 return; 1942 saawrite(0x007f0000, SAA7146_MC1); /* stop all overlay dma */ 1943} 1944 1945/* template for video_device-structure */ 1946static struct video_device saa_template = 1947{ 1948 owner: THIS_MODULE, 1949 name: "SAA7146A", 1950 type: VID_TYPE_CAPTURE | VID_TYPE_OVERLAY, 1951 hardware: VID_HARDWARE_SAA7146, 1952 open: saa_open, 1953 close: saa_close, 1954 read: saa_read, 1955 write: saa_write, 1956 ioctl: saa_ioctl, 1957 mmap: saa_mmap, 1958}; 1959 1960static int configure_saa7146(struct pci_dev *dev, int num) 1961{ 1962 int result; 1963 struct saa7146 *saa; 1964 1965 saa = &saa7146s[num]; 1966 1967 saa->endmarkhead = saa->endmarktail = 0; 1968 saa->win.x = saa->win.y = 0; 1969 saa->win.width = saa->win.cropwidth = 720; 1970 saa->win.height = saa->win.cropheight = 480; 1971 saa->win.cropx = saa->win.cropy = 0; 1972 saa->win.bpp = 2; 1973 saa->win.depth = 16; 1974 saa->win.color_fmt = palette2fmt[VIDEO_PALETTE_RGB565]; 1975 saa->win.bpl = 1024 * saa->win.bpp; 1976 saa->win.swidth = 1024; 1977 saa->win.sheight = 768; 1978 saa->picture.brightness = 32768; 1979 saa->picture.contrast = 38768; 1980 saa->picture.colour = 32768; 1981 saa->cap = 0; 1982 saa->dev = dev; 1983 saa->nr = num; 1984 saa->playmode = VID_PLAY_NORMAL; 1985 memset(saa->boardcfg, 0, 64); /* clear board config area */ 1986 saa->saa7146_mem = NULL; 1987 saa->dmavid1 = saa->dmavid2 = saa->dmavid3 = saa->dmaa1in = 1988 saa->dmaa1out = saa->dmaa2in = saa->dmaa2out = 1989 saa->pagevid1 = saa->pagevid2 = saa->pagevid3 = saa->pagea1in = 1990 saa->pagea1out = saa->pagea2in = saa->pagea2out = 1991 saa->pagedebi = saa->dmaRPS1 = saa->dmaRPS2 = saa->pageRPS1 = 1992 saa->pageRPS2 = NULL; 1993 saa->audbuf = saa->vidbuf = saa->osdbuf = saa->dmadebi = NULL; 1994 saa->audhead = saa->vidtail = 0; 1995 1996 init_waitqueue_head(&saa->i2cq); 1997 init_waitqueue_head(&saa->audq); 1998 init_waitqueue_head(&saa->debiq); 1999 init_waitqueue_head(&saa->vidq); 2000 spin_lock_init(&saa->lock); 2001 2002 if (pci_enable_device(dev)) 2003 return -EIO; 2004 2005 saa->id = dev->device; 2006 saa->irq = dev->irq; 2007 saa->video_dev.minor = -1; 2008 saa->saa7146_adr = pci_resource_start(dev, 0); 2009 pci_read_config_byte(dev, PCI_CLASS_REVISION, &saa->revision); 2010 2011 saa->saa7146_mem = ioremap(saa->saa7146_adr, 0x200); 2012 if (!saa->saa7146_mem) 2013 return -EIO; 2014 2015 memcpy(&(saa->i2c), &saa7146_i2c_bus_template, sizeof(struct i2c_bus)); 2016 memcpy(&saa->video_dev, &saa_template, sizeof(saa_template)); 2017 sprintf(saa->i2c.name, "stradis%d", num); 2018 saa->i2c.data = saa; 2019 saawrite(0, SAA7146_IER); /* turn off all interrupts */ 2020 result = request_irq(saa->irq, saa7146_irq, 2021 SA_SHIRQ | SA_INTERRUPT, "stradis", (void *) saa); 2022 if (result == -EINVAL) 2023 printk(KERN_ERR "stradis%d: Bad irq number or handler\n", 2024 num); 2025 if (result == -EBUSY) 2026 printk(KERN_ERR "stradis%d: IRQ %ld busy, change your PnP" 2027 " config in BIOS\n", num, saa->irq); 2028 if (result < 0) { 2029 iounmap(saa->saa7146_mem); 2030 return result; 2031 } 2032 pci_set_master(dev); 2033 if (video_register_device(&saa->video_dev, VFL_TYPE_GRABBER, video_nr) < 0) { 2034 iounmap(saa->saa7146_mem); 2035 return -1; 2036 } 2037 return 0; 2038} 2039 2040static int init_saa7146(int i) 2041{ 2042 struct saa7146 *saa = &saa7146s[i]; 2043 2044 saa->user = 0; 2045 /* reset the saa7146 */ 2046 saawrite(0xffff0000, SAA7146_MC1); 2047 mdelay(5); 2048 /* enable debi and i2c transfers and pins */ 2049 saawrite(((SAA7146_MC1_EDP | SAA7146_MC1_EI2C | 2050 SAA7146_MC1_TR_E_DEBI) << 16) | 0xffff, SAA7146_MC1); 2051 /* ensure proper state of chip */ 2052 saawrite(0x00000000, SAA7146_PAGE1); 2053 saawrite(0x00f302c0, SAA7146_NUM_LINE_BYTE1); 2054 saawrite(0x00000000, SAA7146_PAGE2); 2055 saawrite(0x01400080, SAA7146_NUM_LINE_BYTE2); 2056 saawrite(0x00000000, SAA7146_DD1_INIT); 2057 saawrite(0x00000000, SAA7146_DD1_STREAM_B); 2058 saawrite(0x00000000, SAA7146_DD1_STREAM_A); 2059 saawrite(0x00000000, SAA7146_BRS_CTRL); 2060 saawrite(0x80400040, SAA7146_BCS_CTRL); 2061 saawrite(0x0000e000 /*| (1<<29)*/, SAA7146_HPS_CTRL); 2062 saawrite(0x00000060, SAA7146_CLIP_FORMAT_CTRL); 2063 saawrite(0x00000000, SAA7146_ACON1); 2064 saawrite(0x00000000, SAA7146_ACON2); 2065 saawrite(0x00000600, SAA7146_I2C_STATUS); 2066 saawrite(((SAA7146_MC2_UPLD_D1_B | SAA7146_MC2_UPLD_D1_A | 2067 SAA7146_MC2_UPLD_BRS | SAA7146_MC2_UPLD_HPS_H | 2068 SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_DMA2 | 2069 SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_I2C) << 16) | 0xffff, 2070 SAA7146_MC2); 2071 /* setup arbitration control registers */ 2072 saawrite(0x1412121a, SAA7146_PCI_BT_V1); 2073 2074 /* allocate 32k dma buffer + 4k for page table */ 2075 if ((saa->dmadebi = kmalloc(32768 + 4096, GFP_KERNEL)) == NULL) { 2076 printk(KERN_ERR "stradis%d: debi kmalloc failed\n", i); 2077 return -1; 2078 } 2079 saa->audhead = saa->vidhead = saa->osdhead = 0; 2080 saa->audtail = saa->vidtail = saa->osdtail = 0; 2081 if (saa->vidbuf == NULL) 2082 if ((saa->vidbuf = vmalloc(524288)) == NULL) { 2083 printk(KERN_ERR "stradis%d: malloc failed\n", saa->nr); 2084 return -ENOMEM; 2085 } 2086 if (saa->audbuf == NULL) 2087 if ((saa->audbuf = vmalloc(65536)) == NULL) { 2088 printk(KERN_ERR "stradis%d: malloc failed\n", saa->nr); 2089 vfree(saa->vidbuf); 2090 saa->vidbuf = NULL; 2091 return -ENOMEM; 2092 } 2093 if (saa->osdbuf == NULL) 2094 if ((saa->osdbuf = vmalloc(131072)) == NULL) { 2095 printk(KERN_ERR "stradis%d: malloc failed\n", saa->nr); 2096 vfree(saa->vidbuf); 2097 vfree(saa->audbuf); 2098 saa->vidbuf = saa->audbuf = NULL; 2099 return -ENOMEM; 2100 } 2101 /* allocate 81920 byte buffer for clipping */ 2102 if ((saa->dmavid2 = kmalloc(VIDEO_CLIPMAP_SIZE, GFP_KERNEL)) == NULL) { 2103 printk(KERN_ERR "stradis%d: clip kmalloc failed\n", saa->nr); 2104 vfree(saa->vidbuf); 2105 vfree(saa->audbuf); 2106 vfree(saa->osdbuf); 2107 saa->vidbuf = saa->audbuf = saa->osdbuf = NULL; 2108 saa->dmavid2 = NULL; 2109 return -1; 2110 } 2111 memset(saa->dmavid2, 0x00, VIDEO_CLIPMAP_SIZE); /* clip everything */ 2112 /* setup clipping registers */ 2113 saawrite(virt_to_bus(saa->dmavid2), SAA7146_BASE_EVEN2); 2114 saawrite(virt_to_bus(saa->dmavid2) + 128, SAA7146_BASE_ODD2); 2115 saawrite(virt_to_bus(saa->dmavid2) + VIDEO_CLIPMAP_SIZE, 2116 SAA7146_PROT_ADDR2); 2117 saawrite(256, SAA7146_PITCH2); 2118 saawrite(4, SAA7146_PAGE2); /* dma direction: read, no byteswap */ 2119 saawrite(((SAA7146_MC2_UPLD_DMA2) << 16) | SAA7146_MC2_UPLD_DMA2, 2120 SAA7146_MC2); 2121 I2CBusScan(&(saa->i2c)); 2122 return 0; 2123} 2124 2125static void release_saa(void) 2126{ 2127 u8 command; 2128 int i; 2129 struct saa7146 *saa; 2130 2131 for (i = 0; i < saa_num; i++) { 2132 saa = &saa7146s[i]; 2133 2134 /* turn off all capturing, DMA and IRQs */ 2135 saawrite(0xffff0000, SAA7146_MC1); /* reset chip */ 2136 saawrite(0, SAA7146_MC2); 2137 saawrite(0, SAA7146_IER); 2138 saawrite(0xffffffffUL, SAA7146_ISR); 2139 2140 /* disable PCI bus-mastering */ 2141 pci_read_config_byte(saa->dev, PCI_COMMAND, &command); 2142 command &= ~PCI_COMMAND_MASTER; 2143 pci_write_config_byte(saa->dev, PCI_COMMAND, command); 2144 2145 /* unmap and free memory */ 2146 saa->audhead = saa->audtail = saa->osdhead = 0; 2147 saa->vidhead = saa->vidtail = saa->osdtail = 0; 2148 if (saa->vidbuf) 2149 vfree(saa->vidbuf); 2150 if (saa->audbuf) 2151 vfree(saa->audbuf); 2152 if (saa->osdbuf) 2153 vfree(saa->osdbuf); 2154 if (saa->dmavid2) 2155 kfree((void *) saa->dmavid2); 2156 saa->audbuf = saa->vidbuf = saa->osdbuf = NULL; 2157 saa->dmavid2 = NULL; 2158 if (saa->dmadebi) 2159 kfree((void *) saa->dmadebi); 2160 if (saa->dmavid1) 2161 kfree((void *) saa->dmavid1); 2162 if (saa->dmavid2) 2163 kfree((void *) saa->dmavid2); 2164 if (saa->dmavid3) 2165 kfree((void *) saa->dmavid3); 2166 if (saa->dmaa1in) 2167 kfree((void *) saa->dmaa1in); 2168 if (saa->dmaa1out) 2169 kfree((void *) saa->dmaa1out); 2170 if (saa->dmaa2in) 2171 kfree((void *) saa->dmaa2in); 2172 if (saa->dmaa2out) 2173 kfree((void *) saa->dmaa2out); 2174 if (saa->dmaRPS1) 2175 kfree((void *) saa->dmaRPS1); 2176 if (saa->dmaRPS2) 2177 kfree((void *) saa->dmaRPS2); 2178 free_irq(saa->irq, saa); 2179 if (saa->saa7146_mem) 2180 iounmap(saa->saa7146_mem); 2181 if (saa->video_dev.minor != -1) 2182 video_unregister_device(&saa->video_dev); 2183 } 2184} 2185 2186 2187static int __init stradis_init (void) 2188{ 2189 struct pci_dev *dev = NULL; 2190 int result = 0, i; 2191 2192 saa_num = 0; 2193 2194 while ((dev = pci_find_device(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA7146, dev))) { 2195 if (!dev->subsystem_vendor) 2196 printk(KERN_INFO "stradis%d: rev1 decoder\n", saa_num); 2197 else 2198 printk(KERN_INFO "stradis%d: SDM2xx found\n", saa_num); 2199 result = configure_saa7146(dev, saa_num++); 2200 if (result) 2201 return result; 2202 } 2203 if (saa_num) 2204 printk(KERN_INFO "stradis: %d card(s) found.\n", saa_num); 2205 else 2206 return -EINVAL; 2207 for (i = 0; i < saa_num; i++) 2208 if (init_saa7146(i) < 0) { 2209 release_saa(); 2210 return -EIO; 2211 } 2212 return 0; 2213} 2214 2215 2216static void __exit stradis_exit (void) 2217{ 2218 release_saa(); 2219 printk(KERN_INFO "stradis: module cleanup complete\n"); 2220} 2221 2222 2223module_init(stradis_init); 2224module_exit(stradis_exit); 2225 2226