1/* 2 * HP i8042 SDC + MSM-58321 BBRTC driver. 3 * 4 * Copyright (c) 2001 Brian S. Julin 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification. 13 * 2. The name of the author may not be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * Alternatively, this software may be distributed under the terms of the 17 * GNU General Public License ("GPL"). 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * 29 * References: 30 * System Device Controller Microprocessor Firmware Theory of Operation 31 * for Part Number 1820-4784 Revision B. Dwg No. A-1820-4784-2 32 * efirtc.c by Stephane Eranian/Hewlett Packard 33 * 34 */ 35 36#include <linux/hp_sdc.h> 37#include <linux/errno.h> 38#include <linux/types.h> 39#include <linux/init.h> 40#include <linux/module.h> 41#include <linux/time.h> 42#include <linux/miscdevice.h> 43#include <linux/proc_fs.h> 44#include <linux/poll.h> 45#include <linux/rtc.h> 46 47MODULE_AUTHOR("Brian S. Julin <bri@calyx.com>"); 48MODULE_DESCRIPTION("HP i8042 SDC + MSM-58321 RTC Driver"); 49MODULE_LICENSE("Dual BSD/GPL"); 50 51#define RTC_VERSION "1.10d" 52 53static unsigned long epoch = 2000; 54 55static struct semaphore i8042tregs; 56 57static hp_sdc_irqhook hp_sdc_rtc_isr; 58 59static struct fasync_struct *hp_sdc_rtc_async_queue; 60 61static DECLARE_WAIT_QUEUE_HEAD(hp_sdc_rtc_wait); 62 63static loff_t hp_sdc_rtc_llseek(struct file *file, loff_t offset, int origin); 64 65static ssize_t hp_sdc_rtc_read(struct file *file, char *buf, 66 size_t count, loff_t *ppos); 67 68static int hp_sdc_rtc_ioctl(struct inode *inode, struct file *file, 69 unsigned int cmd, unsigned long arg); 70 71static unsigned int hp_sdc_rtc_poll(struct file *file, poll_table *wait); 72 73static int hp_sdc_rtc_open(struct inode *inode, struct file *file); 74static int hp_sdc_rtc_release(struct inode *inode, struct file *file); 75static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on); 76 77static int hp_sdc_rtc_read_proc(char *page, char **start, off_t off, 78 int count, int *eof, void *data); 79 80static void hp_sdc_rtc_isr (int irq, void *dev_id, 81 uint8_t status, uint8_t data) 82{ 83 return; 84} 85 86static int hp_sdc_rtc_do_read_bbrtc (struct rtc_time *rtctm) 87{ 88 struct semaphore tsem; 89 hp_sdc_transaction t; 90 uint8_t tseq[91]; 91 int i; 92 93 i = 0; 94 while (i < 91) { 95 tseq[i++] = HP_SDC_ACT_DATAREG | 96 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN; 97 tseq[i++] = 0x01; /* write i8042[0x70] */ 98 tseq[i] = i / 7; /* BBRTC reg address */ 99 i++; 100 tseq[i++] = HP_SDC_CMD_DO_RTCR; /* Trigger command */ 101 tseq[i++] = 2; /* expect 1 stat/dat pair back. */ 102 i++; i++; /* buffer for stat/dat pair */ 103 } 104 tseq[84] |= HP_SDC_ACT_SEMAPHORE; 105 t.endidx = 91; 106 t.seq = tseq; 107 t.act.semaphore = &tsem; 108 init_MUTEX_LOCKED(&tsem); 109 110 if (hp_sdc_enqueue_transaction(&t)) return -1; 111 112 down_interruptible(&tsem); /* Put ourselves to sleep for results. */ 113 114 /* Check for nonpresence of BBRTC */ 115 if (!((tseq[83] | tseq[90] | tseq[69] | tseq[76] | 116 tseq[55] | tseq[62] | tseq[34] | tseq[41] | 117 tseq[20] | tseq[27] | tseq[6] | tseq[13]) & 0x0f)) 118 return -1; 119 120 memset(rtctm, 0, sizeof(struct rtc_time)); 121 rtctm->tm_year = (tseq[83] & 0x0f) + (tseq[90] & 0x0f) * 10; 122 rtctm->tm_mon = (tseq[69] & 0x0f) + (tseq[76] & 0x0f) * 10; 123 rtctm->tm_mday = (tseq[55] & 0x0f) + (tseq[62] & 0x0f) * 10; 124 rtctm->tm_wday = (tseq[48] & 0x0f); 125 rtctm->tm_hour = (tseq[34] & 0x0f) + (tseq[41] & 0x0f) * 10; 126 rtctm->tm_min = (tseq[20] & 0x0f) + (tseq[27] & 0x0f) * 10; 127 rtctm->tm_sec = (tseq[6] & 0x0f) + (tseq[13] & 0x0f) * 10; 128 129 return 0; 130} 131 132static int hp_sdc_rtc_read_bbrtc (struct rtc_time *rtctm) 133{ 134 struct rtc_time tm, tm_last; 135 int i = 0; 136 137 /* MSM-58321 has no read latch, so must read twice and compare. */ 138 139 if (hp_sdc_rtc_do_read_bbrtc(&tm_last)) return -1; 140 if (hp_sdc_rtc_do_read_bbrtc(&tm)) return -1; 141 142 while (memcmp(&tm, &tm_last, sizeof(struct rtc_time))) { 143 if (i++ > 4) return -1; 144 memcpy(&tm_last, &tm, sizeof(struct rtc_time)); 145 if (hp_sdc_rtc_do_read_bbrtc(&tm)) return -1; 146 } 147 148 memcpy(rtctm, &tm, sizeof(struct rtc_time)); 149 150 return 0; 151} 152 153 154static int64_t hp_sdc_rtc_read_i8042timer (uint8_t loadcmd, int numreg) 155{ 156 hp_sdc_transaction t; 157 uint8_t tseq[26] = { 158 HP_SDC_ACT_PRECMD | HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 159 0, 160 HP_SDC_CMD_READ_T1, 2, 0, 0, 161 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 162 HP_SDC_CMD_READ_T2, 2, 0, 0, 163 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 164 HP_SDC_CMD_READ_T3, 2, 0, 0, 165 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 166 HP_SDC_CMD_READ_T4, 2, 0, 0, 167 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 168 HP_SDC_CMD_READ_T5, 2, 0, 0 169 }; 170 171 t.endidx = numreg * 5; 172 173 tseq[1] = loadcmd; 174 tseq[t.endidx - 4] |= HP_SDC_ACT_SEMAPHORE; /* numreg assumed > 1 */ 175 176 t.seq = tseq; 177 t.act.semaphore = &i8042tregs; 178 179 down_interruptible(&i8042tregs); /* Sleep if output regs in use. */ 180 181 if (hp_sdc_enqueue_transaction(&t)) return -1; 182 183 down_interruptible(&i8042tregs); /* Sleep until results come back. */ 184 up(&i8042tregs); 185 186 return (tseq[5] | 187 ((uint64_t)(tseq[10]) << 8) | ((uint64_t)(tseq[15]) << 16) | 188 ((uint64_t)(tseq[20]) << 24) | ((uint64_t)(tseq[25]) << 32)); 189} 190 191 192/* Read the i8042 real-time clock */ 193static inline int hp_sdc_rtc_read_rt(struct timeval *res) { 194 int64_t raw; 195 uint32_t tenms; 196 unsigned int days; 197 198 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_RT, 5); 199 if (raw < 0) return -1; 200 201 tenms = (uint32_t)raw & 0xffffff; 202 days = (unsigned int)(raw >> 24) & 0xffff; 203 204 res->tv_usec = (suseconds_t)(tenms % 100) * 10000; 205 res->tv_sec = (time_t)(tenms / 100) + days * 86400; 206 207 return 0; 208} 209 210 211/* Read the i8042 fast handshake timer */ 212static inline int hp_sdc_rtc_read_fhs(struct timeval *res) { 213 uint64_t raw; 214 unsigned int tenms; 215 216 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_FHS, 2); 217 if (raw < 0) return -1; 218 219 tenms = (unsigned int)raw & 0xffff; 220 221 res->tv_usec = (suseconds_t)(tenms % 100) * 10000; 222 res->tv_sec = (time_t)(tenms / 100); 223 224 return 0; 225} 226 227 228/* Read the i8042 match timer (a.k.a. alarm) */ 229static inline int hp_sdc_rtc_read_mt(struct timeval *res) { 230 int64_t raw; 231 uint32_t tenms; 232 233 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_MT, 3); 234 if (raw < 0) return -1; 235 236 tenms = (uint32_t)raw & 0xffffff; 237 238 res->tv_usec = (suseconds_t)(tenms % 100) * 10000; 239 res->tv_sec = (time_t)(tenms / 100); 240 241 return 0; 242} 243 244 245/* Read the i8042 delay timer */ 246static inline int hp_sdc_rtc_read_dt(struct timeval *res) { 247 int64_t raw; 248 uint32_t tenms; 249 250 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_DT, 3); 251 if (raw < 0) return -1; 252 253 tenms = (uint32_t)raw & 0xffffff; 254 255 res->tv_usec = (suseconds_t)(tenms % 100) * 10000; 256 res->tv_sec = (time_t)(tenms / 100); 257 258 return 0; 259} 260 261 262/* Read the i8042 cycle timer (a.k.a. periodic) */ 263static inline int hp_sdc_rtc_read_ct(struct timeval *res) { 264 int64_t raw; 265 uint32_t tenms; 266 267 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_CT, 3); 268 if (raw < 0) return -1; 269 270 tenms = (uint32_t)raw & 0xffffff; 271 272 res->tv_usec = (suseconds_t)(tenms % 100) * 10000; 273 res->tv_sec = (time_t)(tenms / 100); 274 275 return 0; 276} 277 278 279/* Set the i8042 real-time clock */ 280static int hp_sdc_rtc_set_rt (struct timeval *setto) 281{ 282 uint32_t tenms; 283 unsigned int days; 284 hp_sdc_transaction t; 285 uint8_t tseq[11] = { 286 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT, 287 HP_SDC_CMD_SET_RTMS, 3, 0, 0, 0, 288 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT, 289 HP_SDC_CMD_SET_RTD, 2, 0, 0 290 }; 291 292 t.endidx = 10; 293 294 if (0xffff < setto->tv_sec / 86400) return -1; 295 days = setto->tv_sec / 86400; 296 if (0xffff < setto->tv_usec / 1000000 / 86400) return -1; 297 days += ((setto->tv_sec % 86400) + setto->tv_usec / 1000000) / 86400; 298 if (days > 0xffff) return -1; 299 300 if (0xffffff < setto->tv_sec) return -1; 301 tenms = setto->tv_sec * 100; 302 if (0xffffff < setto->tv_usec / 10000) return -1; 303 tenms += setto->tv_usec / 10000; 304 if (tenms > 0xffffff) return -1; 305 306 tseq[3] = (uint8_t)(tenms & 0xff); 307 tseq[4] = (uint8_t)((tenms >> 8) & 0xff); 308 tseq[5] = (uint8_t)((tenms >> 16) & 0xff); 309 310 tseq[9] = (uint8_t)(days & 0xff); 311 tseq[10] = (uint8_t)((days >> 8) & 0xff); 312 313 t.seq = tseq; 314 315 if (hp_sdc_enqueue_transaction(&t)) return -1; 316 return 0; 317} 318 319/* Set the i8042 fast handshake timer */ 320static int hp_sdc_rtc_set_fhs (struct timeval *setto) 321{ 322 uint32_t tenms; 323 hp_sdc_transaction t; 324 uint8_t tseq[5] = { 325 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT, 326 HP_SDC_CMD_SET_FHS, 2, 0, 0 327 }; 328 329 t.endidx = 4; 330 331 if (0xffff < setto->tv_sec) return -1; 332 tenms = setto->tv_sec * 100; 333 if (0xffff < setto->tv_usec / 10000) return -1; 334 tenms += setto->tv_usec / 10000; 335 if (tenms > 0xffff) return -1; 336 337 tseq[3] = (uint8_t)(tenms & 0xff); 338 tseq[4] = (uint8_t)((tenms >> 8) & 0xff); 339 340 t.seq = tseq; 341 342 if (hp_sdc_enqueue_transaction(&t)) return -1; 343 return 0; 344} 345 346 347/* Set the i8042 match timer (a.k.a. alarm) */ 348#define hp_sdc_rtc_set_mt (setto) \ 349 hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_MT) 350 351/* Set the i8042 delay timer */ 352#define hp_sdc_rtc_set_dt (setto) \ 353 hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_DT) 354 355/* Set the i8042 cycle timer (a.k.a. periodic) */ 356#define hp_sdc_rtc_set_ct (setto) \ 357 hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_CT) 358 359/* Set one of the i8042 3-byte wide timers */ 360static int hp_sdc_rtc_set_i8042timer (struct timeval *setto, uint8_t setcmd) 361{ 362 uint32_t tenms; 363 hp_sdc_transaction t; 364 uint8_t tseq[6] = { 365 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT, 366 0, 3, 0, 0, 0 367 }; 368 369 t.endidx = 6; 370 371 if (0xffffff < setto->tv_sec) return -1; 372 tenms = setto->tv_sec * 100; 373 if (0xffffff < setto->tv_usec / 10000) return -1; 374 tenms += setto->tv_usec / 10000; 375 if (tenms > 0xffffff) return -1; 376 377 tseq[1] = setcmd; 378 tseq[3] = (uint8_t)(tenms & 0xff); 379 tseq[4] = (uint8_t)((tenms >> 8) & 0xff); 380 tseq[5] = (uint8_t)((tenms >> 16) & 0xff); 381 382 t.seq = tseq; 383 384 if (hp_sdc_enqueue_transaction(&t)) { 385 return -1; 386 } 387 return 0; 388} 389 390static loff_t hp_sdc_rtc_llseek(struct file *file, loff_t offset, int origin) 391{ 392 return -ESPIPE; 393} 394 395static ssize_t hp_sdc_rtc_read(struct file *file, char *buf, 396 size_t count, loff_t *ppos) { 397 ssize_t retval; 398 399 if (count < sizeof(unsigned long)) 400 return -EINVAL; 401 402 retval = put_user(68, (unsigned long *)buf); 403 return retval; 404} 405 406static unsigned int hp_sdc_rtc_poll(struct file *file, poll_table *wait) 407{ 408 unsigned long l; 409 410 l = 0; 411 if (l != 0) 412 return POLLIN | POLLRDNORM; 413 return 0; 414} 415 416static int hp_sdc_rtc_open(struct inode *inode, struct file *file) 417{ 418 MOD_INC_USE_COUNT; 419 return 0; 420} 421 422static int hp_sdc_rtc_release(struct inode *inode, struct file *file) 423{ 424 /* Turn off interrupts? */ 425 426 if (file->f_flags & FASYNC) { 427 hp_sdc_rtc_fasync (-1, file, 0); 428 } 429 430 MOD_DEC_USE_COUNT; 431 return 0; 432} 433 434static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on) 435{ 436 return fasync_helper (fd, filp, on, &hp_sdc_rtc_async_queue); 437} 438 439static int hp_sdc_rtc_proc_output (char *buf) 440{ 441#define YN(bit) ("no") 442#define NY(bit) ("yes") 443 char *p; 444 struct rtc_time tm; 445 struct timeval tv; 446 447 memset(&tm, 0, sizeof(struct rtc_time)); 448 449 p = buf; 450 451 if (hp_sdc_rtc_read_bbrtc(&tm)) { 452 p += sprintf(p, "BBRTC\t\t: READ FAILED!\n"); 453 } else { 454 p += sprintf(p, 455 "rtc_time\t: %02d:%02d:%02d\n" 456 "rtc_date\t: %04d-%02d-%02d\n" 457 "rtc_epoch\t: %04lu\n", 458 tm.tm_hour, tm.tm_min, tm.tm_sec, 459 tm.tm_year + 1900, tm.tm_mon + 1, 460 tm.tm_mday, epoch); 461 } 462 463 if (hp_sdc_rtc_read_rt(&tv)) { 464 p += sprintf(p, "i8042 rtc\t: READ FAILED!\n"); 465 } else { 466 p += sprintf(p, "i8042 rtc\t: %d.%02d seconds\n", 467 tv.tv_sec, tv.tv_usec/1000); 468 } 469 470 if (hp_sdc_rtc_read_fhs(&tv)) { 471 p += sprintf(p, "handshake\t: READ FAILED!\n"); 472 } else { 473 p += sprintf(p, "handshake\t: %d.%02d seconds\n", 474 tv.tv_sec, tv.tv_usec/1000); 475 } 476 477 if (hp_sdc_rtc_read_mt(&tv)) { 478 p += sprintf(p, "alarm\t\t: READ FAILED!\n"); 479 } else { 480 p += sprintf(p, "alarm\t\t: %d.%02d seconds\n", 481 tv.tv_sec, tv.tv_usec/1000); 482 } 483 484 if (hp_sdc_rtc_read_dt(&tv)) { 485 p += sprintf(p, "delay\t\t: READ FAILED!\n"); 486 } else { 487 p += sprintf(p, "delay\t\t: %d.%02d seconds\n", 488 tv.tv_sec, tv.tv_usec/1000); 489 } 490 491 if (hp_sdc_rtc_read_ct(&tv)) { 492 p += sprintf(p, "periodic\t: READ FAILED!\n"); 493 } else { 494 p += sprintf(p, "periodic\t: %d.%02d seconds\n", 495 tv.tv_sec, tv.tv_usec/1000); 496 } 497 498 p += sprintf(p, 499 "DST_enable\t: %s\n" 500 "BCD\t\t: %s\n" 501 "24hr\t\t: %s\n" 502 "square_wave\t: %s\n" 503 "alarm_IRQ\t: %s\n" 504 "update_IRQ\t: %s\n" 505 "periodic_IRQ\t: %s\n" 506 "periodic_freq\t: %ld\n" 507 "batt_status\t: %s\n", 508 YN(RTC_DST_EN), 509 NY(RTC_DM_BINARY), 510 YN(RTC_24H), 511 YN(RTC_SQWE), 512 YN(RTC_AIE), 513 YN(RTC_UIE), 514 YN(RTC_PIE), 515 1UL, 516 1 ? "okay" : "dead"); 517 518 return p - buf; 519#undef YN 520#undef NY 521} 522 523static int hp_sdc_rtc_read_proc(char *page, char **start, off_t off, 524 int count, int *eof, void *data) 525{ 526 int len = hp_sdc_rtc_proc_output (page); 527 if (len <= off+count) *eof = 1; 528 *start = page + off; 529 len -= off; 530 if (len>count) len = count; 531 if (len<0) len = 0; 532 return len; 533} 534 535static int hp_sdc_rtc_ioctl(struct inode *inode, struct file *file, 536 unsigned int cmd, unsigned long arg) 537{ 538 return -EINVAL; 539} 540 541static struct file_operations hp_sdc_rtc_fops = { 542 owner: THIS_MODULE, 543 llseek: hp_sdc_rtc_llseek, 544 read: hp_sdc_rtc_read, 545 poll: hp_sdc_rtc_poll, 546 ioctl: hp_sdc_rtc_ioctl, 547 open: hp_sdc_rtc_open, 548 release: hp_sdc_rtc_release, 549 fasync: hp_sdc_rtc_fasync, 550}; 551 552static struct miscdevice hp_sdc_rtc_dev = { 553 minor: RTC_MINOR, 554 name: "rtc", 555 fops: &hp_sdc_rtc_fops 556}; 557 558static int __init hp_sdc_rtc_init(void) 559{ 560 int ret; 561 562 init_MUTEX(&i8042tregs); 563 564 if ((ret = hp_sdc_request_timer_irq(&hp_sdc_rtc_isr))) 565 return ret; 566 misc_register(&hp_sdc_rtc_dev); 567 create_proc_read_entry ("driver/rtc", 0, 0, 568 hp_sdc_rtc_read_proc, NULL); 569 570 printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support loaded " 571 "(RTC v " RTC_VERSION ")\n"); 572 573 return 0; 574} 575 576static void __exit hp_sdc_rtc_exit(void) 577{ 578 remove_proc_entry ("driver/rtc", NULL); 579 misc_deregister(&hp_sdc_rtc_dev); 580 hp_sdc_release_timer_irq(hp_sdc_rtc_isr); 581 printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support unloaded\n"); 582} 583 584module_init(hp_sdc_rtc_init); 585module_exit(hp_sdc_rtc_exit); 586