1/*
2 * BRIEF MODULE DESCRIPTION
3 *	PB1000 specific pci support.
4 *
5 * Copyright 2001 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc.
7 *         	ppopov@mvista.com or source@mvista.com
8 *
9 *  This program is free software; you can redistribute  it and/or modify it
10 *  under  the terms of  the GNU General  Public License as published by the
11 *  Free Software Foundation;  either version 2 of the  License, or (at your
12 *  option) any later version.
13 *
14 *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
15 *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
16 *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
17 *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
18 *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
20 *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
22 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 *  You should have received a copy of the  GNU General Public License along
26 *  with this program; if not, write  to the Free Software Foundation, Inc.,
27 *  675 Mass Ave, Cambridge, MA 02139, USA.
28 */
29#include <linux/config.h>
30
31#ifdef CONFIG_PCI
32
33#include <linux/types.h>
34#include <linux/pci.h>
35#include <linux/kernel.h>
36#include <linux/init.h>
37
38#include <asm/au1000.h>
39#include <asm/pb1000.h>
40#include <asm/pci_channel.h>
41
42#define PCI_ACCESS_READ  0
43#define PCI_ACCESS_WRITE 1
44
45#undef DEBUG
46#ifdef 	DEBUG
47#define	DBG(x...)	printk(x)
48#else
49#define	DBG(x...)
50#endif
51
52static struct resource pci_io_resource = {
53	"pci IO space",
54	PCI_IO_START,
55	PCI_IO_END,
56	IORESOURCE_IO
57};
58
59static struct resource pci_mem_resource = {
60	"pci memory space",
61	PCI_MEM_START,
62	PCI_MEM_END,
63	IORESOURCE_MEM
64};
65
66extern struct pci_ops pb1000_pci_ops;
67
68struct pci_channel mips_pci_channels[] = {
69	{&pb1000_pci_ops, &pci_io_resource, &pci_mem_resource, 0, 1},
70	{(struct pci_ops *) NULL, (struct resource *) NULL,
71	 (struct resource *) NULL, (int) NULL, (int) NULL}
72};
73
74
75/*
76 * "Bus 2" is really the first and only external slot on the pb1000.
77 * We'll call that bus 0, and limit the accesses to that single
78 * external slot only. The SDRAM is already initialized in setup.c.
79 */
80static int config_access(unsigned char access_type, struct pci_dev *dev,
81			 unsigned char where, u32 * data)
82{
83	unsigned char bus = dev->bus->number;
84	unsigned char dev_fn = dev->devfn;
85	unsigned long config;
86
87	if (((dev_fn >> 3) != 0) || (bus != 0)) {
88		*data = 0xffffffff;
89		return -1;
90	}
91
92	config = PCI_CONFIG_BASE | (where & ~0x3);
93
94	if (access_type == PCI_ACCESS_WRITE) {
95		au_writel(*data, config);
96	} else {
97		*data = au_readl(config);
98	}
99	au_sync_udelay(1);
100
101	DBG("config_access: %d bus %d dev_fn %x at %x *data %x, conf %x\n",
102			access_type, bus, dev_fn, where, *data, config);
103
104	DBG("bridge config reg: %x (%x)\n", au_readl(PCI_BRIDGE_CONFIG), *data);
105
106	if (au_readl(PCI_BRIDGE_CONFIG) & (1 << 16)) {
107		*data = 0xffffffff;
108		return -1;
109	} else {
110		return PCIBIOS_SUCCESSFUL;
111	}
112}
113
114
115static int read_config_byte(struct pci_dev *dev, int where, u8 * val)
116{
117	u32 data;
118	int ret;
119
120	ret = config_access(PCI_ACCESS_READ, dev, where, &data);
121	*val = data & 0xff;
122	return ret;
123}
124
125
126static int read_config_word(struct pci_dev *dev, int where, u16 * val)
127{
128	u32 data;
129	int ret;
130
131	ret = config_access(PCI_ACCESS_READ, dev, where, &data);
132	*val = data & 0xffff;
133	return ret;
134}
135
136static int read_config_dword(struct pci_dev *dev, int where, u32 * val)
137{
138	int ret;
139
140	ret = config_access(PCI_ACCESS_READ, dev, where, val);
141	return ret;
142}
143
144
145static int write_config_byte(struct pci_dev *dev, int where, u8 val)
146{
147	u32 data = 0;
148
149	if (config_access(PCI_ACCESS_READ, dev, where, &data))
150		return -1;
151
152	data = (data & ~(0xff << ((where & 3) << 3))) |
153	       (val << ((where & 3) << 3));
154
155	if (config_access(PCI_ACCESS_WRITE, dev, where, &data))
156		return -1;
157
158	return PCIBIOS_SUCCESSFUL;
159}
160
161static int write_config_word(struct pci_dev *dev, int where, u16 val)
162{
163        u32 data = 0;
164
165	if (where & 1)
166		return PCIBIOS_BAD_REGISTER_NUMBER;
167
168        if (config_access(PCI_ACCESS_READ, dev, where, &data))
169	       return -1;
170
171	data = (data & ~(0xffff << ((where & 3) << 3))) |
172	       (val << ((where & 3) << 3));
173
174	if (config_access(PCI_ACCESS_WRITE, dev, where, &data))
175	       return -1;
176
177
178	return PCIBIOS_SUCCESSFUL;
179}
180
181static int write_config_dword(struct pci_dev *dev, int where, u32 val)
182{
183	if (where & 3)
184		return PCIBIOS_BAD_REGISTER_NUMBER;
185
186	if (config_access(PCI_ACCESS_WRITE, dev, where, &val))
187	       return -1;
188
189	return PCIBIOS_SUCCESSFUL;
190}
191
192struct pci_ops pb1000_pci_ops = {
193	read_config_byte,
194        read_config_word,
195	read_config_dword,
196	write_config_byte,
197	write_config_word,
198	write_config_dword
199};
200#endif /* CONFIG_PCI */
201