1/* $Id: sgi_io_init.c,v 1.1.1.1 2008/10/15 03:26:03 james26_jang Exp $ 2 * 3 * This file is subject to the terms and conditions of the GNU General Public 4 * License. See the file "COPYING" in the main directory of this archive 5 * for more details. 6 * 7 * Copyright (C) 1992 - 1997, 2000-2002 Silicon Graphics, Inc. All rights reserved. 8 */ 9 10#include <linux/types.h> 11#include <linux/config.h> 12#include <linux/slab.h> 13#include <asm/sn/sgi.h> 14#include <asm/sn/io.h> 15#include <asm/sn/sn_cpuid.h> 16#include <asm/sn/klconfig.h> 17#include <asm/sn/sn_private.h> 18#include <asm/sn/pci/pciba.h> 19#include <linux/smp.h> 20 21extern void mlreset(int ); 22extern int init_hcl(void); 23extern void klgraph_hack_init(void); 24extern void hubspc_init(void); 25extern void pciio_init(void); 26extern void pcibr_init(void); 27extern void xtalk_init(void); 28extern void xbow_init(void); 29extern void xbmon_init(void); 30extern void pciiox_init(void); 31extern void usrpci_init(void); 32extern void ioc3_init(void); 33extern void initialize_io(void); 34#if defined(CONFIG_IA64_SGI_SN1) 35extern void intr_clear_all(nasid_t); 36#endif 37extern void klhwg_add_all_modules(devfs_handle_t); 38extern void klhwg_add_all_nodes(devfs_handle_t); 39 40void sn_mp_setup(void); 41extern devfs_handle_t hwgraph_root; 42extern void io_module_init(void); 43extern void pci_bus_cvlink_init(void); 44extern void temp_hack(void); 45 46extern int pci_bus_to_hcl_cvlink(void); 47 48/* #define DEBUG_IO_INIT 1 */ 49#ifdef DEBUG_IO_INIT 50#define DBG(x...) printk(x) 51#else 52#define DBG(x...) 53#endif /* DEBUG_IO_INIT */ 54 55/* 56 * per_hub_init 57 * 58 * This code is executed once for each Hub chip. 59 */ 60static void 61per_hub_init(cnodeid_t cnode) 62{ 63 nasid_t nasid; 64 nodepda_t *npdap; 65 ii_icmr_u_t ii_icmr; 66 ii_ibcr_u_t ii_ibcr; 67 68 nasid = COMPACT_TO_NASID_NODEID(cnode); 69 70 ASSERT(nasid != INVALID_NASID); 71 ASSERT(NASID_TO_COMPACT_NODEID(nasid) == cnode); 72 73 npdap = NODEPDA(cnode); 74 75#if defined(CONFIG_IA64_SGI_SN1) 76 /* initialize per-node synergy perf instrumentation */ 77 npdap->synergy_perf_enabled = 0; /* off by default */ 78 npdap->synergy_perf_lock = SPIN_LOCK_UNLOCKED; 79 npdap->synergy_perf_freq = SYNERGY_PERF_FREQ_DEFAULT; 80 npdap->synergy_inactive_intervals = 0; 81 npdap->synergy_active_intervals = 0; 82 npdap->synergy_perf_data = NULL; 83 npdap->synergy_perf_first = NULL; 84#endif /* CONFIG_IA64_SGI_SN1 */ 85 86 87 /* 88 * Set the total number of CRBs that can be used. 89 */ 90 ii_icmr.ii_icmr_regval= 0x0; 91 ii_icmr.ii_icmr_fld_s.i_c_cnt = 0xF; 92 REMOTE_HUB_S(nasid, IIO_ICMR, ii_icmr.ii_icmr_regval); 93 94 /* 95 * Set the number of CRBs that both of the BTEs combined 96 * can use minus 1. 97 */ 98 ii_ibcr.ii_ibcr_regval= 0x0; 99 ii_ibcr.ii_ibcr_fld_s.i_count = 0x8; 100 REMOTE_HUB_S(nasid, IIO_IBCR, ii_ibcr.ii_ibcr_regval); 101 102 /* 103 * Set CRB timeout to be 10ms. 104 */ 105 REMOTE_HUB_S(nasid, IIO_ICTP, 0x1000 ); 106 REMOTE_HUB_S(nasid, IIO_ICTO, 0xff); 107 108 109#if defined(CONFIG_IA64_SGI_SN1) 110 /* Reserve all of the hardwired interrupt levels. */ 111 intr_reserve_hardwired(cnode); 112#endif 113 114 /* Initialize error interrupts for this hub. */ 115 hub_error_init(cnode); 116} 117 118/* 119 * This routine is responsible for the setup of all the IRIX hwgraph style 120 * stuff that's been pulled into linux. It's called by sn_pci_find_bios which 121 * is called just before the generic Linux PCI layer does its probing (by 122 * platform_pci_fixup aka sn_pci_fixup). 123 * 124 * It is very IMPORTANT that this call is only made by the Master CPU! 125 * 126 */ 127 128void 129sgi_master_io_infr_init(void) 130{ 131 int cnode; 132 133 /* 134 * Do any early init stuff .. einit_tbl[] etc. 135 */ 136 DBG("--> sgi_master_io_infr_init: calling init_hcl().\n"); 137 init_hcl(); /* Sets up the hwgraph compatibility layer with devfs */ 138 139#ifdef Colin 140 141printk("Testing out Xbridge Access .. if it hangs Xbridge is not init yet.\n"); 142printk(" Reading Xbridge WID at address 0xc00000080f000000 0x%p\n", (* (volatile uint32_t *)(0xc00000080f000000))); 143 144printk("Testing out PCI Address Space Accesses\n"); 145printk(" Testing PCI Config Read Byte: address 0xc00000080f020000 value 0x%x\n",(* (volatile uint8_t *)(0xc00000080f020000))); 146 147printk(" Testing PCI Config Read Byte: address 0xc00000080f020001 value 0x%x\n",(* (volatile uint8_t *)(0xc00000080f020001))); 148 149printk(" Testing PCI Config Read Byte: address 0xc00000080f020002 value 0x%x\n",(* (volatile uint8_t *)(0xc00000080f020002))); 150 151printk(" Testing PCI Config Read Byte: address 0xc00000080f020003 value 0x%x\n",(* (volatile uint8_t *)(0xc00000080f020003))); 152 153printk(" Testing PCI Config Read Byte: address 0xc00000080f020004 value 0x%x\n",(* (volatile uint8_t *)(0xc00000080f020004))); 154 155printk(" Testing PCI Config Read Byte: address 0xc00000080f020005 value 0x%x\n",(* (volatile uint8_t *)(0xc00000080f020005))); 156 157printk(" Testing PCI Config Read Byte: address 0xc00000080f020006 value 0x%x\n",(* (volatile uint8_t *)(0xc00000080f020006))); 158 159printk(" Testing PCI Config Read Byte: address 0xc00000080f020007 value 0x%x\n",(* (volatile uint8_t *)(0xc00000080f020007))); 160 161printk(" Testing PCI Config Word: address 0xc00000080f020004 value 0x%x\n",(* (volatile uint32_t *)(0xc00000080f020004))); 162 163printk(" Testing PCI Config Word: address 0xc00000080f020008 value 0x%x\n",(* (volatile uint32_t *)(0xc00000080f020008))); 164 165#endif 166 167 /* 168 * initialize the Linux PCI to xwidget vertexes .. 169 */ 170 DBG("--> sgi_master_io_infr_init: calling pci_bus_cvlink_init().\n"); 171 pci_bus_cvlink_init(); 172 173#ifdef BRINGUP 174#ifdef CONFIG_IA64_SGI_SN1 175 /* 176 * Hack to provide statically initialzed klgraph entries. 177 */ 178 DBG("--> sgi_master_io_infr_init: calling klgraph_hack_init()\n"); 179 klgraph_hack_init(); 180#endif /* CONFIG_IA64_SGI_SN1 */ 181#endif /* BRINGUP */ 182 183 /* 184 * This is the Master CPU. Emulate mlsetup and main.c in Irix. 185 */ 186 DBG("--> sgi_master_io_infr_init: calling mlreset(0).\n"); 187 mlreset(0); /* Master .. */ 188 189 /* 190 * allowboot() is called by kern/os/main.c in main() 191 * Emulate allowboot() ... 192 * per_cpu_init() - only need per_hub_init() 193 * cpu_io_setup() - Nothing to do. 194 * 195 */ 196 DBG("--> sgi_master_io_infr_init: calling sn_mp_setup().\n"); 197 sn_mp_setup(); 198 199 DBG("--> sgi_master_io_infr_init: calling per_hub_init(0).\n"); 200 for (cnode = 0; cnode < numnodes; cnode++) { 201 per_hub_init(cnode); 202 } 203 204 /* We can do headless hub cnodes here .. */ 205 206 /* 207 * io_init[] stuff. 208 * 209 * Get SGI IO Infrastructure drivers to init and register with 210 * each other etc. 211 */ 212 213 DBG("--> sgi_master_io_infr_init: calling hubspc_init()\n"); 214 hubspc_init(); 215 216 DBG("--> sgi_master_io_infr_init: calling pciio_init()\n"); 217 pciio_init(); 218 219 DBG("--> sgi_master_io_infr_init: calling pcibr_init()\n"); 220 pcibr_init(); 221 222 DBG("--> sgi_master_io_infr_init: calling xtalk_init()\n"); 223 xtalk_init(); 224 225 DBG("--> sgi_master_io_infr_init: calling xbow_init()\n"); 226 xbow_init(); 227 228 DBG("--> sgi_master_io_infr_init: calling xbmon_init()\n"); 229 xbmon_init(); 230 231 DBG("--> sgi_master_io_infr_init: calling pciiox_init()\n"); 232 pciiox_init(); 233 234 DBG("--> sgi_master_io_infr_init: calling usrpci_init()\n"); 235 usrpci_init(); 236 237 DBG("--> sgi_master_io_infr_init: calling ioc3_init()\n"); 238 ioc3_init(); 239 240 /* 241 * 242 * Our IO Infrastructure drivers are in place .. 243 * Initialize the whole IO Infrastructure .. xwidget/device probes. 244 * 245 */ 246 DBG("--> sgi_master_io_infr_init: Start Probe and IO Initialization\n"); 247 initialize_io(); 248 249 DBG("--> sgi_master_io_infr_init: Setting up SGI IO Links for Linux PCI\n"); 250 pci_bus_to_hcl_cvlink(); 251 252#ifdef CONFIG_PCIBA 253 DBG("--> sgi_master_io_infr_init: calling pciba_init()\n"); 254 pciba_init(); 255#endif 256 257 DBG("--> Leave sgi_master_io_infr_init: DONE setting up SGI Links for PCI\n"); 258} 259 260/* 261 * sgi_slave_io_infr_init - This routine must be called on all cpus except 262 * the Master CPU. 263 */ 264void 265sgi_slave_io_infr_init(void) 266{ 267 /* Emulate cboot() .. */ 268 mlreset(1); /* This is a slave cpu */ 269 270 // per_hub_init(0); /* Need to get and send in actual cnode number */ 271 272 /* Done */ 273} 274 275/* 276 * One-time setup for MP SN. 277 * Allocate per-node data, slurp prom klconfig information and 278 * convert it to hwgraph information. 279 */ 280void 281sn_mp_setup(void) 282{ 283 cnodeid_t cnode; 284 cpuid_t cpu; 285 286 for (cpu = 0; cpu < smp_num_cpus; cpu++) { 287 /* Skip holes in CPU space */ 288 if (cpu_enabled(cpu)) { 289 init_platform_pda(cpu); 290 } 291 } 292 293 /* 294 * Initialize platform-dependent vertices in the hwgraph: 295 * module 296 * node 297 * cpu 298 * memory 299 * slot 300 * hub 301 * router 302 * xbow 303 */ 304 305 DBG("sn_mp_io_setup: calling io_module_init()\n"); 306 io_module_init(); /* Use to be called module_init() .. */ 307 308 DBG("sn_mp_setup: calling klhwg_add_all_modules()\n"); 309 klhwg_add_all_modules(hwgraph_root); 310 DBG("sn_mp_setup: calling klhwg_add_all_nodes()\n"); 311 klhwg_add_all_nodes(hwgraph_root); 312 313 314 for (cnode = 0; cnode < numnodes; cnode++) { 315 316 /* 317 * This routine clears the Hub's Interrupt registers. 318 */ 319 /* 320 * We need to move this intr_clear_all() routine 321 * from SN/intr.c to a more appropriate file. 322 * Talk to Al Mayer. 323 */ 324#if defined(CONFIG_IA64_SGI_SN1) 325 intr_clear_all(COMPACT_TO_NASID_NODEID(cnode)); 326#endif 327 /* now init the hub */ 328 // per_hub_init(cnode); 329 330 } 331 332#if defined(CONFIG_IA64_SGI_SN1) 333 synergy_perf_init(); 334#endif 335 336} 337