1Memory management for CRIS/MMU 2------------------------------ 3HISTORY: 4 5$Log: README.mm,v $ 6Revision 1.1.1.1 2008/10/15 03:26:00 james26_jang 7Initial. 8 9Revision 1.1.1.1 2008/07/21 09:14:22 james26_jang 10New UI, New QoS, New wireless driver(4.151.10.29), ipmonitor. 11 12Revision 1.1.1.1 2008/07/02 14:38:28 james26_jang 134.100.10.29, New QoS and New UI. 14 15Revision 1.1.1.1 2007/02/15 12:10:52 jiahao 16initial update 17 18Revision 1.1.1.1 2007/01/25 12:51:48 jiahao_jhou 19 20 21Revision 1.1.1.1 2003/02/03 22:37:19 mhuang 22LINUX_2_4 branch snapshot from linux-mips.org CVS 23 24Revision 1.1 2000/07/10 16:25:21 bjornw 25Initial revision 26 27Revision 1.4 2000/01/17 02:31:59 bjornw 28Added discussion of paging and VM. 29 30Revision 1.3 1999/12/03 16:43:23 hp 31Blurb about that the 3.5G-limitation is not a MMU limitation 32 33Revision 1.2 1999/12/03 16:04:21 hp 34Picky comment about not mapping the first page 35 36Revision 1.1 1999/12/03 15:41:30 bjornw 37First version of CRIS/MMU memory layout specification. 38 39 40 41 42 43------------------------------ 44 45See the ETRAX-NG HSDD for reference. 46 47We use the page-size of 8 kbytes, as opposed to the i386 page-size of 4 kbytes. 48 49The MMU can, apart from the normal mapping of pages, also do a top-level 50segmentation of the kernel memory space. We use this feature to avoid having 51to use page-tables to map the physical memory into the kernel's address 52space. We also use it to keep the user-mode virtual mapping in the same 53map during kernel-mode, so that the kernel easily can access the corresponding 54user-mode process' data. 55 56As a comparision, the Linux/i386 2.0 puts the kernel and physical RAM at 57address 0, overlapping with the user-mode virtual space, so that descriptor 58registers are needed for each memory access to specify which MMU space to 59map through. That changed in 2.2, putting the kernel/physical RAM at 600xc0000000, to co-exist with the user-mode mapping. We will do something 61quite similar, but with the additional complexity of having to map the 62internal chip I/O registers and the flash memory area (including SRAM 63and peripherial chip-selets). 64 65The kernel-mode segmentation map: 66 67 ------------------------ ------------------------ 68FFFFFFFF| | => cached | | 69 | kernel seg_f | flash | | 70F0000000|______________________| | | 71EFFFFFFF| | => uncached | | 72 | kernel seg_e | flash | | 73E0000000|______________________| | DRAM | 74DFFFFFFF| | paged to any | Un-cached | 75 | kernel seg_d | =======> | | 76D0000000|______________________| | | 77CFFFFFFF| | | | 78 | kernel seg_c |==\ | | 79C0000000|______________________| \ |______________________| 80BFFFFFFF| | uncached | | 81 | kernel seg_b |=====\=========>| Registers | 82B0000000|______________________| \c |______________________| 83AFFFFFFF| | \a | | 84 | | \c | FLASH/SRAM/Peripheral| 85 | | \h |______________________| 86 | | \e | | 87 | | \d | | 88 | kernel seg_0 - seg_a | \==>| DRAM | 89 | | | Cached | 90 | | paged to any | | 91 | | =======> |______________________| 92 | | | | 93 | | | Illegal | 94 | | |______________________| 95 | | | | 96 | | | FLASH/SRAM/Peripheral| 9700000000|______________________| |______________________| 98 99In user-mode it looks the same except that only the space 0-AFFFFFFF is 100available. Therefore, in this model, the virtual address space per process 101is limited to 0xb0000000 bytes (minus 8192 bytes, since the first page, 1020..8191, is never mapped, in order to trap NULL references). 103 104It also means that the total physical RAM that can be mapped is 256 MB 105(kseg_c above). More RAM can be mapped by choosing a different segmentation 106and shrinking the user-mode memory space. 107 108The MMU can map all 4 GB in user mode, but doing that would mean that a 109few extra instructions would be needed for each access to user mode 110memory. 111 112The kernel needs access to both cached and uncached flash. Uncached is 113necessary because of the special write/erase sequences. Also, the 114peripherial chip-selects are decoded from that region. 115 116The kernel also needs its own virtual memory space. That is kseg_d. It 117is used by the vmalloc() kernel function to allocate virtual contiguous 118chunks of memory not possible using the normal kmalloc physical RAM 119allocator. 120 121The setting of the actual MMU control registers to use this layout would 122be something like this: 123 124R_MMU_KSEG = ( ( seg_f, seg ) | // Flash cached 125 ( seg_e, seg ) | // Flash uncached 126 ( seg_d, page ) | // kernel vmalloc area 127 ( seg_c, seg ) | // kernel linear segment 128 ( seg_b, seg ) | // kernel linear segment 129 ( seg_a, page ) | 130 ( seg_9, page ) | 131 ( seg_8, page ) | 132 ( seg_7, page ) | 133 ( seg_6, page ) | 134 ( seg_5, page ) | 135 ( seg_4, page ) | 136 ( seg_3, page ) | 137 ( seg_2, page ) | 138 ( seg_1, page ) | 139 ( seg_0, page ) ); 140 141R_MMU_KBASE_HI = ( ( base_f, 0x0 ) | // flash/sram/periph cached 142 ( base_e, 0x8 ) | // flash/sram/periph uncached 143 ( base_d, 0x0 ) | // don't care 144 ( base_c, 0x4 ) | // physical RAM cached area 145 ( base_b, 0xb ) | // uncached on-chip registers 146 ( base_a, 0x0 ) | // don't care 147 ( base_9, 0x0 ) | // don't care 148 ( base_8, 0x0 ) ); // don't care 149 150R_MMU_KBASE_LO = ( ( base_7, 0x0 ) | // don't care 151 ( base_6, 0x0 ) | // don't care 152 ( base_5, 0x0 ) | // don't care 153 ( base_4, 0x0 ) | // don't care 154 ( base_3, 0x0 ) | // don't care 155 ( base_2, 0x0 ) | // don't care 156 ( base_1, 0x0 ) | // don't care 157 ( base_0, 0x0 ) ); // don't care 158 159NOTE: while setting up the MMU, we run in a non-mapped mode in the DRAM (0x40 160segment) and need to setup the seg_4 to a unity mapping, so that we don't get 161a fault before we have had time to jump into the real kernel segment (0xc0). This 162is done in head.S temporarily, but fixed by the kernel later in paging_init. 163 164 165Paging - PTE's, PMD's and PGD's 166------------------------------- 167 168[ References: asm/pgtable.h, asm/page.h, asm/mmu.h ] 169 170The paging mechanism uses virtual addresses to split a process memory-space into 171pages, a page being the smallest unit that can be freely remapped in memory. On 172Linux/CRIS, a page is 8192 bytes (for technical reasons not equal to 4096 as in 173most other 32-bit architectures). It would be inefficient to let a virtual memory 174mapping be controlled by a long table of page mappings, so it is broken down into 175a 2-level structure with a Page Directory containing pointers to Page Tables which 176each have maps of up to 2048 pages (8192 / sizeof(void *)). Linux can actually 177handle 3-level structures as well, with a Page Middle Directory in between, but 178in many cases, this is folded into a two-level structure by excluding the Middle 179Directory. 180 181We'll take a look at how an address is translated while we discuss how it's handled 182in the Linux kernel. 183 184The example address is 0xd004000c; in binary this is: 185 18631 23 15 7 0 18711010000 00000100 00000000 00001100 188 189|______| |__________||____________| 190 PGD PTE page offset 191 192Given the top-level Page Directory, the offset in that directory is calculated 193using the upper 8 bits: 194 195extern inline pgd_t * pgd_offset(struct mm_struct * mm, unsigned long address) 196{ 197 return mm->pgd + (address >> PGDIR_SHIFT); 198} 199 200PGDIR_SHIFT is the log2 of the amount of memory an entry in the PGD can map; in our 201case it is 24, corresponding to 16 MB. This means that each entry in the PGD 202corresponds to 16 MB of virtual memory. 203 204The pgd_t from our example will therefore be the 208'th (0xd0) entry in mm->pgd. 205 206Since the Middle Directory does not exist, it is a unity mapping: 207 208extern inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address) 209{ 210 return (pmd_t *) dir; 211} 212 213The Page Table provides the final lookup by using bits 13 to 23 as index: 214 215extern inline pte_t * pte_offset(pmd_t * dir, unsigned long address) 216{ 217 return (pte_t *) pmd_page(*dir) + ((address >> PAGE_SHIFT) & 218 (PTRS_PER_PTE - 1)); 219} 220 221PAGE_SHIFT is the log2 of the size of a page; 13 in our case. PTRS_PER_PTE is 222the number of pointers that fit in a Page Table and is used to mask off the 223PGD-part of the address. 224 225The so-far unused bits 0 to 12 are used to index inside a page linearily. 226 227The VM system 228------------- 229 230The kernels own page-directory is the swapper_pg_dir, cleared in paging_init, 231and contains the kernels virtual mappings (the kernel itself is not paged - it 232is mapped linearily using kseg_c as described above). Architectures without 233kernel segments like the i386, need to setup swapper_pg_dir directly in head.S 234to map the kernel itself. swapper_pg_dir is pointed to by init_mm.pgd as the 235init-task's PGD. 236 237To see what support functions are used to setup a page-table, let's look at the 238kernel's internal paged memory system, vmalloc/vfree. 239 240void * vmalloc(unsigned long size) 241 242The vmalloc-system keeps a paged segment in kernel-space at 0xd0000000. What 243happens first is that a virtual address chunk is allocated to the request using 244get_vm_area(size). After that, physical RAM pages are allocated and put into 245the kernel's page-table using alloc_area_pages(addr, size). 246 247static int alloc_area_pages(unsigned long address, unsigned long size) 248 249First the PGD entry is found using init_mm.pgd. This is passed to 250alloc_area_pmd (remember the 3->2 folding). It uses pte_alloc_kernel to 251check if the PGD entry points anywhere - if not, a page table page is 252allocated and the PGD entry updated. Then the alloc_area_pte function is 253used just like alloc_area_pmd to check which page table entry is desired, 254and a physical page is allocated and the table entry updated. All of this 255is repeated at the top-level until the entire address range specified has 256been mapped. 257 258 259 260