1/* 2 * linux/arch/arm/mach-footbridge/netwinder-hw.c 3 * 4 * Netwinder machine fixup 5 * 6 * Copyright (C) 1998, 1999 Russell King, Phil Blundell 7 */ 8#include <linux/config.h> 9#include <linux/module.h> 10#include <linux/sched.h> 11#include <linux/ioport.h> 12#include <linux/kernel.h> 13#include <linux/delay.h> 14#include <linux/init.h> 15 16#include <asm/io.h> 17#include <asm/leds.h> 18#include <asm/mach-types.h> 19 20#define IRDA_IO_BASE 0x180 21#define GP1_IO_BASE 0x338 22#define GP2_IO_BASE 0x33a 23 24 25#ifdef CONFIG_LEDS 26#define DEFAULT_LEDS 0 27#else 28#define DEFAULT_LEDS GPIO_GREEN_LED 29#endif 30 31/* 32 * Winbond WB83977F accessibility stuff 33 */ 34static inline void wb977_open(void) 35{ 36 outb(0x87, 0x370); 37 outb(0x87, 0x370); 38} 39 40static inline void wb977_close(void) 41{ 42 outb(0xaa, 0x370); 43} 44 45static inline void wb977_wb(int reg, int val) 46{ 47 outb(reg, 0x370); 48 outb(val, 0x371); 49} 50 51static inline void wb977_ww(int reg, int val) 52{ 53 outb(reg, 0x370); 54 outb(val >> 8, 0x371); 55 outb(reg + 1, 0x370); 56 outb(val, 0x371); 57} 58 59#define wb977_device_select(dev) wb977_wb(0x07, dev) 60#define wb977_device_disable() wb977_wb(0x30, 0x00) 61#define wb977_device_enable() wb977_wb(0x30, 0x01) 62 63/* 64 * This is a lock for accessing ports GP1_IO_BASE and GP2_IO_BASE 65 */ 66spinlock_t gpio_lock = SPIN_LOCK_UNLOCKED; 67 68static unsigned int current_gpio_op; 69static unsigned int current_gpio_io; 70static unsigned int current_cpld; 71 72void gpio_modify_op(int mask, int set) 73{ 74 unsigned int new_gpio, changed; 75 76 new_gpio = (current_gpio_op & ~mask) | set; 77 changed = new_gpio ^ current_gpio_op; 78 current_gpio_op = new_gpio; 79 80 if (changed & 0xff) 81 outb(new_gpio, GP1_IO_BASE); 82 if (changed & 0xff00) 83 outb(new_gpio >> 8, GP2_IO_BASE); 84} 85 86static inline void __gpio_modify_io(int mask, int in) 87{ 88 unsigned int new_gpio, changed; 89 int port; 90 91 new_gpio = (current_gpio_io & ~mask) | in; 92 changed = new_gpio ^ current_gpio_io; 93 current_gpio_io = new_gpio; 94 95 changed >>= 1; 96 new_gpio >>= 1; 97 98 wb977_device_select(7); 99 100 for (port = 0xe1; changed && port < 0xe8; changed >>= 1) { 101 wb977_wb(port, new_gpio & 1); 102 103 port += 1; 104 new_gpio >>= 1; 105 } 106 107 wb977_device_select(8); 108 109 for (port = 0xe8; changed && port < 0xec; changed >>= 1) { 110 wb977_wb(port, new_gpio & 1); 111 112 port += 1; 113 new_gpio >>= 1; 114 } 115} 116 117void gpio_modify_io(int mask, int in) 118{ 119 /* Open up the SuperIO chip */ 120 wb977_open(); 121 122 __gpio_modify_io(mask, in); 123 124 /* Close up the EFER gate */ 125 wb977_close(); 126} 127 128int gpio_read(void) 129{ 130 return inb(GP1_IO_BASE) | inb(GP2_IO_BASE) << 8; 131} 132 133/* 134 * Initialise the Winbond W83977F global registers 135 */ 136static inline void wb977_init_global(void) 137{ 138 /* 139 * Enable R/W config registers 140 */ 141 wb977_wb(0x26, 0x40); 142 143 /* 144 * Power down FDC (not used) 145 */ 146 wb977_wb(0x22, 0xfe); 147 148 /* 149 * GP12, GP11, CIRRX, IRRXH, GP10 150 */ 151 wb977_wb(0x2a, 0xc1); 152 153 /* 154 * GP23, GP22, GP21, GP20, GP13 155 */ 156 wb977_wb(0x2b, 0x6b); 157 158 /* 159 * GP17, GP16, GP15, GP14 160 */ 161 wb977_wb(0x2c, 0x55); 162} 163 164/* 165 * Initialise the Winbond W83977F printer port 166 */ 167static inline void wb977_init_printer(void) 168{ 169 wb977_device_select(1); 170 171 /* 172 * mode 1 == EPP 173 */ 174 wb977_wb(0xf0, 0x01); 175} 176 177/* 178 * Initialise the Winbond W83977F keyboard controller 179 */ 180static inline void wb977_init_keyboard(void) 181{ 182 wb977_device_select(5); 183 184 /* 185 * Keyboard controller address 186 */ 187 wb977_ww(0x60, 0x0060); 188 wb977_ww(0x62, 0x0064); 189 190 /* 191 * Keyboard IRQ 1, active high, edge trigger 192 */ 193 wb977_wb(0x70, 1); 194 wb977_wb(0x71, 0x02); 195 196 /* 197 * Mouse IRQ 5, active high, edge trigger 198 */ 199 wb977_wb(0x72, 5); 200 wb977_wb(0x73, 0x02); 201 202 /* 203 * KBC 8MHz 204 */ 205 wb977_wb(0xf0, 0x40); 206 207 /* 208 * Enable device 209 */ 210 wb977_device_enable(); 211} 212 213/* 214 * Initialise the Winbond W83977F Infra-Red device 215 */ 216static inline void wb977_init_irda(void) 217{ 218 wb977_device_select(6); 219 220 /* 221 * IR base address 222 */ 223 wb977_ww(0x60, IRDA_IO_BASE); 224 225 /* 226 * IRDA IRQ 6, active high, edge trigger 227 */ 228 wb977_wb(0x70, 6); 229 wb977_wb(0x71, 0x02); 230 231 /* 232 * RX DMA - ISA DMA 0 233 */ 234 wb977_wb(0x74, 0x00); 235 236 /* 237 * TX DMA - Disable Tx DMA 238 */ 239 wb977_wb(0x75, 0x04); 240 241 /* 242 * Append CRC, Enable bank selection 243 */ 244 wb977_wb(0xf0, 0x03); 245 246 /* 247 * Enable device 248 */ 249 wb977_device_enable(); 250} 251 252/* 253 * Initialise Winbond W83977F general purpose IO 254 */ 255static inline void wb977_init_gpio(void) 256{ 257 unsigned long flags; 258 259 /* 260 * Set up initial I/O definitions 261 */ 262 current_gpio_io = -1; 263 __gpio_modify_io(-1, GPIO_DONE | GPIO_WDTIMER); 264 265 wb977_device_select(7); 266 267 /* 268 * Group1 base address 269 */ 270 wb977_ww(0x60, GP1_IO_BASE); 271 wb977_ww(0x62, 0); 272 wb977_ww(0x64, 0); 273 274 /* 275 * GP10 (Orage button) IRQ 10, active high, edge trigger 276 */ 277 wb977_wb(0x70, 10); 278 wb977_wb(0x71, 0x02); 279 280 /* 281 * GP10: Debounce filter enabled, IRQ, input 282 */ 283 wb977_wb(0xe0, 0x19); 284 285 /* 286 * Enable Group1 287 */ 288 wb977_device_enable(); 289 290 wb977_device_select(8); 291 292 /* 293 * Group2 base address 294 */ 295 wb977_ww(0x60, GP2_IO_BASE); 296 297 /* 298 * Clear watchdog timer regs 299 * - timer disable 300 */ 301 wb977_wb(0xf2, 0x00); 302 303 /* 304 * - disable LED, no mouse nor keyboard IRQ 305 */ 306 wb977_wb(0xf3, 0x00); 307 308 /* 309 * - timer counting, disable power LED, disable timeouot 310 */ 311 wb977_wb(0xf4, 0x00); 312 313 /* 314 * Enable group2 315 */ 316 wb977_device_enable(); 317 318 /* 319 * Set Group1/Group2 outputs 320 */ 321 spin_lock_irqsave(&gpio_lock, flags); 322 gpio_modify_op(-1, GPIO_RED_LED | GPIO_FAN); 323 spin_unlock_irqrestore(&gpio_loc, flags); 324} 325 326/* 327 * Initialise the Winbond W83977F chip. 328 */ 329static void __init wb977_init(void) 330{ 331 request_region(0x370, 2, "W83977AF configuration"); 332 333 /* 334 * Open up the SuperIO chip 335 */ 336 wb977_open(); 337 338 /* 339 * Initialise the global registers 340 */ 341 wb977_init_global(); 342 343 /* 344 * Initialise the various devices in 345 * the multi-IO chip. 346 */ 347 wb977_init_printer(); 348 wb977_init_keyboard(); 349 wb977_init_irda(); 350 wb977_init_gpio(); 351 352 /* 353 * Close up the EFER gate 354 */ 355 wb977_close(); 356} 357 358void cpld_modify(int mask, int set) 359{ 360 int msk; 361 362 current_cpld = (current_cpld & ~mask) | set; 363 364 gpio_modify_io(GPIO_DATA | GPIO_IOCLK | GPIO_IOLOAD, 0); 365 gpio_modify_op(GPIO_IOLOAD, 0); 366 367 for (msk = 8; msk; msk >>= 1) { 368 int bit = current_cpld & msk; 369 370 gpio_modify_op(GPIO_DATA | GPIO_IOCLK, bit ? GPIO_DATA : 0); 371 gpio_modify_op(GPIO_IOCLK, GPIO_IOCLK); 372 } 373 374 gpio_modify_op(GPIO_IOCLK|GPIO_DATA, 0); 375 gpio_modify_op(GPIO_IOLOAD|GPIO_DSCLK, GPIO_IOLOAD|GPIO_DSCLK); 376 gpio_modify_op(GPIO_IOLOAD, 0); 377} 378 379static void __init cpld_init(void) 380{ 381 unsigned long flags; 382 383 spin_lock_irqsave(&gpio_lock, flags); 384 cpld_modify(-1, CPLD_UNMUTE | CPLD_7111_DISABLE); 385 spin_unlock_irqrestore(&gpio_lock, flags); 386} 387 388static unsigned char rwa_unlock[] __initdata = 389{ 0x00, 0x00, 0x6a, 0xb5, 0xda, 0xed, 0xf6, 0xfb, 0x7d, 0xbe, 0xdf, 0x6f, 0x37, 0x1b, 390 0x0d, 0x86, 0xc3, 0x61, 0xb0, 0x58, 0x2c, 0x16, 0x8b, 0x45, 0xa2, 0xd1, 0xe8, 0x74, 391 0x3a, 0x9d, 0xce, 0xe7, 0x73, 0x39 }; 392 393#ifndef DEBUG 394#define dprintk(x...) 395#else 396#define dprintk(x...) printk(x) 397#endif 398 399#define WRITE_RWA(r,v) do { outb((r), 0x279); udelay(10); outb((v), 0xa79); } while (0) 400 401static inline void rwa010_unlock(void) 402{ 403 int i; 404 405 WRITE_RWA(2, 2); 406 mdelay(10); 407 408 for (i = 0; i < sizeof(rwa_unlock); i++) { 409 outb(rwa_unlock[i], 0x279); 410 udelay(10); 411 } 412} 413 414static inline void rwa010_read_ident(void) 415{ 416 unsigned char si[9]; 417 int i, j; 418 419 WRITE_RWA(3, 0); 420 WRITE_RWA(0, 128); 421 422 outb(1, 0x279); 423 424 mdelay(1); 425 426 dprintk("Identifier: "); 427 for (i = 0; i < 9; i++) { 428 si[i] = 0; 429 for (j = 0; j < 8; j++) { 430 int bit; 431 udelay(250); 432 inb(0x203); 433 udelay(250); 434 bit = inb(0x203); 435 dprintk("%02X ", bit); 436 bit = (bit == 0xaa) ? 1 : 0; 437 si[i] |= bit << j; 438 } 439 dprintk("(%02X) ", si[i]); 440 } 441 dprintk("\n"); 442} 443 444static inline void rwa010_global_init(void) 445{ 446 WRITE_RWA(6, 2); // Assign a card no = 2 447 448 dprintk("Card no = %d\n", inb(0x203)); 449 450 /* disable the modem section of the chip */ 451 WRITE_RWA(7, 3); 452 WRITE_RWA(0x30, 0); 453 454 /* disable the cdrom section of the chip */ 455 WRITE_RWA(7, 4); 456 WRITE_RWA(0x30, 0); 457 458 /* disable the MPU-401 section of the chip */ 459 WRITE_RWA(7, 2); 460 WRITE_RWA(0x30, 0); 461} 462 463static inline void rwa010_game_port_init(void) 464{ 465 int i; 466 467 WRITE_RWA(7, 5); 468 469 dprintk("Slider base: "); 470 WRITE_RWA(0x61, 1); 471 i = inb(0x203); 472 473 WRITE_RWA(0x60, 2); 474 dprintk("%02X%02X (201)\n", inb(0x203), i); 475 476 WRITE_RWA(0x30, 1); 477} 478 479static inline void rwa010_waveartist_init(int base, int irq, int dma) 480{ 481 int i; 482 483 WRITE_RWA(7, 0); 484 485 dprintk("WaveArtist base: "); 486 WRITE_RWA(0x61, base); 487 i = inb(0x203); 488 489 WRITE_RWA(0x60, base >> 8); 490 dprintk("%02X%02X (%X),", inb(0x203), i, base); 491 492 WRITE_RWA(0x70, irq); 493 dprintk(" irq: %d (%d),", inb(0x203), irq); 494 495 WRITE_RWA(0x74, dma); 496 dprintk(" dma: %d (%d)\n", inb(0x203), dma); 497 498 WRITE_RWA(0x30, 1); 499} 500 501static inline void rwa010_soundblaster_init(int sb_base, int al_base, int irq, int dma) 502{ 503 int i; 504 505 WRITE_RWA(7, 1); 506 507 dprintk("SoundBlaster base: "); 508 WRITE_RWA(0x61, sb_base); 509 i = inb(0x203); 510 511 WRITE_RWA(0x60, sb_base >> 8); 512 dprintk("%02X%02X (%X),", inb(0x203), i, sb_base); 513 514 dprintk(" irq: "); 515 WRITE_RWA(0x70, irq); 516 dprintk("%d (%d),", inb(0x203), irq); 517 518 dprintk(" 8-bit DMA: "); 519 WRITE_RWA(0x74, dma); 520 dprintk("%d (%d)\n", inb(0x203), dma); 521 522 dprintk("AdLib base: "); 523 WRITE_RWA(0x63, al_base); 524 i = inb(0x203); 525 526 WRITE_RWA(0x62, al_base >> 8); 527 dprintk("%02X%02X (%X)\n", inb(0x203), i, al_base); 528 529 WRITE_RWA(0x30, 1); 530} 531 532static void rwa010_soundblaster_reset(void) 533{ 534 int i; 535 536 outb(1, 0x226); 537 udelay(3); 538 outb(0, 0x226); 539 540 for (i = 0; i < 5; i++) { 541 if (inb(0x22e) & 0x80) 542 break; 543 mdelay(1); 544 } 545 if (i == 5) 546 printk("SoundBlaster: DSP reset failed\n"); 547 548 dprintk("SoundBlaster DSP reset: %02X (AA)\n", inb(0x22a)); 549 550 for (i = 0; i < 5; i++) { 551 if ((inb(0x22c) & 0x80) == 0) 552 break; 553 mdelay(1); 554 } 555 556 if (i == 5) 557 printk("SoundBlaster: DSP not ready\n"); 558 else { 559 outb(0xe1, 0x22c); 560 561 dprintk("SoundBlaster DSP id: "); 562 i = inb(0x22a); 563 udelay(1); 564 i |= inb(0x22a) << 8; 565 dprintk("%04X\n", i); 566 567 for (i = 0; i < 5; i++) { 568 if ((inb(0x22c) & 0x80) == 0) 569 break; 570 mdelay(1); 571 } 572 573 if (i == 5) 574 printk("SoundBlaster: could not turn speaker off\n"); 575 576 outb(0xd3, 0x22c); 577 } 578 579 /* turn on OPL3 */ 580 outb(5, 0x38a); 581 outb(1, 0x38b); 582} 583 584static void __init rwa010_init(void) 585{ 586 rwa010_unlock(); 587 rwa010_read_ident(); 588 rwa010_global_init(); 589 rwa010_game_port_init(); 590 rwa010_waveartist_init(0x250, 3, 7); 591 rwa010_soundblaster_init(0x220, 0x388, 3, 1); 592 rwa010_soundblaster_reset(); 593} 594 595EXPORT_SYMBOL(gpio_lock); 596EXPORT_SYMBOL(gpio_modify_op); 597EXPORT_SYMBOL(gpio_modify_io); 598EXPORT_SYMBOL(cpld_modify); 599 600/* 601 * Initialise any other hardware after we've got the PCI bus 602 * initialised. We may need the PCI bus to talk to this other 603 * hardware. 604 */ 605static int __init nw_hw_init(void) 606{ 607 if (machine_is_netwinder()) { 608 unsigned long flags; 609 610 wb977_init(); 611 cpld_init(); 612 rwa010_init(); 613 614 spin_lock_irqsave(&gpio_lock, flags); 615 gpio_modify_op(GPIO_RED_LED|GPIO_GREEN_LED, DEFAULT_LEDS); 616 spin_unlock_irqrestore(&gpio_lock, flags); 617 } 618 return 0; 619} 620 621__initcall(nw_hw_init); 622