1/* 2 * HND SiliconBackplane Gigabit Ethernet core registers 3 * 4 * Copyright 2007, Broadcom Corporation 5 * All Rights Reserved. 6 * 7 * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY 8 * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM 9 * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS 10 * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. 11 * 12 * $Id: sbgige.h,v 1.1.1.1 2008/10/15 03:25:54 james26_jang Exp $ 13 */ 14 15#ifndef _sbgige_h_ 16#define _sbgige_h_ 17 18#include <typedefs.h> 19#include <sbconfig.h> 20#include <pcicfg.h> 21 22/* cpp contortions to concatenate w/arg prescan */ 23#ifndef PAD 24#define _PADLINE(line) pad ## line 25#define _XSTR(line) _PADLINE(line) 26#define PAD _XSTR(__LINE__) 27#endif /* PAD */ 28 29/* PCI to OCP shim registers */ 30typedef volatile struct { 31 uint32 FlushStatusControl; 32 uint32 FlushReadAddr; 33 uint32 FlushTimeoutCntr; 34 uint32 BarrierReg; 35 uint32 MaocpSIControl; 36 uint32 SiocpMaControl; 37 uint8 PAD[0x02E8]; 38} sbgige_pcishim_t; 39 40/* SB core registers */ 41typedef volatile struct { 42 /* PCI I/O Read/Write registers */ 43 uint8 pciio[0x0400]; 44 45 /* Reserved */ 46 uint8 reserved[0x0400]; 47 48 /* PCI configuration registers */ 49 pci_config_regs pcicfg; 50 uint8 PAD[0x0300]; 51 52 /* PCI to OCP shim registers */ 53 sbgige_pcishim_t pcishim; 54 55 /* Sonics SiliconBackplane registers */ 56 sbconfig_t sbconfig; 57} sbgige_t; 58 59#endif /* _sbgige_h_ */ 60