1/*
2 * Broadcom device-specific manifest constants.
3 *
4 * Copyright 2007, Broadcom Corporation
5 * All Rights Reserved.
6 *
7 * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
8 * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
9 * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
10 * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
11 * $Id: bcmdevs.h,v 1.1.1.1 2008/10/15 03:25:54 james26_jang Exp $
12 */
13
14#ifndef	_BCMDEVS_H
15#define	_BCMDEVS_H
16
17/* PCI vendor IDs */
18#define	VENDOR_EPIGRAM		0xfeda
19#define	VENDOR_BROADCOM		0x14e4
20#define	VENDOR_3COM		0x10b7
21#define	VENDOR_NETGEAR		0x1385
22#define	VENDOR_DIAMOND		0x1092
23#define	VENDOR_DELL		0x1028
24#define	VENDOR_HP		0x0e11
25#define	VENDOR_APPLE		0x106b
26#define VENDOR_SI_IMAGE		0x1095		/* Silicon Image, used by Arasan SDIO Host */
27#define VENDOR_BUFFALO		0x1154		/* Buffalo vendor id */
28#define VENDOR_TI		0x104c		/* Texas Instruments */
29
30/* PCMCIA vendor IDs */
31#define	VENDOR_BROADCOM_PCMCIA	0x02d0
32
33/* SDIO vendor IDs */
34#define	VENDOR_BROADCOM_SDIO	0x00BF
35
36/* PCI Device IDs */
37#define	BCM4210_DEVICE_ID	0x1072		/* never used */
38#define	BCM4230_DEVICE_ID	0x1086		/* never used */
39#define	BCM4401_ENET_ID		0x170c		/* 4401b0 production enet cards */
40#define	BCM3352_DEVICE_ID	0x3352		/* bcm3352 device id */
41#define	BCM3360_DEVICE_ID	0x3360		/* bcm3360 device id */
42#define	BCM4211_DEVICE_ID	0x4211
43#define	BCM4231_DEVICE_ID	0x4231
44#define	BCM4303_D11B_ID		0x4303		/* 4303 802.11b */
45#define	BCM4311_D11G_ID		0x4311		/* 4311 802.11b/g id */
46#define	BCM4311_D11DUAL_ID	0x4312		/* 4311 802.11a/b/g id */
47#define	BCM4311_D11A_ID		0x4313		/* 4311 802.11a id */
48#define	BCM4328_D11DUAL_ID	0x4314		/* 4328 802.11a/g id */
49#define	BCM4328_D11G_ID		0x4315		/* 4328 802.11g 2.4Ghz band id */
50#define	BCM4328_D11A_ID		0x4316		/* 4328 802.11a 5Ghz band id */
51#define	BCM4318_D11G_ID		0x4318		/* 4318 802.11b/g id */
52#define	BCM4318_D11DUAL_ID	0x4319		/* 4318 802.11a/b/g id */
53#define	BCM4318_D11A_ID		0x431a		/* 4318 802.11a id */
54#define	BCM4325_D11DUAL_ID	0x431b		/* 4325 802.11a/g id */
55#define	BCM4325_D11G_ID		0x431c		/* 4325 802.11g 2.4Ghz band id */
56#define	BCM4325_D11A_ID		0x431d		/* 4325 802.11a 5Ghz band id */
57#define	BCM4306_D11G_ID		0x4320		/* 4306 802.11g */
58#define	BCM4306_D11A_ID		0x4321		/* 4306 802.11a */
59#define	BCM4306_UART_ID		0x4322		/* 4306 uart */
60#define	BCM4306_V90_ID		0x4323		/* 4306 v90 codec */
61#define	BCM4306_D11DUAL_ID	0x4324		/* 4306 dual A+B */
62#define	BCM4306_D11G_ID2	0x4325
63#define	BCM4321_D11N_ID		0x4328		/* 4321 802.11n dualband id */
64#define	BCM4321_D11N2G_ID	0x4329		/* 4321 802.11n 2.4Ghz band id */
65#define	BCM4321_D11N5G_ID	0x432a		/* 4321 802.11n 5Ghz band id */
66#define	BCMGPRS_UART_ID		0x4333		/* Uart id used by 4306/gprs card */
67#define	BCMGPRS2_UART_ID	0x4344		/* Uart id used by 4306/gprs card */
68#define FPGA_JTAGM_ID		0x43f0		/* FPGA jtagm device id */
69#define BCM_JTAGM_ID		0x43f1		/* BCM jtagm device id */
70#define SDIOH_FPGA_ID		0x43f2		/* sdio host fpga */
71#define BCM_SDIOH_ID		0x43f3		/* BCM sdio host id */
72#define SDIOD_FPGA_ID		0x43f4		/* sdio device fpga */
73#define SPIH_FPGA_ID		0x43f5		/* PCI SPI Host Controller FPGA */
74#define MIMO_FPGA_ID		0x43f8		/* FPGA mimo minimacphy device id */
75#define	BCM4402_ENET_ID		0x4402		/* 4402 enet */
76#define	BCM4402_V90_ID		0x4403		/* 4402 v90 codec */
77#define	BCM4410_DEVICE_ID	0x4410		/* bcm44xx family pci iline */
78#define	BCM4412_DEVICE_ID	0x4412		/* bcm44xx family pci enet */
79#define	BCM4430_DEVICE_ID	0x4430		/* bcm44xx family cardbus iline */
80#define	BCM4432_DEVICE_ID	0x4432		/* bcm44xx family cardbus enet */
81#define	BCM4704_ENET_ID		0x4706		/* 4704 enet (Use 47XX_ENET_ID instead!) */
82#define	BCM4710_DEVICE_ID	0x4710		/* 4710 primary function 0 */
83#define	BCM47XX_ILINE_ID	0x4711		/* 47xx iline20 */
84#define	BCM47XX_V90_ID		0x4712		/* 47xx v90 codec */
85#define	BCM47XX_ENET_ID		0x4713		/* 47xx enet */
86#define	BCM47XX_EXT_ID		0x4714		/* 47xx external i/f */
87#define	BCM47XX_USB_ID		0x4715		/* 47xx usb */
88#define	BCM47XX_USBH_ID		0x4716		/* 47xx usb host */
89#define	BCM47XX_USBD_ID		0x4717		/* 47xx usb device */
90#define	BCM47XX_IPSEC_ID	0x4718		/* 47xx ipsec */
91#define	BCM47XX_ROBO_ID		0x4719		/* 47xx/53xx roboswitch core */
92#define	BCM47XX_USB20H_ID	0x471a		/* 47xx usb 2.0 host */
93#define	BCM47XX_USB20D_ID	0x471b		/* 47xx usb 2.0 device */
94#define	BCM47XX_ATA100_ID	0x471d		/* 47xx parallel ATA */
95#define	BCM47XX_SATAXOR_ID	0x471e		/* 47xx serial ATA & XOR DMA */
96#define	BCM47XX_GIGETH_ID	0x471f		/* 47xx GbE (5700) */
97#define	BCM4712_MIPS_ID		0x4720		/* 4712 base devid */
98#define BCM47XX_SMBUS_EMU_ID	0x47fe		/* 47xx emulated SMBus device */
99#define	BCM47XX_XOR_EMU_ID	0x47ff		/* 47xx emulated XOR engine */
100#define	EPI41210_DEVICE_ID	0xa0fa		/* bcm4210 */
101#define	EPI41230_DEVICE_ID	0xa10e		/* bcm4230 */
102#define JINVANI_SDIOH_ID	0x4743		/* Jinvani SDIO Gold Host */
103#define BCM27XX_SDIOH_ID	0x2702		/* BCM27xx Standard SDIO Host */
104#define PCIXX21_FLASHMEDIA_ID	0x803b		/* TI PCI xx21 Standard Host Controller */
105#define PCIXX21_SDIOH_ID	0x803c		/* TI PCI xx21 Standard Host Controller */
106
107/* Chip IDs */
108#define	BCM4710_CHIP_ID		0x4710		/* 4710 chipid returned by sb_chip() */
109#define	BCM4402_CHIP_ID		0x4402		/* 4402 chipid */
110#define	BCM4306_CHIP_ID		0x4306		/* 4306 chipcommon chipid */
111#define	BCM4311_CHIP_ID		0x4311		/* 4311 PCIe 802.11a/b/g */
112#define	BCM4704_CHIP_ID		0x4704		/* 4704 chipcommon chipid */
113#define	BCM4312_CHIP_ID		0x4312		/* 4312 chip common chipid */
114#define	BCM4318_CHIP_ID		0x4318		/* 4318 chip common chipid */
115#define	BCM4321_CHIP_ID		0x4321		/* 4321 chip common chipid */
116#define	BCM4328_CHIP_ID		0x4328		/* 4328 chip common chipid */
117#define	BCM4325_CHIP_ID		0x4325		/* 4325 chip common chipid */
118#define	BCM4712_CHIP_ID		0x4712		/* 4712 chipcommon chipid */
119#define BCM5365_CHIP_ID		0x5365          /* 5365 chipcommon chipid */
120#define	BCM5350_CHIP_ID		0x5350		/* bcm5350 chipcommon chipid */
121#define	BCM5352_CHIP_ID		0x5352		/* bcm5352 chipcommon chipid */
122#define	BCM5354_CHIP_ID		0x5354		/* bcm5354 chipcommon chipid */
123#define	BCM4320_CHIP_ID		0x4320		/* bcm4320 chipcommon chipid */
124#define BCM4785_CHIP_ID		0x4785		/* 4785 chipcommon chipid */
125
126/* Package IDs */
127#define	BCM4303_PKG_ID		2		/* 4303 package id */
128#define	BCM4309_PKG_ID		1		/* 4309 package id */
129#define	BCM4712LARGE_PKG_ID	0		/* 340pin 4712 package id */
130#define	BCM4712SMALL_PKG_ID	1		/* 200pin 4712 package id */
131#define	BCM4712MID_PKG_ID	2		/* 225pin 4712 package id */
132#define BCM4328USBD11G_PKG_ID	2		/* 4328 802.11g USB package id */
133#define BCM4328USBDUAL_PKG_ID	3		/* 4328 802.11a/g USB package id */
134#define BCM4328SDIOD11G_PKG_ID	4		/* 4328 802.11g SDIO package id */
135#define BCM4328SDIODUAL_PKG_ID	5		/* 4328 802.11a/g SDIO package id */
136#define BCM5354E_PKG_ID		1		/* 5354E package id */
137#define HDLSIM5350_PKG_ID	1		/* HDL simulator package id for a 5350 */
138#define HDLSIM_PKG_ID		14		/* HDL simulator package id */
139#define HWSIM_PKG_ID		15		/* Hardware simulator package id */
140
141#define PCIXX21_FLASHMEDIA0_ID	0x8033		/* TI PCI xx21 Standard Host Controller */
142#define PCIXX21_SDIOH0_ID	0x8034		/* TI PCI xx21 Standard Host Controller */
143/* boardflags */
144#define	BFL_BTCOEXIST		0x00000001	/* This board implements Bluetooth coexistance */
145#define	BFL_PACTRL		0x00000002	/* This board has gpio 9 controlling the PA */
146#define	BFL_AIRLINEMODE	0x00000004	/* This board implements gpio13 radio disable indication */
147#define	BFL_ENETROBO		0x00000010	/* This board has robo switch or core */
148#define	BFL_CCKHIPWR		0x00000040	/* Can do high-power CCK transmission */
149#define	BFL_ENETADM		0x00000080	/* This board has ADMtek switch */
150#define	BFL_ENETVLAN		0x00000100	/* This board has vlan capability */
151#define	BFL_AFTERBURNER		0x00000200	/* This board supports Afterburner mode */
152#define BFL_NOPCI		0x00000400	/* This board leaves PCI floating */
153#define BFL_FEM			0x00000800  /* This board supports the Front End Module */
154#define BFL_EXTLNA		0x00001000	/* This board has an external LNA */
155#define BFL_HGPA		0x00002000	/* This board has a high gain PA */
156#define	BFL_BTCMOD	0x00004000	/* This board' BTCOEXIST is in the alternate gpios */
157#define	BFL_ALTIQ		0x00008000	/* Alternate I/Q settings */
158#define BFL_NOPA	0x00010000	/* This board has no PA */
159#define BFL_RSSIINV		0x00020000	/* This board's RSSI uses positive slope */
160#define BFL_PAREF		0x00040000	/* This board uses the PARef LDO */
161#define BFL_3TSWITCH	0x00080000	/* This board uses a triple throw switch shared with BT */
162#define BFL_PHASESHIFTER	0x00100000	/* This board can support phase shifter */
163#define BFL_BUCKBOOST	0x00200000	/* This board has buck/booster */
164/* boardflags2 */
165#define BFL2_RXBB_INT_REG_DIS	0x00000001	/* This board has an external rxbb regulator */
166#define BFL2_DEPRECIATED_STUB	0x00000002	/* This board flag is depreciated */
167#define BFL2_TXPWRCTRL_EN	0x00000004	/* This board permits enabling TX Power Control */
168#define BFL2_2X4_DIV		0x00000008	/* This board supports the 2X4 diversity switch */
169#define BFL2_5G_PWRGAIN		0x00000010	/* This board supports 5G band power gain */
170#define BFL2_PCIEWAR_OVR	0x00000020	/* This board overrides ASPM and Clkreq settings */
171#define BFL2_CAESERS_BRD	0x00000040	/* This board is Dell Caeser's brd (unused by sw) */
172
173/* board specific GPIO assignment, gpio 0-3 are also customer-configurable led */
174#define	BOARD_GPIO_BTCMOD_IN	0x010	/* bit 4 is the alternate BT Coexistance Input */
175#define	BOARD_GPIO_BTCMOD_OUT	0x020	/* bit 5 is the alternate BT Coexistance Out */
176#define	BOARD_GPIO_BTC_IN	0x080	/* bit 7 is BT Coexistance Input */
177#define	BOARD_GPIO_BTC_OUT	0x100	/* bit 8 is BT Coexistance Out */
178#define	BOARD_GPIO_PACTRL	0x200	/* bit 9 controls the PA on new 4306 boards */
179#define BOARD_GPIO_ANT0_SEL	0x100	/* With BFL2_2X4_DIV */
180#define BOARD_GPIO_ANT1_SEL	0x200	/* With BFL2_2X4_DIV */
181
182#define	PCI_CFG_GPIO_SCS	0x10	/* PCI config space bit 4 for 4306c0 slow clock source */
183#define PCI_CFG_GPIO_HWRAD	0x20	/* PCI config space GPIO 13 for hw radio disable */
184#define PCI_CFG_GPIO_XTAL	0x40	/* PCI config space GPIO 14 for Xtal powerup */
185#define PCI_CFG_GPIO_PLL	0x80	/* PCI config space GPIO 15 for PLL powerdown */
186
187/* power control defines */
188#define PLL_DELAY		150		/* us pll on delay */
189#define FREF_DELAY		200		/* us fref change delay */
190#define MIN_SLOW_CLK		32		/* us Slow clock period */
191#define	XTAL_ON_DELAY		1000		/* us crystal power-on delay */
192
193/* Reference Board Types */
194#define	BU4710_BOARD		0x0400
195#define	VSIM4710_BOARD		0x0401
196#define	QT4710_BOARD		0x0402
197
198#define	BU4309_BOARD		0x040a
199#define	BCM94309CB_BOARD	0x040b
200#define	BCM94309MP_BOARD	0x040c
201#define	BCM4309AP_BOARD		0x040d
202
203#define	BCM94302MP_BOARD	0x040e
204
205#define	BU4306_BOARD		0x0416
206#define	BCM94306CB_BOARD	0x0417
207#define	BCM94306MP_BOARD	0x0418
208
209#define	BCM94710D_BOARD		0x041a
210#define	BCM94710R1_BOARD	0x041b
211#define	BCM94710R4_BOARD	0x041c
212#define	BCM94710AP_BOARD	0x041d
213
214#define	BU2050_BOARD		0x041f
215
216
217#define	BCM94309G_BOARD		0x0421
218
219#define	BU4704_BOARD		0x0423
220#define	BU4702_BOARD		0x0424
221
222#define	BCM94306PC_BOARD	0x0425		/* pcmcia 3.3v 4306 card */
223
224
225#define	BCM94702MN_BOARD	0x0428
226
227/* BCM4702 1U CompactPCI Board */
228#define	BCM94702CPCI_BOARD	0x0429
229
230/* BCM4702 with BCM95380 VLAN Router */
231#define	BCM95380RR_BOARD	0x042a
232
233/* cb4306 with SiGe PA */
234#define	BCM94306CBSG_BOARD	0x042b
235
236/* cb4306 with SiGe PA */
237#define	PCSG94306_BOARD		0x042d
238
239/* bu4704 with sdram */
240#define	BU4704SD_BOARD		0x042e
241
242/* Dual 11a/11g Router */
243#define	BCM94704AGR_BOARD	0x042f
244
245/* 11a-only minipci */
246#define	BCM94308MP_BOARD	0x0430
247
248
249
250#define BU4712_BOARD		0x0444
251#define	BU4712SD_BOARD		0x045d
252#define	BU4712L_BOARD		0x045f
253
254/* BCM4712 boards */
255#define BCM94712AP_BOARD	0x0445
256#define BCM94712P_BOARD		0x0446
257
258/* BCM4318 boards */
259#define BU4318_BOARD		0x0447
260#define CB4318_BOARD		0x0448
261#define MPG4318_BOARD		0x0449
262#define MP4318_BOARD		0x044a
263#define SD4318_BOARD		0x044b
264
265/* BCM63XX boards */
266#define BCM96338_BOARD		0x6338
267#define BCM96348_BOARD		0x6348
268#define BCM96358_BOARD		0x6358
269
270/* Another mp4306 with SiGe */
271#define	BCM94306P_BOARD		0x044c
272
273/* mp4303 */
274#define	BCM94303MP_BOARD	0x044e
275
276/* mpsgh4306 */
277#define	BCM94306MPSGH_BOARD	0x044f
278
279/* BRCM 4306 w/ Front End Modules */
280#define BCM94306MPM  		0x0450
281#define BCM94306MPL  		0x0453
282
283/* 4712agr */
284#define	BCM94712AGR_BOARD	0x0451
285
286/* pcmcia 4303 */
287#define	PC4303_BOARD		0x0454
288
289/* 5350K */
290#define	BCM95350K_BOARD		0x0455
291
292/* 5350R */
293#define	BCM95350R_BOARD		0x0456
294
295/* 4306mplna */
296#define	BCM94306MPLNA_BOARD	0x0457
297
298/* 4320 boards */
299#define	BU4320_BOARD		0x0458
300#define	BU4320S_BOARD		0x0459
301#define	BCM94320PH_BOARD	0x045a
302
303/* 4306mph */
304#define	BCM94306MPH_BOARD	0x045b
305
306/* 4306pciv */
307#define	BCM94306PCIV_BOARD	0x045c
308
309#define	BU4712SD_BOARD		0x045d
310
311#define	BCM94320PFLSH_BOARD	0x045e
312
313#define	BU4712L_BOARD		0x045f
314#define	BCM94712LGR_BOARD	0x0460
315#define	BCM94320R_BOARD		0x0461
316
317#define	BU5352_BOARD		0x0462
318
319#define	BCM94318MPGH_BOARD	0x0463
320
321#define	BU4311_BOARD		0x0464
322#define	BCM94311MC_BOARD	0x0465
323#define	BCM94311MCAG_BOARD	0x0466
324
325#define	BCM95352GR_BOARD	0x0467
326
327/* bcm95351agr */
328#define	BCM95351AGR_BOARD	0x0470
329
330/* bcm94704mpcb */
331#define	BCM94704MPCB_BOARD	0x0472
332
333/* 4785 boards */
334#define BU4785_BOARD		0x0478
335
336/* 4321 boards */
337#define BU4321_BOARD		0x046b
338#define BU4321E_BOARD		0x047c
339#define MP4321_BOARD		0x046c
340#define CB2_4321_BOARD		0x046d
341#define MC4321_BOARD		0x046e
342
343/* 4328 boards */
344#define BU4328_BOARD		0x0481
345#define BCM4328SDG_BOARD	0x0482
346#define BCM4328SDAG_BOARD	0x0483
347#define BCM4328UG_BOARD		0x0484
348#define BCM4328UAG_BOARD	0x0485
349#define BCM4328PC_BOARD		0x0486
350#define BCM4328CF_BOARD		0x0487
351
352/* 4325 boards */
353#define BU4325_BOARD		0x0490
354
355/* # of GPIO pins */
356#define GPIO_NUMPINS		16
357
358/* radio ID codes */
359#define	NORADIO_ID		0xe4f5
360#define	NORADIO_IDCODE		0x4e4f5246
361
362#define	BCM2050_ID		0x2050
363#define	BCM2050_IDCODE		0x02050000
364#define	BCM2050A0_IDCODE	0x1205017f
365#define	BCM2050A1_IDCODE	0x2205017f
366#define	BCM2050R8_IDCODE	0x8205017f
367
368#define BCM2055_ID		0x2055
369#define BCM2055_IDCODE		0x02055000
370#define BCM2055A0_IDCODE	0x1205517f
371
372#define	BCM2060_ID		0x2060
373#define	BCM2060_IDCODE		0x02060000
374#define	BCM2060WW_IDCODE	0x1206017f
375
376#define BCM2062_ID		0x2062
377#define BCM2062_IDCODE		0x02062000
378#define BCM2062A0_IDCODE	0x0206217f
379
380#define BCM2063_ID		0x2063
381#define BCM2063_IDCODE		0x02063000
382#define BCM2063A0_IDCODE	0x0206317f
383
384/* parts of an idcode: */
385#define	IDCODE_MFG_MASK		0x00000fff
386#define	IDCODE_MFG_SHIFT	0
387#define	IDCODE_ID_MASK		0x0ffff000
388#define	IDCODE_ID_SHIFT		12
389#define	IDCODE_REV_MASK		0xf0000000
390#define	IDCODE_REV_SHIFT	28
391
392#endif /* _BCMDEVS_H */
393