Searched refs:CLK_TOP_ETHPLL_500M (Results 1 - 10 of 10) sorted by relevance
/u-boot/drivers/clk/mediatek/ |
H A D | clk-mt7623.c | 180 FACTOR0(CLK_TOP_ETHPLL_500M, CLK_APMIXED_ETHPLL, 1, 1), 716 GATE_ETH_HIF1(CLK_ETHSYS_ESW, CLK_TOP_ETHPLL_500M, 6), 718 GATE_ETH_HIF1(CLK_ETHSYS_GP1, CLK_TOP_ETHPLL_500M, 8), 726 GATE_ETH_HIF1(CLK_HIFSYS_USB0PHY, CLK_TOP_ETHPLL_500M, 21), 727 GATE_ETH_HIF1(CLK_HIFSYS_USB1PHY, CLK_TOP_ETHPLL_500M, 22), 728 GATE_ETH_HIF1(CLK_HIFSYS_PCIE0, CLK_TOP_ETHPLL_500M, 24), 729 GATE_ETH_HIF1(CLK_HIFSYS_PCIE1, CLK_TOP_ETHPLL_500M, 25), 730 GATE_ETH_HIF1(CLK_HIFSYS_PCIE2, CLK_TOP_ETHPLL_500M, 26),
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/u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
H A D | mt7623-clk.h | 95 #define CLK_TOP_ETHPLL_500M 82 macro
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/u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
H A D | mt7623-clk.h | 95 #define CLK_TOP_ETHPLL_500M 82 macro
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/u-boot/arch/arm/dts/include/dt-bindings/clock/ |
H A D | mt7623-clk.h | 95 #define CLK_TOP_ETHPLL_500M 82 macro
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/u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
H A D | mt7623-clk.h | 95 #define CLK_TOP_ETHPLL_500M 82 macro
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/u-boot/arch/mips/dts/include/dt-bindings/clock/ |
H A D | mt7623-clk.h | 95 #define CLK_TOP_ETHPLL_500M 82 macro
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/u-boot/arch/x86/dts/include/dt-bindings/clock/ |
H A D | mt7623-clk.h | 95 #define CLK_TOP_ETHPLL_500M 82 macro
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/u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
H A D | mt7623-clk.h | 95 #define CLK_TOP_ETHPLL_500M 82 macro
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/u-boot/include/dt-bindings/clock/ |
H A D | mt7623-clk.h | 95 #define CLK_TOP_ETHPLL_500M 82 macro
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/u-boot/dts/upstream/include/dt-bindings/clock/ |
H A D | mt2701-clk.h | 81 #define CLK_TOP_ETHPLL_500M 71 macro
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