Searched refs:CLK_APMIXED_AUD1PLL (Results 1 - 20 of 20) sorted by relevance
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
H A D | mt7622-clk.h | 168 #define CLK_APMIXED_AUD1PLL 5 macro
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H A D | mt7623-clk.h | 183 #define CLK_APMIXED_AUD1PLL 6 macro
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/u-boot/arch/mips/dts/include/dt-bindings/clock/ |
H A D | mt7622-clk.h | 168 #define CLK_APMIXED_AUD1PLL 5 macro
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H A D | mt7623-clk.h | 183 #define CLK_APMIXED_AUD1PLL 6 macro
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/u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
H A D | mt7622-clk.h | 168 #define CLK_APMIXED_AUD1PLL 5 macro
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H A D | mt7623-clk.h | 183 #define CLK_APMIXED_AUD1PLL 6 macro
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/u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
H A D | mt7622-clk.h | 168 #define CLK_APMIXED_AUD1PLL 5 macro
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H A D | mt7623-clk.h | 183 #define CLK_APMIXED_AUD1PLL 6 macro
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/u-boot/arch/x86/dts/include/dt-bindings/clock/ |
H A D | mt7622-clk.h | 168 #define CLK_APMIXED_AUD1PLL 5 macro
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H A D | mt7623-clk.h | 183 #define CLK_APMIXED_AUD1PLL 6 macro
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/u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
H A D | mt7622-clk.h | 168 #define CLK_APMIXED_AUD1PLL 5 macro
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H A D | mt7623-clk.h | 183 #define CLK_APMIXED_AUD1PLL 6 macro
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/u-boot/arch/arm/dts/include/dt-bindings/clock/ |
H A D | mt7622-clk.h | 168 #define CLK_APMIXED_AUD1PLL 5 macro
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H A D | mt7623-clk.h | 183 #define CLK_APMIXED_AUD1PLL 6 macro
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/u-boot/include/dt-bindings/clock/ |
H A D | mt7622-clk.h | 168 #define CLK_APMIXED_AUD1PLL 5 macro
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H A D | mt7623-clk.h | 183 #define CLK_APMIXED_AUD1PLL 6 macro
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/u-boot/dts/upstream/include/dt-bindings/clock/ |
H A D | mt7622-clk.h | 175 #define CLK_APMIXED_AUD1PLL 5 macro
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H A D | mt2701-clk.h | 181 #define CLK_APMIXED_AUD1PLL 7 macro
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/u-boot/drivers/clk/mediatek/ |
H A D | clk-mt7622.c | 59 PLL(CLK_APMIXED_AUD1PLL, 0x324, 0x330, 0x1, 0, 132 FACTOR0(CLK_TOP_AUD1PLL, CLK_APMIXED_AUD1PLL, 1, 1),
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H A D | clk-mt7623.c | 57 PLL(CLK_APMIXED_AUD1PLL, 0x270, 0x27c, 0x00000001, 0, 176 FACTOR0(CLK_TOP_AUD1PLL_98M, CLK_APMIXED_AUD1PLL, 1, 3),
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