Searched refs:CK_INFRA_SPI0_SEL (Results 1 - 18 of 18) sorted by relevance
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
H A D | mt7986-clk.h | 157 #define CK_INFRA_SPI0_SEL (3 + CLK_INFRA_NR_CLK) macro
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H A D | mt7981-clk.h | 175 #define CK_INFRA_SPI0_SEL (3 + CLK_INFRA_NR_CLK) macro
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/u-boot/arch/arm/dts/include/dt-bindings/clock/ |
H A D | mt7986-clk.h | 157 #define CK_INFRA_SPI0_SEL (3 + CLK_INFRA_NR_CLK) macro
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H A D | mt7981-clk.h | 175 #define CK_INFRA_SPI0_SEL (3 + CLK_INFRA_NR_CLK) macro
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/u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
H A D | mt7986-clk.h | 157 #define CK_INFRA_SPI0_SEL (3 + CLK_INFRA_NR_CLK) macro
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H A D | mt7981-clk.h | 175 #define CK_INFRA_SPI0_SEL (3 + CLK_INFRA_NR_CLK) macro
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/u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
H A D | mt7986-clk.h | 157 #define CK_INFRA_SPI0_SEL (3 + CLK_INFRA_NR_CLK) macro
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H A D | mt7981-clk.h | 175 #define CK_INFRA_SPI0_SEL (3 + CLK_INFRA_NR_CLK) macro
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/u-boot/arch/x86/dts/include/dt-bindings/clock/ |
H A D | mt7986-clk.h | 157 #define CK_INFRA_SPI0_SEL (3 + CLK_INFRA_NR_CLK) macro
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H A D | mt7981-clk.h | 175 #define CK_INFRA_SPI0_SEL (3 + CLK_INFRA_NR_CLK) macro
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/u-boot/arch/mips/dts/include/dt-bindings/clock/ |
H A D | mt7986-clk.h | 157 #define CK_INFRA_SPI0_SEL (3 + CLK_INFRA_NR_CLK) macro
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H A D | mt7981-clk.h | 175 #define CK_INFRA_SPI0_SEL (3 + CLK_INFRA_NR_CLK) macro
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/u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
H A D | mt7986-clk.h | 157 #define CK_INFRA_SPI0_SEL (3 + CLK_INFRA_NR_CLK) macro
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H A D | mt7981-clk.h | 175 #define CK_INFRA_SPI0_SEL (3 + CLK_INFRA_NR_CLK) macro
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/u-boot/include/dt-bindings/clock/ |
H A D | mt7986-clk.h | 157 #define CK_INFRA_SPI0_SEL (3 + CLK_INFRA_NR_CLK) macro
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H A D | mt7981-clk.h | 175 #define CK_INFRA_SPI0_SEL (3 + CLK_INFRA_NR_CLK) macro
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/u-boot/drivers/clk/mediatek/ |
H A D | clk-mt7986.c | 339 INFRA_FACTOR(CK_INFRA_MUX_SPI0, "infra_mux_spi0", CK_INFRA_SPI0_SEL, 1, 392 INFRA_MUX(CK_INFRA_SPI0_SEL, "infra_spi0_sel", infra_spi0_parents, 0x10,
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H A D | clk-mt7981.c | 347 INFRA_FACTOR(CK_INFRA_MUX_SPI0, "infra_mux_spi0", CK_INFRA_SPI0_SEL, 1, 400 INFRA_MUX(CK_INFRA_SPI0_SEL, "infra_spi0_sel", infra_spi0_parents, 0x10,
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