Searched refs:HXGE_REG_WR32 (Results 1 - 8 of 8) sorted by relevance
/opensolaris-onvv-gate/usr/src/uts/common/io/hxge/ |
H A D | hpi_vir.c | 55 HXGE_REG_WR32(handle, LD_GRP_CTRL + LD_NUM_OFFSET(ld), gnum.value); 135 HXGE_REG_WR32(handle, offset, (uint32_t)ldf_mask); 170 HXGE_REG_WR32(handle, LD_INTR_MGMT + LDSV_OFFSET(ldg), mgm.value); 197 HXGE_REG_WR32(handle, LD_INTR_TIM_RES, tm.value); 226 HXGE_REG_WR32(handle, SID + LDG_SID_OFFSET(sid.ldg), sd.value); 249 HXGE_REG_WR32(handle, DEV_ERR_MASK, dev_mask.value);
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H A D | hxge_common_impl.h | 222 #define HXGE_REG_WR32(handle, offset, val) { \ macro
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H A D | hxge_hw.c | 241 HXGE_REG_WR32(handle, PEU_INTR_MASK, 0xffffffff);
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H A D | hxge_main.c | 720 HXGE_REG_WR32(hxgep->hpi_handle, BLOCK_RESET, 0x0000001E); 4478 HXGE_REG_WR32(hxgep->hpi_msi_handle, i * 16, data0); 4479 HXGE_REG_WR32(hxgep->hpi_msi_handle, i * 16 + 4, data1); 4480 HXGE_REG_WR32(hxgep->hpi_msi_handle, i * 16 + 8, data2); 4481 HXGE_REG_WR32(hxgep->hpi_msi_handle, i * 16 + 12, 0);
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H A D | hxge_pfc.c | 660 HXGE_REG_WR32(hxgep->hpi_handle, BLOCK_RESET, reset_reg.value);
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H A D | hxge_virtual.c | 654 HXGE_REG_WR32(hxgep->hpi_handle, PEU_INTR_MASK, parity_err_mask.value);
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H A D | hxge_txdma.c | 99 HXGE_REG_WR32(hxgep->hpi_handle, BLOCK_RESET, reset_reg.value); 2854 HXGE_REG_WR32(handle, BLOCK_RESET, reset_reg.value);
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H A D | hxge_rxdma.c | 123 HXGE_REG_WR32(hxgep->hpi_handle, BLOCK_RESET, reset_reg.value); 3747 HXGE_REG_WR32(hxgep->hpi_handle, BLOCK_RESET, reset_reg.value);
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Completed in 133 milliseconds