Searched refs:mmSDMA0_RLC0_MIDCMD_DATA0 (Results 1 - 13 of 13) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h354 #define mmSDMA0_RLC0_MIDCMD_DATA0 0x0180 macro
H A Dsdma0_4_0_offset.h442 #define mmSDMA0_RLC0_MIDCMD_DATA0 0x0180 macro
H A Dsdma0_4_2_2_offset.h442 #define mmSDMA0_RLC0_MIDCMD_DATA0 0x0170 macro
H A Dsdma0_4_2_offset.h438 #define mmSDMA0_RLC0_MIDCMD_DATA0 0x0180 macro
/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Damdgpu_amdkfd_arcturus.c214 for (reg = mmSDMA0_RLC0_MIDCMD_DATA0;
H A Damdgpu_amdkfd_gfx_v10_3.c449 for (reg = mmSDMA0_RLC0_MIDCMD_DATA0;
H A Damdgpu_amdkfd_gfx_v8.c342 for (reg = mmSDMA0_RLC0_MIDCMD_DATA0; reg <= mmSDMA0_RLC0_MIDCMD_CNTL;
H A Damdgpu_amdkfd_gfx_v10.c463 for (reg = mmSDMA0_RLC0_MIDCMD_DATA0;
H A Damdgpu_amdkfd_gfx_v9.c476 for (reg = mmSDMA0_RLC0_MIDCMD_DATA0;
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/oss/
H A Doss_3_0_1_d.h281 #define mmSDMA0_RLC0_MIDCMD_DATA0 0x3541 macro
H A Doss_3_0_d.h403 #define mmSDMA0_RLC0_MIDCMD_DATA0 0x3541 macro
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_10_3_0_offset.h432 #define mmSDMA0_RLC0_MIDCMD_DATA0 0x0170 macro
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H A Dgc_10_1_0_offset.h433 #define mmSDMA0_RLC0_MIDCMD_DATA0 0x0180 macro
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