Searched refs:CSR0_STOP (Results 1 - 7 of 7) sorted by relevance
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/drivers/net/ |
H A D | ni65.h | 32 #define CSR0_STOP 0x0004 /* Stop (RS) */ macro
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H A D | sun3lance.c | 215 #define CSR0_STOP 0x0004 /* stop (RS) */ macro 323 ioaddr_probe[0] = CSR0_INIT | CSR0_STOP; 325 if(ioaddr_probe[0] != CSR0_STOP) { 349 REGA(CSR0) = CSR0_STOP; 423 REGA(CSR0) = CSR0_STOP; 437 DREG = CSR0_STOP; 531 DREG = CSR0_STOP; 589 REGA( CSR0 ) = CSR0_STOP; 708 REGA(CSR0) = CSR0_STOP; 746 REGA(CSR0) = CSR0_STOP; [all...] |
H A D | atarilance.c | 316 #define CSR0_STOP 0x0004 /* stop (RS) */ macro 505 ioaddr[0] = CSR0_INIT | CSR0_STOP; 506 if (ioaddr[0] != CSR0_STOP) { 512 ioaddr[0] = CSR0_STOP; 513 if (ioaddr[0] != CSR0_STOP) { 533 REGA( CSR0 ) = CSR0_STOP; 674 DREG = CSR0_STOP; 747 DREG = CSR0_STOP; 887 DREG = csr0 & ~(CSR0_INIT | CSR0_STRT | CSR0_STOP | 1082 DREG = CSR0_STOP; [all...] |
H A D | pcnet32.c | 195 #define CSR0_STOP 0x4 macro 797 lp->a.write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */ 896 lp->a.write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */ 910 lp->a.write_csr(ioaddr, CSR0, CSR0_STOP); /* Set STOP bit */ 981 lp->a.write_csr(ioaddr, CSR0, CSR0_STOP); /* Set STOP bit */ 1450 if (!(csr0 & CSR0_STOP)) /* If not stopped */ 1488 if (!(csr0 & CSR0_STOP)) { /* If not stopped */ 2430 if (lp->a.read_csr(ioaddr, CSR0) & CSR0_STOP) 2463 lp->a.write_csr(ioaddr, CSR0, CSR0_STOP); 2659 lp->a.write_csr(ioaddr, CSR0, CSR0_STOP); [all...] |
H A D | ni65.c | 253 writereg(CSR0_STOP | CSR0_CLRALL,CSR0); /* STOP */ 550 writereg(CSR0_CLRALL|CSR0_STOP,CSR0); 703 writedatareg(CSR0_STOP);
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/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/drivers/net/arm/ |
H A D | am79c961a.h | 33 #define CSR0_STOP 0x0004 macro
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H A D | am79c961a.c | 212 write_rreg (dev->base_addr, CSR0, CSR0_BABL|CSR0_CERR|CSR0_MISS|CSR0_MERR|CSR0_TINT|CSR0_RINT|CSR0_STOP); 268 write_rreg (dev->base_addr, CSR0, CSR0_STOP); 336 write_rreg (dev->base_addr, CSR0, CSR0_STOP); 396 stopped = read_rreg(dev->base_addr, CSR0) & CSR0_STOP; 652 write_rreg (dev->base_addr, CSR0, CSR0_STOP);
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