Searched refs:ddrclock (Results 1 - 3 of 3) sorted by relevance
/netgear-R7000-V1.0.7.12_1.2.5/src/shared/ |
H A D | hndarm_ca9.c | 143 BCMINITFN(si_arm_setclock)(si_t *sih, uint32 armclock, uint32 ddrclock, uint32 axiclock) argument 194 if (ddrclock && si_mem_clock(sih) != ddrclock) { 195 ddrclock /= 1000000; 197 if (ddrclock == ddr_clock_pll_table[idx].clk) 202 *ddrclk = ddrclock; 261 void si_mem_setclock(si_t *sih, uint32 ddrclock) argument 269 if (ddr_clock_pll_table[idx].clk == ddrclock)
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H A D | aisdram-ca9.c | 42 extern void si_mem_setclock(si_t *sih, uint32 ddrclock); 1116 uint32 ddrclock = DDR_DEFAULT_CLOCK, clkval; local 1167 ddrclock = clkval; 1168 si_mem_setclock(sih, ddrclock); 1172 ddrclock = DDR3_MIN_CLOCK; 1173 si_mem_setclock(sih, ddrclock); 1233 if (ddrclock != DDR_DEFAULT_CLOCK) { 1259 status = ddr40_phy_init(ddrclock, params, ddrtype_ddr3, 1324 if (ddrclock == DDR_DEFAULT_CLOCK) { 1334 sdram_refresh = (0x1858 * ddrclock) / 80 [all...] |
H A D | hndmips.c | 819 uint32 ddrclock, uint32 axiclock) 866 ddrclock /= 1000000; 871 ((ddrclock == 0) || (ddrclock <= pll_table[idx][1])) && 917 BCMINITFN(mips_pmu_setclock)(si_t *sih, uint32 mipsclock, uint32 ddrclock, uint32 axiclock) argument 1051 return mips_pmu_setclock_4706(sih, mipsclock, ddrclock, axiclock); 1078 ddrclock /= 1000000; 1081 HNDMIPS_NONE(("Looking for %d/%d/%d\n", mipsclock, ddrclock, axiclock)); 1094 ((ddrclock == 0) || (ddrclock < 818 mips_pmu_setclock_4706(si_t *sih, uint32 mipsclock, uint32 ddrclock, uint32 axiclock) argument [all...] |
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