/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
H A D | amdgpu_dcn10_optc.c | 70 int vupdate_width) 77 optc1->vupdate_width = vupdate_width; 89 VUPDATE_WIDTH, optc1->vupdate_width); 150 int vupdate_width, 170 optc1->vupdate_width = vupdate_width; 278 vupdate_width); 65 optc1_program_global_sync( struct timing_generator *optc, int vready_offset, int vstartup_start, int vupdate_offset, int vupdate_width) argument 144 optc1_program_timing( struct timing_generator *optc, const struct dc_crtc_timing *dc_crtc_timing, int vready_offset, int vstartup_start, int vupdate_offset, int vupdate_width, const enum signal_type signal, bool use_vbios) argument
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H A D | dcn10_optc.h | 512 int vupdate_width; member in struct:optc 557 int vupdate_width, 577 int vupdate_width);
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H A D | amdgpu_dcn10_hubp.c | 136 if ((pipe_dest->vstartup_start - 2*(pipe_dest->vready_offset+pipe_dest->vupdate_width
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H A D | amdgpu_dcn10_hw_sequencer.c | 814 pipe_ctx->pipe_dlg_param.vupdate_width, 2468 pipe_ctx->pipe_dlg_param.vupdate_width);
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/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/ |
H A D | timing_generator.h | 146 int vupdate_width, 226 int vupdate_width);
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/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/ |
H A D | dce110_timing_generator.h | 265 int vupdate_width,
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H A D | amdgpu_dce110_timing_generator_v.c | 446 int vupdate_width, 441 dce110_timing_generator_v_program_timing(struct timing_generator *tg, const struct dc_crtc_timing *timing, int vready_offset, int vstartup_start, int vupdate_offset, int vupdate_width, const enum signal_type signal, bool use_vbios) argument
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H A D | amdgpu_dce110_timing_generator.c | 1968 int vupdate_width, 1963 dce110_tg_program_timing(struct timing_generator *tg, const struct dc_crtc_timing *timing, int vready_offset, int vstartup_start, int vupdate_offset, int vupdate_width, const enum signal_type signal, bool use_vbios) argument
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/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce80/ |
H A D | amdgpu_dce80_timing_generator.c | 118 int vupdate_width, 113 program_timing(struct timing_generator *tg, const struct dc_crtc_timing *timing, int vready_offset, int vstartup_start, int vupdate_offset, int vupdate_width, const enum signal_type signal, bool use_vbios) argument
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/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/ |
H A D | display_mode_structs.h | 327 unsigned int vupdate_width; member in struct:_vcs_dpi_display_pipe_dest_params_st
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H A D | amdgpu_dml1_display_rq_dlg_calc.c | 1049 unsigned int vupdate_width; local 1231 vupdate_width = e2e_pipe_param.pipe.dest.vupdate_width; 1301 line_setup = (double) (vupdate_offset + vupdate_width + vready_offset) / (double) htotal; 1327 DTRACE("DLG: %s: vupdate_width = %d", __func__, vupdate_width);
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/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/ |
H A D | amdgpu_display_rq_dlg_calc_20.c | 852 unsigned int vupdate_width; local 1005 vupdate_width = dst->vupdate_width; 1031 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal 1038 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal
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H A D | amdgpu_display_rq_dlg_calc_20v2.c | 852 unsigned int vupdate_width; local 1006 vupdate_width = dst->vupdate_width; 1032 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal 1039 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal
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/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/ |
H A D | amdgpu_display_rq_dlg_calc_21.c | 898 unsigned int vupdate_width; local 1045 vupdate_width = dst->vupdate_width; 1071 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal 1078 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal
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/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
H A D | amdgpu_dcn20_hwseq.c | 659 pipe_ctx->pipe_dlg_param.vupdate_width, 1217 || old_pipe->pipe_dlg_param.vupdate_width != new_pipe->pipe_dlg_param.vupdate_width) 1489 pipe_ctx->pipe_dlg_param.vupdate_width); 1729 pipe_ctx->pipe_dlg_param.vupdate_width);
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H A D | amdgpu_dcn20_hubp.c | 189 if ((pipe_dest->vstartup_start - (pipe_dest->vready_offset+pipe_dest->vupdate_width
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H A D | amdgpu_dcn20_resource.c | 2813 dst->vupdate_width = context->bw_ctx.dml.vba.VUpdateWidthPix[pipe_idx_unsplit]; 2828 dst_j->vupdate_width = context->bw_ctx.dml.vba.VUpdateWidthPix[pipe_idx_unsplit];
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/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/ |
H A D | amdgpu_dcn_calcs.c | 439 input->dest.vupdate_width = pipe->pipe_dlg_param.vupdate_width; 1183 pipe->pipe_dlg_param.vupdate_width = v->v_update_width_pix[input_idx]; 1224 hsplit_pipe->pipe_dlg_param.vupdate_width = v->v_update_width_pix[input_idx];
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/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/ |
H A D | amdgpu_dce120_timing_generator.c | 747 int vupdate_width, 742 dce120_tg_program_timing(struct timing_generator *tg, const struct dc_crtc_timing *timing, int vready_offset, int vstartup_start, int vupdate_offset, int vupdate_width, const enum signal_type signal, bool use_vbios) argument
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