/netbsd-current/sys/arch/x86/include/ |
H A D | pte.h | 57 * pl*_pi: index in the ptp page for a pde mapping a VA. 60 #define pl1_pi(VA) (((VA_SIGN_POS(VA)) & L1_MASK) >> L1_SHIFT) 61 #define pl2_pi(VA) (((VA_SIGN_POS(VA)) & L2_MASK) >> L2_SHIFT) 62 #define pl3_pi(VA) (((VA_SIGN_POS(VA)) & L3_MASK) >> L3_SHIFT) 63 #define pl4_pi(VA) (((VA_SIGN_POS(VA)) & L4_MASK) >> L4_SHIFT) 70 #define pl1_i(VA) (((VA_SIGN_PO [all...] |
/netbsd-current/sys/uvm/ |
H A D | uvm_map.h | 84 #define UVM_MAP_CLIP_START(MAP,ENTRY,VA) { \ 85 if ((VA) > (ENTRY)->start && (VA) < (ENTRY)->end) { \ 86 uvm_map_clip_start(MAP,ENTRY,VA); \ 97 #define UVM_MAP_CLIP_END(MAP,ENTRY,VA) { \ 98 if ((VA) > (ENTRY)->start && (VA) < (ENTRY)->end) { \ 99 uvm_map_clip_end(MAP,ENTRY,VA); \
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
H A D | MipsCallLowering.cpp | 27 bool MipsCallLowering::MipsHandler::assign(Register VReg, const CCValAssign &VA, argument 29 if (VA.isRegLoc()) { 30 assignValueToReg(VReg, VA, VT); 31 } else if (VA.isMemLoc()) { 32 assignValueToAddress(VReg, VA); 97 void assignValueToReg(Register ValVReg, const CCValAssign &VA, 100 Register getStackAddress(const CCValAssign &VA, 103 void assignValueToAddress(Register ValVReg, const CCValAssign &VA) override; 114 MachineInstrBuilder buildLoad(const DstOp &Res, const CCValAssign &VA) { argument 116 Register Addr = getStackAddress(VA, MM 137 assignValueToReg(Register ValVReg, const CCValAssign &VA, const EVT &VT) argument 171 getStackAddress(const CCValAssign &VA, MachineMemOperand *&MMO) argument 191 assignValueToAddress(Register ValVReg, const CCValAssign &VA) argument 239 assignValueToReg(Register ValVReg, const CCValAssign &VA, const EVT &VT) argument 259 getStackAddress(const CCValAssign &VA, MachineMemOperand *&MMO) argument 283 assignValueToAddress(Register ValVReg, const CCValAssign &VA) argument 291 extendRegister(Register ValReg, const CCValAssign &VA) argument 364 const CCValAssign &VA = ArgLocs[i]; local [all...] |
H A D | MipsCallLowering.h | 47 bool assign(Register VReg, const CCValAssign &VA, const EVT &VT); 49 virtual Register getStackAddress(const CCValAssign &VA, 52 virtual void assignValueToReg(Register ValVReg, const CCValAssign &VA, 56 const CCValAssign &VA) = 0;
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMCallLowering.cpp | 112 CCValAssign &VA) override { 113 assert(VA.isRegLoc() && "Value shouldn't be assigned to reg"); 114 assert(VA.getLocReg() == PhysReg && "Assigning to the wrong reg?"); 116 assert(VA.getValVT().getSizeInBits() <= 64 && "Unsupported value size"); 117 assert(VA.getLocVT().getSizeInBits() <= 64 && "Unsupported location size"); 119 Register ExtReg = extendRegister(ValVReg, VA); 125 MachinePointerInfo &MPO, CCValAssign &VA) override { 129 Register ExtReg = extendRegister(ValVReg, VA); 131 MPO, MachineMemOperand::MOStore, VA.getLocVT().getStoreSize(), 140 CCValAssign VA variable [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
H A D | ARCISelLowering.cpp | 262 CCValAssign &VA = ArgLocs[i]; local 266 switch (VA.getLocInfo()) { 272 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); 275 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); 278 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); 284 if (VA.isRegLoc()) { 285 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 287 assert(VA.isMemLoc() && "Must be register or memory argument."); 292 SDValue SOffset = DAG.getIntPtrConstant(VA.getLocMemOffset(), dl); 376 const CCValAssign &VA local 479 CCValAssign &VA = ArgLocs[i]; local 633 CCValAssign &VA = RVLocs[i]; local 661 CCValAssign &VA = RVLocs[i]; local [all...] |
/netbsd-current/external/gpl3/gdb.old/dist/gas/testsuite/gas/mips/ |
H A D | elf_mach_interaptiv-mr2.d | 21 Enhanced VA Scheme
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/netbsd-current/external/gpl3/gdb.old/dist/gdb/testsuite/gdb.cp/ |
H A D | virtfunc.cc | 24 // V : VA VB 32 class VA class 46 class V : public VA, public VB 112 VA va;
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/netbsd-current/external/gpl3/gdb/dist/gdb/testsuite/gdb.cp/ |
H A D | virtfunc.cc | 24 // V : VA VB 32 class VA class 46 class V : public VA, public VB 112 VA va;
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 232 CCValAssign &VA = RVLocs[i]; local 233 assert(VA.isRegLoc() && "Can only return in registers!"); 237 if (VA.needsCustom()) { 238 assert(VA.getLocVT() == MVT::v2i32); 249 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Part0, Flag); 251 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); 252 VA = RVLocs[++i]; // skip ahead to next loc 253 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Part1, 256 Chain = DAG.getCopyToReg(Chain, DL, VA 315 CCValAssign &VA = RVLocs[i]; local 400 CCValAssign &VA = ArgLocs[i]; local 592 CCValAssign &VA = ArgLocs[i]; local 786 CCValAssign &VA = ArgLocs[i]; local 1048 const CCValAssign &VA = ArgLocs[i]; local 1302 CCValAssign &VA = RVLocs[i]; local [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/include/llvm/DebugInfo/PDB/Native/ |
H A D | NativeFunctionSymbol.h | 37 findInlineFramesByVA(uint64_t VA) const override;
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H A D | NativeInlineSiteSymbol.h | 33 findInlineeLinesByVA(uint64_t VA, uint32_t Length) const override;
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
H A D | BPFISelLowering.cpp | 319 for (auto &VA : ArgLocs) { 320 if (VA.isRegLoc()) { 322 EVT RegVT = VA.getLocVT(); 334 RegInfo.addLiveIn(VA.getLocReg(), VReg); 339 if (VA.getLocInfo() == CCValAssign::SExt) 341 DAG.getValueType(VA.getValVT())); 342 else if (VA.getLocInfo() == CCValAssign::ZExt) 344 DAG.getValueType(VA.getValVT())); 346 if (VA.getLocInfo() != CCValAssign::Full) 347 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA 420 CCValAssign &VA = ArgLocs[i]; local 527 CCValAssign &VA = RVLocs[i]; local [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
H A D | CallLowering.cpp | 622 CCValAssign &VA = ArgLocs[j]; 623 assert(VA.getValNo() == i && "Location doesn't correspond to current arg"); 625 if (VA.needsCustom()) { 634 const MVT ValVT = VA.getValVT(); 635 const MVT LocVT = VA.getLocVT(); 676 VA = ArgLocs[j + Part]; 679 if (VA.isMemLoc() && !Flags.isByVal()) { 685 uint64_t MemSize = Handler.getStackValueStoreSize(DL, VA); 689 Handler.getStackAddress(MemSize, VA.getLocMemOffset(), MPO, Flags); 692 VA); [all...] |
/netbsd-current/sys/crypto/blake2/ |
H A D | blake2s.c | 60 #define BLAKE2S_G(VA, VB, VC, VD, X, Y) do \ 62 (VA) = (VA) + (VB) + (X); \ 63 (VD) = rotr32((VD) ^ (VA), 16); \ 66 (VA) = (VA) + (VB) + (Y); \ 67 (VD) = rotr32((VD) ^ (VA), 8); \
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64CallLowering.cpp | 69 static uint64_t getStackValueStoreSizeHack(const CCValAssign &VA) { argument 70 const MVT ValVT = VA.getValVT(); 72 : VA.getLocVT().getStoreSize(); 150 const CCValAssign &VA) const override { 151 return getStackValueStoreSizeHack(VA); 155 CCValAssign &VA) override { 157 IncomingValueHandler::assignValueToReg(ValVReg, PhysReg, VA); 161 MachinePointerInfo &MPO, CCValAssign &VA) override { 166 LLT ValTy(VA.getValVT()); 167 LLT LocTy(VA [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | CallLowering.h | 243 /// Return the in-memory size to write for the argument at \p VA. This may 249 const CCValAssign &VA) const; 255 CCValAssign &VA) = 0; 262 CCValAssign &VA) = 0; 270 CCValAssign &VA) { 271 assignValueToAddress(Arg.Regs[ValRegIndex], Addr, Size, MPO, VA); 291 uint64_t MemSize, CCValAssign &VA) const; 293 /// Extend a register to the location type given in VA, capped at extending 295 Register extendRegister(Register ValReg, CCValAssign &VA, 306 /// VA, returnin 267 assignValueToAddress(const ArgInfo &Arg, unsigned ValRegIndex, Register Addr, uint64_t Size, MachinePointerInfo &MPO, CCValAssign &VA) argument [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/DebugInfo/PDB/Native/ |
H A D | NativeFunctionSymbol.cpp | 93 NativeFunctionSymbol::findInlineFramesByVA(uint64_t VA) const { 95 if (!Session.moduleIndexForVA(VA, Modi)) 108 uint32_t CodeOffset = VA - getVirtualAddress();
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H A D | NativeInlineSiteSymbol.cpp | 129 NativeInlineSiteSymbol::findInlineeLinesByVA(uint64_t VA, argument 132 if (!Session.moduleIndexForVA(VA, Modi)) 151 getLineOffset(VA - ParentAddr, SrcLineOffset, SrcFileOffset); 170 Session.addressForVA(VA, LineSect, LineOff);
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H A D | NativeSession.cpp | 212 bool NativeSession::addressForVA(uint64_t VA, uint32_t &Section, argument 214 uint32_t RVA = VA - getLoadAddress(); 285 uint64_t VA = getVAFromSectOffset(Section, Offset); local 286 return Cache.findLineNumbersByVA(VA, Length); 394 bool NativeSession::moduleIndexForVA(uint64_t VA, uint16_t &ModuleIndex) const { argument 396 auto Iter = AddrToModuleIndex.find(VA); 429 uint64_t VA = Session.getVAFromSectOffset(C.ISect, C.Off); 430 uint64_t End = VA + C.Size; 434 if (!AddrMap.overlaps(VA, End)) 435 AddrMap.insert(VA, En [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
H A D | M68kISelLowering.cpp | 247 const CCValAssign &VA) { 316 if (VA.getLocVT().getSizeInBits() > Arg.getValueType().getSizeInBits()) { 380 const CCValAssign &VA, 389 if (VA.getLocInfo() == CCValAssign::Indirect) 390 ValVT = VA.getLocVT(); 392 ValVT = VA.getValVT(); 396 int Offset = VA.getLocMemOffset(); 397 if (VA.getValVT() == MVT::i8) { 399 } else if (VA.getValVT() == MVT::i16) { 428 if (VA 243 MatchingStackOffset(SDValue Arg, unsigned Offset, ISD::ArgFlagsTy Flags, MachineFrameInfo &MFI, const MachineRegisterInfo *MRI, const M68kInstrInfo *TII, const CCValAssign &VA) argument 377 LowerMemArgument(SDValue Chain, CallingConv::ID CallConv, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, const CCValAssign &VA, MachineFrameInfo &MFI, unsigned ArgIdx) const argument 446 LowerMemOpCallTo(SDValue Chain, SDValue StackPtr, SDValue Arg, const SDLoc &DL, SelectionDAG &DAG, const CCValAssign &VA, ISD::ArgFlagsTy Flags) const argument 591 CCValAssign &VA = ArgLocs[i]; local 670 CCValAssign &VA = ArgLocs[i]; local 845 CCValAssign &VA = RVLocs[i]; local 887 CCValAssign &VA = ArgLocs[i]; local 1031 CCValAssign &VA = RVLocs[i]; local 1245 CCValAssign &VA = ArgLocs[i]; local 1273 CCValAssign &VA = ArgLocs[i]; local [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86CallLowering.cpp | 108 CCValAssign &VA) override { 110 Register ExtReg = extendRegister(ValVReg, VA); 115 MachinePointerInfo &MPO, CCValAssign &VA) override { 117 Register ExtReg = extendRegister(ValVReg, VA); 120 VA.getLocVT().getStoreSize(), 190 MachinePointerInfo &MPO, CCValAssign &VA) override { 199 CCValAssign &VA) override { 201 IncomingValueHandler::assignValueToReg(ValVReg, PhysReg, VA);
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
H A D | LanaiISelLowering.cpp | 457 CCValAssign &VA = ArgLocs[i]; local 458 if (VA.isRegLoc()) { 460 EVT RegVT = VA.getLocVT(); 464 RegInfo.addLiveIn(VA.getLocReg(), VReg); 470 if (VA.getLocInfo() == CCValAssign::SExt) 472 DAG.getValueType(VA.getValVT())); 473 else if (VA.getLocInfo() == CCValAssign::ZExt) 475 DAG.getValueType(VA.getValVT())); 477 if (VA.getLocInfo() != CCValAssign::Full) 478 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA 554 CCValAssign &VA = RVLocs[i]; local 658 CCValAssign &VA = ArgLocs[I]; local [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/tools/llvm-pdbutil/ |
H A D | PrettyCompilandDumper.cpp | 194 uint64_t VA = Symbol.getVirtualAddress(); local 197 WithColor(Printer, PDB_ColorItem::Address).get() << format_hex(VA, 10); 202 << "[" << format_hex(VA, 10) << " - " 203 << format_hex(VA + Symbol.getLength(), 10) << "]";
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/DebugInfo/PDB/ |
H A D | PDBSymbol.cpp | 164 PDBSymbol::findInlineFramesByVA(uint64_t VA) const { 165 return RawSymbol->findInlineFramesByVA(VA); 174 PDBSymbol::findInlineeLinesByVA(uint64_t VA, uint32_t Length) const { argument 175 return RawSymbol->findInlineeLinesByVA(VA, Length);
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