Searched refs:CLR_V_CHG_NZ (Results 1 - 3 of 3) sorted by relevance
/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/sim/m68hc11/ |
H A D | gencode.c | 59 #define CLR_V_CHG_NZ 0,M6811_V_BIT,M6811_NZ_BIT macro 380 { "bset", "*,#->*", "or8", 3, 0x14, 6, 6, CLR_V_CHG_NZ }, 381 { "bclr", "*,#->*", "bclr8", 3, 0x15, 6, 6, CLR_V_CHG_NZ }, 382 { "tab", "a->b", "movtst8", 1, 0x16, 2, 2, CLR_V_CHG_NZ }, 383 { "tba", "b->a", "movtst8", 1, 0x17, 2, 2, CLR_V_CHG_NZ }, 390 { "bset", "(x),#->(x)","or8", 3, 0x1c, 7, 7, CLR_V_CHG_NZ }, 391 { "bclr", "(x),#->(x)","bclr8", 3, 0x1d, 7, 7, CLR_V_CHG_NZ }, 439 { "tsta", "a", "tst8", 1, 0x4d, 2, 2, CLR_V_CHG_NZ }, 450 { "tstb", "b", "tst8", 1, 0x5d, 2, 2, CLR_V_CHG_NZ }, 461 { "tst", "(x)", "tst8", 2, 0x6d, 6, 6, CLR_V_CHG_NZ }, [all...] |
/netbsd-6-1-5-RELEASE/external/gpl3/binutils/dist/opcodes/ |
H A D | m68hc11-opc.c | 56 #define CLR_V_CHG_NZ 0,M6811_V_BIT,M6811_NZ_BIT macro 174 { "anda", OP_IMM8, 2, 0x84, 1, 1, CLR_V_CHG_NZ, cpu6811|cpu6812 }, 175 { "anda", OP_DIRECT, 2, 0x94, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 }, 176 { "anda", OP_IND16, 3, 0xb4, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 }, 177 { "anda", OP_IX, 2, 0xa4, 4, 4, CLR_V_CHG_NZ, cpu6811 }, 178 { "anda", OP_IY | OP_PAGE2, 3, 0xa4, 5, 5, CLR_V_CHG_NZ, cpu6811 }, 179 { "anda", OP_IDX, 2, 0xa4, 3, 3, CLR_V_CHG_NZ, cpu6812 }, 180 { "anda", OP_IDX_1, 3, 0xa4, 3, 3, CLR_V_CHG_NZ, cpu6812 }, 181 { "anda", OP_IDX_2, 4, 0xa4, 4, 4, CLR_V_CHG_NZ, cpu6812 }, 182 { "anda", OP_D_IDX, 2, 0xa4, 6, 6, CLR_V_CHG_NZ, cpu681 [all...] |
/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/opcodes/ |
H A D | m68hc11-opc.c | 56 #define CLR_V_CHG_NZ 0,M6811_V_BIT,M6811_NZ_BIT macro 174 { "anda", OP_IMM8, 2, 0x84, 1, 1, CLR_V_CHG_NZ, cpu6811|cpu6812 }, 175 { "anda", OP_DIRECT, 2, 0x94, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 }, 176 { "anda", OP_IND16, 3, 0xb4, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 }, 177 { "anda", OP_IX, 2, 0xa4, 4, 4, CLR_V_CHG_NZ, cpu6811 }, 178 { "anda", OP_IY | OP_PAGE2, 3, 0xa4, 5, 5, CLR_V_CHG_NZ, cpu6811 }, 179 { "anda", OP_IDX, 2, 0xa4, 3, 3, CLR_V_CHG_NZ, cpu6812 }, 180 { "anda", OP_IDX_1, 3, 0xa4, 3, 3, CLR_V_CHG_NZ, cpu6812 }, 181 { "anda", OP_IDX_2, 4, 0xa4, 4, 4, CLR_V_CHG_NZ, cpu6812 }, 182 { "anda", OP_D_IDX, 2, 0xa4, 6, 6, CLR_V_CHG_NZ, cpu681 [all...] |
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