Searched refs:tile0 (Results 1 - 3 of 3) sorted by relevance
/linux-master/drivers/gpu/drm/xe/display/ |
H A D | xe_plane_initial.c | 57 struct xe_tile *tile0 = xe_device_get_root_tile(xe); local 70 u64 __iomem *gte = tile0->mem.ggtt->gsm; 89 if (phys_base >= tile0->mem.vram.usable_size) { 121 bo = xe_bo_create_pin_map_at(xe, tile0, NULL, size, phys_base,
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H A D | xe_fb_pin.c | 85 struct xe_tile *tile0 = xe_device_get_root_tile(xe); local 86 struct xe_ggtt *ggtt = tile0->mem.ggtt; 101 dpt = xe_bo_create_pin_map(xe, tile0, NULL, dpt_size, 107 dpt = xe_bo_create_pin_map(xe, tile0, NULL, dpt_size, 113 dpt = xe_bo_create_pin_map(xe, tile0, NULL, dpt_size,
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/linux-master/drivers/media/platform/verisilicon/ |
H A D | rockchip_vpu981_hw_av1_dec.c | 581 int tile0, tile1; local 585 for (tile0 = 0; tile0 < tile_info->tile_cols; tile0++) { 587 int tile_id = tile1 * tile_info->tile_cols + tile0; 591 u32 x0 = tile_info->width_in_sbs_minus_1[tile0] + 1;
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