| /linux-master/arch/arm/lib/ |
| H A D | setbit.S | 12 bitop _set_bit, orr
|
| H A D | io-readsb.S | 39 orr r3, r3, r4, put_byte_1
41 orr r3, r3, r5, put_byte_2
43 orr r3, r3, r6, put_byte_3
47 orr r4, r4, r5, put_byte_1
49 orr r4, r4, r6, put_byte_2
51 orr r4, r4, ip, put_byte_3
55 orr r5, r5, r6, put_byte_1
57 orr r5, r5, ip, put_byte_2
59 orr r5, r5, lr, put_byte_3
62 orr r
[all...] |
| H A D | io-writesw-armv3.S | 25 orr r3, r3, r3, lsl #16
44 orr ip, ip, ip, lsr #16
48 orr ip, ip, ip, lsl #16
52 orr ip, ip, ip, lsr #16
56 orr ip, ip, ip, lsl #16
60 orr ip, ip, ip, lsr #16
64 orr ip, ip, ip, lsl #16
68 orr ip, ip, ip, lsr #16
72 orr ip, ip, ip, lsl #16
87 orr i
[all...] |
| H A D | io-readsw-armv3.S | 36 orr ip, ip, ip, lsl #8
45 orr r3, r3, r4, lsl #16
50 orr r4, r4, r5, lsl #16
55 orr r5, r5, r6, lsl #16
60 orr r6, r6, lr, lsl #16
76 orr r3, r3, r4, lsl #16
81 orr r4, r4, r5, lsl #16
91 orr r3, r3, r4, lsl #16
|
| H A D | csumpartialcopygeneric.S | 177 orr r4, r4, r5, lspush #24
179 orr r5, r5, r6, lspush #24
181 orr r6, r6, r7, lspush #24
183 orr r7, r7, r8, lspush #24
198 orr r4, r4, r5, lspush #24
200 orr r5, r5, r6, lspush #24
208 orr r4, r4, r5, lspush #24
229 orr r4, r4, r5, lspush #16
231 orr r5, r5, r6, lspush #16
233 orr r
[all...] |
| H A D | io-writesl.S | 44 orr ip, ip, r3, lspush #16
52 orr ip, ip, r3, lspush #24
60 orr ip, ip, r3, lspush #8
|
| /linux-master/drivers/scsi/arm/ |
| H A D | acornscsi-io.S | 25 orr lr, lr, #0xff00
31 orr r3, r3, r4, lsl #16
33 orr r4, r4, r6, lsl #16
36 orr r5, r5, r6, lsl #16
38 orr r6, r6, ip, lsl #16
47 orr r3, r3, r4, lsl #16
49 orr r4, r4, r6, lsl #16
58 orr r3, r3, r4, lsl #16
83 orr r3, r3, r3, lsr #16
85 orr r
[all...] |
| /linux-master/arch/arm/mach-omap1/ |
| H A D | sram.S | 26 orr r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x00ff0000
27 orr r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x0000ff00
30 orr r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x00ff0000
31 orr r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x0000ff00
37 orr r0, r0, #1 << 4 @ set lock bit again
44 orr r4, r4, #0x00ff
|
| H A D | sleep.S | 73 orr r4, r4, #TCMIF_ASM_BASE & 0x00ff0000
74 orr r4, r4, #TCMIF_ASM_BASE & 0x0000ff00
88 orr r5, r5, #SELF_REFRESH_MODE & 0xff000000
89 orr r5, r5, #SELF_REFRESH_MODE & 0x000000ff
94 orr r5, r5, #IDLE_EMIFS_REQUEST & 0xff
99 orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x00ff0000
100 orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x0000ff00
104 orr r5, r5, #OMAP1510_IDLE_CLOCK_DOMAINS & 0xff00
109 orr r3, r3, #OMAP1510_DEEP_SLEEP_REQUEST & 0xff00
113 orr r
[all...] |
| /linux-master/arch/arm/boot/compressed/ |
| H A D | big-endian.S | 12 orr r0, r0, #(1 << 7) @ enable big endian mode
|
| /linux-master/arch/arm/include/debug/ |
| H A D | vt8500.S | 17 orr \rv, \rp, #DEBUG_LL_VIRT_BASE
18 orr \rp, \rp, #DEBUG_LL_PHYS_BASE
|
| H A D | dc21285.S | 23 orr \rv, \rp, #dc21285_high
24 orr \rp, \rp, #0x42000000
|
| /linux-master/arch/arm/mm/ |
| H A D | proc-v7-2level.S | 46 ALT_SMP(orr r0, r0, #TTB_FLAGS_SMP)
47 ALT_UP(orr r0, r0, #TTB_FLAGS_UP)
80 orr r3, r3, r2
81 orr r3, r3, #PTE_EXT_AP0 | 2
148 ALT_SMP(orr \ttbr0l, \ttbr0l, #TTB_FLAGS_SMP)
149 ALT_UP(orr \ttbr0l, \ttbr0l, #TTB_FLAGS_UP)
150 ALT_SMP(orr \ttbr1, \ttbr1, #TTB_FLAGS_SMP)
151 ALT_UP(orr \ttbr1, \ttbr1, #TTB_FLAGS_UP)
|
| H A D | proc-v7-3level.S | 49 orr rpgdh, rpgdh, r2, lsl #(48 - 32) @ upper 32-bits of pgd
121 ALT_SMP(orr \tmp, \tmp, #TTB_FLAGS_SMP)
122 ALT_UP(orr \tmp, \tmp, #TTB_FLAGS_UP)
123 ALT_SMP(orr \tmp, \tmp, #TTB_FLAGS_SMP << 16)
124 ALT_UP(orr \tmp, \tmp, #TTB_FLAGS_UP << 16)
|
| /linux-master/arch/arm/mach-sunxi/ |
| H A D | headsmp.S | 38 orr r1, r1, #(0x1 << 31)
44 orr r1, r1, #(0x1 << 26)
46 orr r1, r1, #(0x1<<3)
52 orr r1, r1, #(0x3 << 0)
|
| /linux-master/arch/arm/mach-rpc/ |
| H A D | fiq.S | 14 orr r12, r12, #ioc_base_low
|
| /linux-master/arch/arm64/lib/ |
| H A D | strlen.S | 97 orr tmp2, data1, REP8_7f
99 orr tmp4, data2, REP8_7f
126 orr tmp2, tmp1, tmp3
132 orr tmp2, tmp1, tmp3
138 orr tmp2, data1, REP8_7f
139 orr tmp4, data2, REP8_7f
155 orr tmp2, data1, REP8_7f
171 orr tmp2, data1, REP8_7f
173 orr tmp4, data2, REP8_7f
180 orr tmp
[all...] |
| H A D | strcmp.S | 73 orr tmp, tmp, REP8_7f
76 orr tmp, data1, REP8_7f
85 orr syndrome, diff, has_nul
117 orr data1, data1, tmp
118 orr data2, data2, tmp
142 orr data3, data3, tmp
144 orr tmp, data3, REP8_7f
159 orr tmp, data3, REP8_7f
170 orr syndrome, diff, tmp
182 orr syndrom
[all...] |
| H A D | strncmp.S | 80 orr tmp2, data1, #REP8_7f
90 orr syndrome, diff, has_nul
121 orr has_nul, has_nul, mask
139 orr tmp2, tmp3, #REP8_7f
142 orr syndrome, diff, has_nul
174 orr data1, data1, tmp2
175 orr data2, data2, tmp2
249 orr data2, data2, tmp1 /* 8 bytes from SRC2 combined from two regs.*/
252 orr tmp3, data1, #REP8_7f
255 orr tmp
[all...] |
| H A D | strnlen.S | 75 orr tmp2, data1, #REP8_7f
77 orr tmp4, data2, #REP8_7f
81 orr tmp1, has_nul1, has_nul2
107 CPU_BE( orr tmp2, data2, #REP8_7f )
149 orr data1, data1, tmp2
150 orr data2a, data2, tmp2
|
| /linux-master/arch/arm/mach-at91/ |
| H A D | pm_suspend.S | 102 orr r9, r9, #AT91_SFRBU_25LDOCR_LP
108 orr r9, r9, r10
115 orr \reg, \reg, #0x200000
166 orr tmp1, tmp1, #UDDRC_PWRCTL_SELFREF_SW
187 orr tmp1, tmp1, #DDR3PHY_DXDLLCR_DLLDIS
191 orr tmp1, tmp1, #DDR3PHY_DXDLLCR_DLLDIS
197 orr tmp1, tmp1, #DDR3PHY_DXCCR_DXPDR
202 orr tmp1, tmp1, #DDR3PHY_ACIORC_ACPDD
203 orr tmp1, tmp1, #DDR3PHY_ACIOCR_CKPDD_CK0
204 orr tmp
[all...] |
| /linux-master/arch/arm/mach-davinci/ |
| H A D | sleep.S | 55 orr ip, ip, #DDR2_LPMODEN_BIT
59 orr ip, ip, #DDR2_MCLKSTOPEN_BIT
90 orr ip, ip, #PLLCTL_PLLPWRDN
95 orr ip, ip, #DEEPSLEEP_SLEEPENABLE_BIT
124 orr ip, ip, #PLLCTL_PLLRST
135 orr ip, ip, #PLLCTL_PLLEN
141 orr ip, ip, #PLLDIV_EN
180 orr ip, ip, r0
185 orr ip, ip, #0x1
|
| /linux-master/arch/arm64/include/asm/ |
| H A D | el2_setup.h | 83 orr x2, x2, x0 // If we don't have VHE, then
96 orr x2, x2, x0 // allow the EL1&0 translation
124 orr x0, x0, #ICC_SRE_EL2_SRE // Set ICC_SRE_EL2.SRE==1
125 orr x0, x0, #ICC_SRE_EL2_ENABLE // Set ICC_SRE_EL2.Enable==1
170 orr x0, x0, #(1 << 62)
182 orr x0, x0, #HFGxTR_EL2_nSMPRI_EL1_MASK
183 orr x0, x0, #HFGxTR_EL2_nTPIDR2_EL0_MASK
191 orr x0, x0, #HFGxTR_EL2_nPIR_EL1
192 orr x0, x0, #HFGxTR_EL2_nPIRE0_EL1
280 orr x
[all...] |
| /linux-master/arch/arm/common/ |
| H A D | secure_cntvoff.S | 22 orr r0, r1, #1
|
| /linux-master/arch/arm/mach-pxa/ |
| H A D | standby.S | 74 orr r0, r0, #PXA3_RCOMP_SWEVAL
81 orr r0, r0, #PXA3_DMCIER_EDLP
86 orr r0, r0, #PXA3_DDR_HCAL_HCEN | PXA3_DDR_HCAL_HCPROG
94 orr r0, r0, #PXA3_MDCNFG_DMCEN
101 orr r0, r0, #2 @ HCRNG
|