Searched refs:guc (Results 1 - 25 of 83) sorted by relevance

1234

/linux-master/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc_rc.h11 void intel_guc_rc_init_early(struct intel_guc *guc);
13 static inline bool intel_guc_rc_is_supported(struct intel_guc *guc) argument
15 return guc->rc_supported;
18 static inline bool intel_guc_rc_is_wanted(struct intel_guc *guc) argument
20 return guc->submission_selected && intel_guc_rc_is_supported(guc);
23 static inline bool intel_guc_rc_is_used(struct intel_guc *guc) argument
25 return intel_guc_submission_is_used(guc) && intel_guc_rc_is_wanted(guc);
28 int intel_guc_rc_enable(struct intel_guc *guc);
[all...]
H A Dintel_guc_rc.c13 static bool __guc_rc_supported(struct intel_guc *guc) argument
16 return guc->submission_supported &&
17 GRAPHICS_VER(guc_to_i915(guc)) >= 12;
20 static bool __guc_rc_selected(struct intel_guc *guc) argument
22 if (!intel_guc_rc_is_supported(guc))
25 return guc->submission_selected;
28 void intel_guc_rc_init_early(struct intel_guc *guc) argument
30 guc->rc_supported = __guc_rc_supported(guc);
31 guc
34 guc_action_control_gucrc(struct intel_guc *guc, bool enable) argument
50 __guc_rc_control(struct intel_guc *guc, bool enable) argument
73 intel_guc_rc_enable(struct intel_guc *guc) argument
78 intel_guc_rc_disable(struct intel_guc *guc) argument
[all...]
H A Dintel_guc_debugfs.c19 struct intel_guc *guc = m->private; local
22 if (!intel_guc_is_supported(guc))
25 intel_guc_load_status(guc, &p);
27 intel_guc_log_info(&guc->log, &p);
29 if (!intel_guc_submission_is_used(guc))
32 intel_guc_ct_print_info(&guc->ct, &p);
33 intel_guc_submission_print_info(guc, &p);
34 intel_guc_ads_print_policy_info(guc, &p);
42 struct intel_guc *guc = m->private; local
45 if (!intel_guc_submission_is_used(guc))
56 struct intel_guc *guc = m->private; local
69 struct intel_guc *guc = (struct intel_guc *)data; local
76 struct intel_guc *guc = data; local
88 struct intel_guc *guc = data; local
104 struct intel_guc *guc = data; local
115 struct intel_guc *guc = data; local
132 intel_guc_debugfs_register(struct intel_guc *guc, struct dentry *root) argument
[all...]
H A Dintel_guc_ads.h16 int intel_guc_ads_create(struct intel_guc *guc);
17 void intel_guc_ads_destroy(struct intel_guc *guc);
18 void intel_guc_ads_init_late(struct intel_guc *guc);
19 void intel_guc_ads_reset(struct intel_guc *guc);
20 void intel_guc_ads_print_policy_info(struct intel_guc *guc,
23 u32 intel_guc_engine_usage_offset(struct intel_guc *guc);
H A Dintel_guc_submission.h16 void intel_guc_submission_init_early(struct intel_guc *guc);
17 int intel_guc_submission_init(struct intel_guc *guc);
18 int intel_guc_submission_enable(struct intel_guc *guc);
19 void intel_guc_submission_disable(struct intel_guc *guc);
20 void intel_guc_submission_fini(struct intel_guc *guc);
21 int intel_guc_preempt_work_create(struct intel_guc *guc);
22 void intel_guc_preempt_work_destroy(struct intel_guc *guc);
24 void intel_guc_submission_print_info(struct intel_guc *guc,
26 void intel_guc_submission_print_context_info(struct intel_guc *guc,
36 int intel_guc_wait_for_pending_msg(struct intel_guc *guc,
43 intel_guc_submission_is_supported(struct intel_guc *guc) argument
48 intel_guc_submission_is_wanted(struct intel_guc *guc) argument
53 intel_guc_submission_is_used(struct intel_guc *guc) argument
[all...]
H A Dintel_guc.h97 void (*reset)(struct intel_guc *guc);
98 void (*enable)(struct intel_guc *guc);
99 void (*disable)(struct intel_guc *guc);
298 * @last_dead_guc_jiffies: timestamp of previous 'dead guc' occurrance
327 #define GUC_SUBMIT_VER(guc) MAKE_GUC_VER_STRUCT((guc)->submission_version)
328 #define GUC_FIRMWARE_VER(guc) MAKE_GUC_VER_STRUCT((guc)->fw.file_selected.ver)
336 inline int intel_guc_send(struct intel_guc *guc, const u32 *action, u32 len) argument
338 return intel_guc_ct_send(&guc
342 intel_guc_send_nb(struct intel_guc *guc, const u32 *action, u32 len, u32 g2h_len_dw) argument
350 intel_guc_send_and_receive(struct intel_guc *guc, const u32 *action, u32 len, u32 *response_buf, u32 response_buf_size) argument
357 intel_guc_send_busy_loop(struct intel_guc *guc, const u32 *action, u32 len, u32 g2h_len_dw, bool loop) argument
394 intel_guc_to_host_event_handler(struct intel_guc *guc) argument
416 intel_guc_ggtt_offset(struct intel_guc *guc, struct i915_vma *vma) argument
447 intel_guc_is_supported(struct intel_guc *guc) argument
452 intel_guc_is_wanted(struct intel_guc *guc) argument
457 intel_guc_is_used(struct intel_guc *guc) argument
463 intel_guc_is_fw_running(struct intel_guc *guc) argument
468 intel_guc_is_ready(struct intel_guc *guc) argument
473 intel_guc_reset_interrupts(struct intel_guc *guc) argument
478 intel_guc_enable_interrupts(struct intel_guc *guc) argument
483 intel_guc_disable_interrupts(struct intel_guc *guc) argument
488 intel_guc_sanitize(struct intel_guc *guc) argument
498 intel_guc_enable_msg(struct intel_guc *guc, u32 mask) argument
505 intel_guc_disable_msg(struct intel_guc *guc, u32 mask) argument
[all...]
H A Dintel_guc_fw.h11 int intel_guc_fw_upload(struct intel_guc *guc);
H A Dintel_guc_ads.c84 static u32 guc_ads_regset_size(struct intel_guc *guc) argument
86 GEM_BUG_ON(!guc->ads_regset_size);
87 return guc->ads_regset_size;
90 static u32 guc_ads_golden_ctxt_size(struct intel_guc *guc) argument
92 return PAGE_ALIGN(guc->ads_golden_ctxt_size);
95 static u32 guc_ads_waklv_size(struct intel_guc *guc) argument
97 return PAGE_ALIGN(guc->ads_waklv_size);
100 static u32 guc_ads_capture_size(struct intel_guc *guc) argument
102 return PAGE_ALIGN(guc->ads_capture_size);
105 static u32 guc_ads_private_data_size(struct intel_guc *guc) argument
110 guc_ads_regset_offset(struct intel_guc *guc) argument
115 guc_ads_golden_ctxt_offset(struct intel_guc *guc) argument
125 guc_ads_waklv_offset(struct intel_guc *guc) argument
135 guc_ads_capture_offset(struct intel_guc *guc) argument
145 guc_ads_private_data_offset(struct intel_guc *guc) argument
155 guc_ads_blob_size(struct intel_guc *guc) argument
161 guc_policies_init(struct intel_guc *guc) argument
179 intel_guc_ads_print_policy_info(struct intel_guc *guc, struct drm_printer *dp) argument
194 guc_action_policies_update(struct intel_guc *guc, u32 policy_offset) argument
204 intel_guc_global_policies_update(struct intel_guc *guc) argument
433 guc_mmio_reg_state_create(struct intel_guc *guc) argument
465 guc_mmio_reg_state_init(struct intel_guc *guc) argument
529 guc_prep_golden_context(struct intel_guc *guc) argument
618 guc_init_golden_context(struct intel_guc *guc) argument
704 guc_capture_prep_lists(struct intel_guc *guc) argument
819 guc_waklv_ra_mode(struct intel_guc *guc, u32 offset, u32 remain) argument
837 guc_waklv_init(struct intel_guc *guc) argument
871 guc_prep_waklv(struct intel_guc *guc) argument
877 __guc_ads_init(struct intel_guc *guc) argument
941 intel_guc_ads_create(struct intel_guc *guc) argument
994 intel_guc_ads_init_late(struct intel_guc *guc) argument
1006 intel_guc_ads_destroy(struct intel_guc *guc) argument
1013 guc_ads_private_data_reset(struct intel_guc *guc) argument
1033 intel_guc_ads_reset(struct intel_guc *guc) argument
1043 intel_guc_engine_usage_offset(struct intel_guc *guc) argument
1051 struct intel_guc *guc = gt_to_guc(engine->gt); local
[all...]
H A Dintel_guc_debugfs.h12 void intel_guc_debugfs_register(struct intel_guc *guc, struct dentry *root);
H A Dintel_guc.c42 void intel_guc_notify(struct intel_guc *guc) argument
44 struct intel_gt *gt = guc_to_gt(guc);
52 intel_uncore_write(gt->uncore, guc->notify_reg, GUC_SEND_TRIGGER);
55 static inline i915_reg_t guc_send_reg(struct intel_guc *guc, u32 i) argument
57 GEM_BUG_ON(!guc->send_regs.base);
58 GEM_BUG_ON(!guc->send_regs.count);
59 GEM_BUG_ON(i >= guc->send_regs.count);
61 return _MMIO(guc->send_regs.base + 4 * i);
64 void intel_guc_init_send_regs(struct intel_guc *guc) argument
66 struct intel_gt *gt = guc_to_gt(guc);
81 gen9_reset_guc_interrupts(struct intel_guc *guc) argument
92 gen9_enable_guc_interrupts(struct intel_guc *guc) argument
107 gen9_disable_guc_interrupts(struct intel_guc *guc) argument
132 gen11_reset_guc_interrupts(struct intel_guc *guc) argument
141 gen11_enable_guc_interrupts(struct intel_guc *guc) argument
152 gen11_disable_guc_interrupts(struct intel_guc *guc) argument
164 struct intel_guc *guc = container_of(w, struct intel_guc, dead_guc_worker); local
177 intel_guc_init_early(struct intel_guc *guc) argument
221 intel_guc_init_late(struct intel_guc *guc) argument
226 guc_ctl_debug_flags(struct intel_guc *guc) argument
240 guc_ctl_feature_flags(struct intel_guc *guc) argument
253 guc_ctl_log_params_flags(struct intel_guc *guc) argument
274 guc_ctl_ads_flags(struct intel_guc *guc) argument
282 guc_ctl_wa_flags(struct intel_guc *guc) argument
333 guc_ctl_devid(struct intel_guc *guc) argument
345 guc_init_params(struct intel_guc *guc) argument
368 intel_guc_write_params(struct intel_guc *guc) argument
388 intel_guc_dump_time_info(struct intel_guc *guc, struct drm_printer *p) argument
405 intel_guc_init(struct intel_guc *guc) argument
472 intel_guc_fini(struct intel_guc *guc) argument
496 intel_guc_send_mmio(struct intel_guc *guc, const u32 *request, u32 len, u32 *response_buf, u32 response_buf_size) argument
603 intel_guc_crash_process_msg(struct intel_guc *guc, u32 action) argument
617 intel_guc_to_host_process_recv_msg(struct intel_guc *guc, const u32 *payload, u32 len) argument
650 intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset) argument
664 intel_guc_suspend(struct intel_guc *guc) argument
704 intel_guc_resume(struct intel_guc *guc) argument
762 intel_guc_allocate_vma(struct intel_guc *guc, u32 size) argument
819 intel_guc_allocate_and_map_vma(struct intel_guc *guc, u32 size, struct i915_vma **out_vma, void **out_vaddr) argument
843 __guc_action_self_cfg(struct intel_guc *guc, u16 key, u16 len, u64 value) argument
872 __guc_self_cfg(struct intel_guc *guc, u16 key, u16 len, u64 value) argument
882 intel_guc_self_cfg32(struct intel_guc *guc, u16 key, u32 value) argument
887 intel_guc_self_cfg64(struct intel_guc *guc, u16 key, u64 value) argument
899 intel_guc_load_status(struct intel_guc *guc, struct drm_printer *p) argument
936 intel_guc_write_barrier(struct intel_guc *guc) argument
[all...]
H A Dintel_uc.c86 gt_dbg(gt, "enable_guc=%d (guc:%s submission:%s huc:%s slpc:%s)\n",
119 intel_guc_init_early(&uc->guc);
133 intel_guc_init_late(&uc->guc);
150 intel_guc_init_send_regs(&uc->guc);
155 struct intel_guc *guc = &uc->guc; local
157 if (guc->log.vma && !uc->load_err_log)
158 uc->load_err_log = i915_gem_object_get(guc->log.vma->obj);
179 * communication channel with guc is turned off at this point, we can save the
182 static void guc_clear_mmio_msg(struct intel_guc *guc) argument
187 guc_get_mmio_msg(struct intel_guc *guc) argument
206 guc_handle_mmio_msg(struct intel_guc *guc) argument
219 guc_enable_communication(struct intel_guc *guc) argument
251 guc_disable_communication(struct intel_guc *guc) argument
316 struct intel_guc *guc = &uc->guc; local
350 struct intel_guc *guc = &uc->guc; local
456 struct intel_guc *guc = &uc->guc; local
585 struct intel_guc *guc = &uc->guc; local
604 struct intel_guc *guc = &uc->guc; local
625 struct intel_guc *guc = &uc->guc; local
634 struct intel_guc *guc = &uc->guc; local
649 struct intel_guc *guc = &uc->guc; local
658 struct intel_guc *guc = &uc->guc; local
679 struct intel_guc *guc = &uc->guc; local
710 struct intel_guc *guc = &uc->guc; local
[all...]
H A Dintel_guc_capture.h26 void intel_guc_capture_process(struct intel_guc *guc);
27 int intel_guc_capture_getlist(struct intel_guc *guc, u32 owner, u32 type, u32 classid,
29 int intel_guc_capture_getlistsize(struct intel_guc *guc, u32 owner, u32 type, u32 classid,
31 int intel_guc_capture_getnullheader(struct intel_guc *guc, void **outptr, size_t *size);
32 void intel_guc_capture_destroy(struct intel_guc *guc);
33 int intel_guc_capture_init(struct intel_guc *guc);
H A Dintel_guc_hwconfig.c34 static int __guc_action_get_hwconfig(struct intel_guc *guc, argument
45 ret = intel_guc_send_mmio(guc, action, ARRAY_SIZE(action), NULL, 0);
52 static int guc_hwconfig_discover_size(struct intel_guc *guc, struct intel_hwconfig *hwconfig) argument
60 ret = __guc_action_get_hwconfig(guc, 0, 0);
71 static int guc_hwconfig_fill_buffer(struct intel_guc *guc, struct intel_hwconfig *hwconfig) argument
80 ret = intel_guc_allocate_and_map_vma(guc, hwconfig->size, &vma, &vaddr);
84 ggtt_offset = intel_guc_ggtt_offset(guc, vma);
86 ret = __guc_action_get_hwconfig(guc, ggtt_offset, hwconfig->size);
114 struct intel_guc *guc = gt_to_guc(gt); local
120 ret = guc_hwconfig_discover_size(guc, hwconfi
[all...]
/linux-master/drivers/gpu/drm/xe/
H A Dxe_guc.h16 void xe_guc_comm_init_early(struct xe_guc *guc);
17 int xe_guc_init(struct xe_guc *guc);
18 int xe_guc_init_post_hwconfig(struct xe_guc *guc);
19 int xe_guc_post_load_init(struct xe_guc *guc);
20 int xe_guc_reset(struct xe_guc *guc);
21 int xe_guc_upload(struct xe_guc *guc);
22 int xe_guc_min_load_for_hwconfig(struct xe_guc *guc);
23 int xe_guc_enable_communication(struct xe_guc *guc);
24 int xe_guc_suspend(struct xe_guc *guc);
25 void xe_guc_notify(struct xe_guc *guc);
63 guc_to_gt(struct xe_guc *guc) argument
68 guc_to_xe(struct xe_guc *guc) argument
[all...]
H A Dxe_guc_hwconfig.h13 int xe_guc_hwconfig_init(struct xe_guc *guc);
14 u32 xe_guc_hwconfig_size(struct xe_guc *guc);
15 void xe_guc_hwconfig_copy(struct xe_guc *guc, void *dst);
H A Dxe_guc_hwconfig.c17 static int send_get_hwconfig(struct xe_guc *guc, u64 ggtt_addr, u32 size) argument
26 return xe_guc_mmio_send(guc, action, ARRAY_SIZE(action));
29 static int guc_hwconfig_size(struct xe_guc *guc, u32 *size) argument
31 int ret = send_get_hwconfig(guc, 0, 0);
40 static int guc_hwconfig_copy(struct xe_guc *guc) argument
42 int ret = send_get_hwconfig(guc, xe_bo_ggtt_addr(guc->hwconfig.bo),
43 guc->hwconfig.size);
51 int xe_guc_hwconfig_init(struct xe_guc *guc) argument
53 struct xe_device *xe = guc_to_xe(guc);
92 xe_guc_hwconfig_size(struct xe_guc *guc) argument
97 xe_guc_hwconfig_copy(struct xe_guc *guc, void *dst) argument
[all...]
H A Dxe_guc_submit.h15 int xe_guc_submit_init(struct xe_guc *guc);
17 int xe_guc_submit_reset_prepare(struct xe_guc *guc);
18 void xe_guc_submit_reset_wait(struct xe_guc *guc);
19 int xe_guc_submit_stop(struct xe_guc *guc);
20 int xe_guc_submit_start(struct xe_guc *guc);
22 int xe_guc_sched_done_handler(struct xe_guc *guc, u32 *msg, u32 len);
23 int xe_guc_deregister_done_handler(struct xe_guc *guc, u32 *msg, u32 len);
24 int xe_guc_exec_queue_reset_handler(struct xe_guc *guc, u32 *msg, u32 len);
25 int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg,
27 int xe_guc_exec_queue_reset_failure_handler(struct xe_guc *guc, u3
[all...]
H A Dxe_guc_debugfs.h12 void xe_guc_debugfs_register(struct xe_guc *guc, struct dentry *parent);
H A Dxe_guc.c38 static u32 guc_bo_ggtt_addr(struct xe_guc *guc, argument
41 struct xe_device *xe = guc_to_xe(guc);
45 xe_assert(xe, addr >= xe_wopcm_size(guc_to_xe(guc)));
52 static u32 guc_ctl_debug_flags(struct xe_guc *guc) argument
54 u32 level = xe_guc_log_get_level(&guc->log);
66 static u32 guc_ctl_feature_flags(struct xe_guc *guc) argument
70 if (!guc_to_xe(guc)->info.skip_guc_pc)
76 static u32 guc_ctl_log_params_flags(struct xe_guc *guc) argument
78 u32 offset = guc_bo_ggtt_addr(guc, guc
129 guc_ctl_ads_flags(struct xe_guc *guc) argument
137 guc_ctl_wa_flags(struct xe_guc *guc) argument
176 guc_ctl_devid(struct xe_guc *guc) argument
183 guc_print_params(struct xe_guc *guc) argument
196 guc_init_params(struct xe_guc *guc) argument
210 guc_init_params_post_hwconfig(struct xe_guc *guc) argument
229 guc_write_params(struct xe_guc *guc) argument
244 struct xe_guc *guc = arg; local
258 xe_guc_comm_init_early(struct xe_guc *guc) argument
268 xe_guc_realloc_post_hwconfig(struct xe_guc *guc) argument
296 xe_guc_init(struct xe_guc *guc) argument
349 xe_guc_init_post_hwconfig(struct xe_guc *guc) argument
366 xe_guc_post_load_init(struct xe_guc *guc) argument
374 xe_guc_reset(struct xe_guc *guc) argument
405 guc_prepare_xfer(struct xe_guc *guc) argument
430 guc_xfer_rsa(struct xe_guc *guc) argument
454 guc_wait_ucode(struct xe_guc *guc) argument
508 __xe_guc_upload(struct xe_guc *guc) argument
558 xe_guc_min_load_for_hwconfig(struct xe_guc *guc) argument
582 xe_guc_upload(struct xe_guc *guc) argument
589 guc_handle_mmio_msg(struct xe_guc *guc) argument
611 guc_enable_irq(struct xe_guc *guc) argument
629 xe_guc_enable_communication(struct xe_guc *guc) argument
657 xe_guc_suspend(struct xe_guc *guc) argument
675 xe_guc_notify(struct xe_guc *guc) argument
688 xe_guc_auth_huc(struct xe_guc *guc, u32 rsa_addr) argument
698 xe_guc_mmio_send_recv(struct xe_guc *guc, const u32 *request, u32 len, u32 *response_buf) argument
818 xe_guc_mmio_send(struct xe_guc *guc, const u32 *request, u32 len) argument
823 guc_self_cfg(struct xe_guc *guc, u16 key, u16 len, u64 val) argument
856 xe_guc_self_cfg32(struct xe_guc *guc, u16 key, u32 val) argument
861 xe_guc_self_cfg64(struct xe_guc *guc, u16 key, u64 val) argument
866 xe_guc_irq_handler(struct xe_guc *guc, const u16 iir) argument
872 xe_guc_sanitize(struct xe_guc *guc) argument
879 xe_guc_reset_prepare(struct xe_guc *guc) argument
884 xe_guc_reset_wait(struct xe_guc *guc) argument
889 xe_guc_stop_prepare(struct xe_guc *guc) argument
894 xe_guc_stop(struct xe_guc *guc) argument
907 xe_guc_start(struct xe_guc *guc) argument
917 xe_guc_print_info(struct xe_guc *guc, struct drm_printer *p) argument
965 xe_guc_in_reset(struct xe_guc *guc) argument
[all...]
H A Dxe_guc_submit.c46 return &q->gt->uc.guc;
65 return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_REGISTERED;
70 atomic_or(EXEC_QUEUE_STATE_REGISTERED, &q->guc->state);
75 atomic_and(~EXEC_QUEUE_STATE_REGISTERED, &q->guc->state);
80 return atomic_read(&q->guc->state) & ENGINE_STATE_ENABLED;
85 atomic_or(ENGINE_STATE_ENABLED, &q->guc->state);
90 atomic_and(~ENGINE_STATE_ENABLED, &q->guc->state);
95 return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_PENDING_ENABLE;
100 atomic_or(EXEC_QUEUE_STATE_PENDING_ENABLE, &q->guc->state);
105 atomic_and(~EXEC_QUEUE_STATE_PENDING_ENABLE, &q->guc
184 alloc_submit_wq(struct xe_guc *guc) argument
204 free_submit_wq(struct xe_guc *guc) argument
212 get_submit_wq(struct xe_guc *guc) argument
219 alloc_submit_wq(struct xe_guc *guc) argument
224 free_submit_wq(struct xe_guc *guc) argument
229 get_submit_wq(struct xe_guc *guc) argument
237 struct xe_guc *guc = arg; local
245 primelockdep(struct xe_guc *guc) argument
259 xe_guc_submit_init(struct xe_guc *guc) argument
289 __release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q, u32 xa_count) argument
302 alloc_guc_id(struct xe_guc *guc, struct xe_exec_queue *q) argument
341 release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q) argument
396 init_policies(struct xe_guc *guc, struct xe_exec_queue *q) argument
415 set_min_preemption_timeout(struct xe_guc *guc, struct xe_exec_queue *q) argument
433 __register_mlrc_engine(struct xe_guc *guc, struct xe_exec_queue *q, struct guc_ctxt_registration_info *info) argument
472 __register_engine(struct xe_guc *guc, struct guc_ctxt_registration_info *info) argument
495 struct xe_guc *guc = exec_queue_to_guc(q); local
554 struct xe_guc *guc = exec_queue_to_guc(q); local
582 struct xe_guc *guc = exec_queue_to_guc(q); local
602 struct xe_guc *guc = exec_queue_to_guc(q); local
647 struct xe_guc *guc = exec_queue_to_guc(q); local
702 struct xe_guc *guc = exec_queue_to_guc(q); local
737 guc_read_stopped(struct xe_guc *guc) argument
749 disable_scheduling_deregister(struct xe_guc *guc, struct xe_exec_queue *q) argument
789 struct xe_guc *guc = exec_queue_to_guc(q); local
835 struct xe_guc *guc = exec_queue_to_guc(q); local
852 struct xe_guc *guc = exec_queue_to_guc(q); local
874 struct xe_guc *guc = exec_queue_to_guc(q); local
950 struct xe_guc *guc = exec_queue_to_guc(q); local
1012 struct xe_guc *guc = exec_queue_to_guc(q); local
1037 __guc_exec_queue_fini(struct xe_guc *guc, struct xe_exec_queue *q) argument
1052 struct xe_guc *guc = exec_queue_to_guc(q); local
1072 struct xe_guc *guc = exec_queue_to_guc(q); local
1081 struct xe_guc *guc = exec_queue_to_guc(q); local
1096 struct xe_guc *guc = exec_queue_to_guc(q); local
1131 struct xe_guc *guc = exec_queue_to_guc(q); local
1189 struct xe_guc *guc = exec_queue_to_guc(q); local
1353 struct xe_guc *guc = exec_queue_to_guc(q); local
1362 struct xe_guc *guc = exec_queue_to_guc(q); local
1394 guc_exec_queue_stop(struct xe_guc *guc, struct xe_exec_queue *q) argument
1438 xe_guc_submit_reset_prepare(struct xe_guc *guc) argument
1456 xe_guc_submit_reset_wait(struct xe_guc *guc) argument
1461 xe_guc_submit_stop(struct xe_guc *guc) argument
1500 xe_guc_submit_start(struct xe_guc *guc) argument
1520 g2h_exec_queue_lookup(struct xe_guc *guc, u32 guc_id) argument
1542 deregister_exec_queue(struct xe_guc *guc, struct xe_exec_queue *q) argument
1554 handle_sched_done(struct xe_guc *guc, struct xe_exec_queue *q) argument
1577 xe_guc_sched_done_handler(struct xe_guc *guc, u32 *msg, u32 len) argument
1604 handle_deregister_done(struct xe_guc *guc, struct xe_exec_queue *q) argument
1616 xe_guc_deregister_done_handler(struct xe_guc *guc, u32 *msg, u32 len) argument
1643 xe_guc_exec_queue_reset_handler(struct xe_guc *guc, u32 *msg, u32 len) argument
1677 xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg, u32 len) argument
1704 xe_guc_exec_queue_reset_failure_handler(struct xe_guc *guc, u32 *msg, u32 len) argument
1732 struct xe_guc *guc = exec_queue_to_guc(q); local
1957 xe_guc_submit_print(struct xe_guc *guc, struct drm_printer *p) argument
[all...]
H A Dxe_guc_debugfs.c26 struct xe_guc *guc = node_to_guc(m->private); local
27 struct xe_device *xe = guc_to_xe(guc);
31 xe_guc_print_info(guc, &p);
39 struct xe_guc *guc = node_to_guc(m->private); local
40 struct xe_device *xe = guc_to_xe(guc);
44 xe_guc_log_print(&guc->log, &p);
55 void xe_guc_debugfs_register(struct xe_guc *guc, struct dentry *parent) argument
57 struct drm_minor *minor = guc_to_xe(guc)->drm.primary;
62 local = drmm_kmalloc(&guc_to_xe(guc)->drm, DEBUGFS_SIZE, GFP_KERNEL);
70 local[i].data = guc;
[all...]
H A Dxe_uc_types.h18 /** @guc: Graphics micro controller */
19 struct xe_guc guc; member in struct:xe_uc
H A Dxe_wopcm_types.h17 /** @guc: GuC WOPCM Region info */
19 /** @guc.base: GuC WOPCM base which is offset from WOPCM base */
21 /** @guc.size: Size of the GuC WOPCM region */
23 } guc; member in struct:xe_wopcm
H A Dxe_gt_sriov_pf_policy_types.h25 * @guc: GuC scheduling policies.
28 struct xe_gt_sriov_guc_policies guc; member in struct:xe_gt_sriov_pf_policy
/linux-master/drivers/gpu/drm/i915/gt/
H A Dintel_wopcm.h15 * @guc: GuC WOPCM Region info.
16 * @guc.base: GuC WOPCM base which is offset from WOPCM base.
17 * @guc.size: Size of the GuC WOPCM region.
24 } guc; member in struct:intel_wopcm
39 return wopcm->guc.base;
54 return wopcm->guc.size;

Completed in 329 milliseconds

1234