Searched refs:CondCycles (Results 1 - 8 of 8) sorted by relevance
/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | EarlyIfConversion.cpp | 115 int CondCycles = 0, TCycles = 0, FCycles = 0; member in struct:__anon1850::SSAIfConv::PHIInfo 530 PI.TReg, PI.FReg, PI.CondCycles, PI.TCycles, 972 unsigned CondDepth = adjCycles(BranchDepth, PI.CondCycles); 1022 << Cycles{"CondCycles", Cond.Extra} << " to the critical path"; 1038 << Cycles{"CondCycles", Cond.Extra} << " to the critical path";
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/freebsd-current/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | TargetInstrInfo.h | 896 /// instruction will be 1 cycle, so CondCycles = TrueCycles = FalseCycles = 1 905 /// @param CondCycles Latency from Cond+Branch to select output. 911 int &CondCycles, int &TrueCycles, 908 canInsertSelect(const MachineBasicBlock &MBB, ArrayRef<MachineOperand> Cond, Register DstReg, Register TrueReg, Register FalseReg, int &CondCycles, int &TrueCycles, int &FalseCycles) const argument
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZInstrInfo.cpp | 553 Register FalseReg, int &CondCycles, 574 CondCycles = 2; 550 canInsertSelect(const MachineBasicBlock &MBB, ArrayRef<MachineOperand> Pred, Register DstReg, Register TrueReg, Register FalseReg, int &CondCycles, int &TrueCycles, int &FalseCycles) const argument
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIInstrInfo.h | 367 Register TrueReg, Register FalseReg, int &CondCycles,
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H A D | SIInstrInfo.cpp | 3173 Register FalseReg, int &CondCycles, 3184 CondCycles = TrueCycles = FalseCycles = NumInsts; // ??? 3204 CondCycles = TrueCycles = FalseCycles = NumInsts; // ???
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrInfo.cpp | 701 Register FalseReg, int &CondCycles, 725 CondCycles = 1 + ExtraCondLat; 738 CondCycles = 5 + ExtraCondLat; 698 canInsertSelect(const MachineBasicBlock &MBB, ArrayRef<MachineOperand> Cond, Register DstReg, Register TrueReg, Register FalseReg, int &CondCycles, int &TrueCycles, int &FalseCycles) const argument
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrInfo.cpp | 1508 Register FalseReg, int &CondCycles, 1544 CondCycles = 1; 1505 canInsertSelect(const MachineBasicBlock &MBB, ArrayRef<MachineOperand> Cond, Register DstReg, Register TrueReg, Register FalseReg, int &CondCycles, int &TrueCycles, int &FalseCycles) const argument
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86InstrInfo.cpp | 3996 Register FalseReg, int &CondCycles, 4020 CondCycles = 2;
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