/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86SelectionDAGInfo.cpp | 279 EVT DstVT = Dst.getValueType(); local 283 DAG.getNode(ISD::ADD, dl, DstVT, Dst, DAG.getConstant(Offset, dl, DstVT)),
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H A D | X86FastISel.cpp | 96 bool X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, unsigned Src, EVT SrcVT, 702 /// type SrcVT to type DstVT using the specified extension opcode Opc (e.g. 704 bool X86FastISel::X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, argument 707 unsigned RR = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Opc, 1220 EVT DstVT = VA.getValVT(); local 1222 if (SrcVT != DstVT) { 1229 assert(DstVT == MVT::i32 && "X86 should always ext to i32"); 1239 SrcReg = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Op, 1513 EVT DstVT = TLI.getValueType(DL, I->getType()); local 1514 if (!TLI.isTypeLegal(DstVT)) 1572 EVT DstVT = TLI.getValueType(DL, I->getType()); local 2524 EVT DstVT = TLI.getValueType(DL, I->getType()); local 3640 EVT DstVT = TLI.getValueType(DL, I->getType()); local [all...] |
H A D | X86ISelLowering.cpp | 11219 static bool matchShuffleAsVTRUNC(MVT &SrcVT, MVT &DstVT, MVT VT, 11241 DstVT = MVT::getIntegerVT(EltSizeInBits); 11244 DstVT = MVT::getVectorVT(DstVT, NumSrcElts); 11247 DstVT = MVT::getVectorVT(DstVT, 128 / EltSizeInBits); 11512 MVT DstVT = MVT::getVectorVT(DstSVT, NumSrcElts * 2); 11513 Res = DAG.getNode(PackOpcode, DL, DstVT, DAG.getBitcast(SrcVT, V1), 19503 EVT DstVT, EVT SrcVT, const SDLoc &DL, SDValue Chain, SDValue Pointer, 19507 bool useSSE = isScalarFPTypeInSSEReg(DstVT); [all...] |
H A D | X86ISelDAGToDAG.cpp | 1143 MVT DstVT = N->getSimpleValueType(0); local 1146 if (SrcVT.isVector() || DstVT.isVector()) 1154 bool DstIsSSE = X86Lowering->isScalarFPTypeInSSEReg(DstVT); 1170 MVT MemVT = (N->getOpcode() == ISD::FP_ROUND) ? DstVT : SrcVT; 1181 SDValue Result = CurDAG->getExtLoad(ISD::EXTLOAD, dl, DstVT, Store, 1199 MVT DstVT = N->getSimpleValueType(0); local 1202 if (SrcVT.isVector() || DstVT.isVector()) 1210 bool DstIsSSE = X86Lowering->isScalarFPTypeInSSEReg(DstVT); 1226 MVT MemVT = (N->getOpcode() == ISD::STRICT_FP_ROUND) ? DstVT : SrcVT; 1255 SDVTList VTs = CurDAG->getVTList(DstVT, MV [all...] |
H A D | X86ISelLowering.h | 1346 std::pair<SDValue, SDValue> BuildFILD(EVT DstVT, EVT SrcVT, const SDLoc &DL,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.h | 74 bool isTruncateFree(EVT SrcVT, EVT DstVT) const override; 76 bool isSExtCheaperThanZExt(EVT SrcVT, EVT DstVT) const override;
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H A D | RISCVISelLowering.cpp | 343 bool RISCVTargetLowering::isTruncateFree(EVT SrcVT, EVT DstVT) const { 344 if (Subtarget.is64Bit() || SrcVT.isVector() || DstVT.isVector() || 345 !SrcVT.isInteger() || !DstVT.isInteger()) 348 unsigned DestBits = DstVT.getSizeInBits(); 366 bool RISCVTargetLowering::isSExtCheaperThanZExt(EVT SrcVT, EVT DstVT) const { 367 return Subtarget.is64Bit() && SrcVT == MVT::i32 && DstVT == MVT::i64;
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCFastISel.cpp | 1067 MVT DstVT; local 1069 if (!isTypeLegal(DstTy, DstVT)) 1072 if (DstVT != MVT::f32 && DstVT != MVT::f64) 1093 if (DstVT == MVT::f32) 1116 if (DstVT == MVT::f32 && !Subtarget->hasFPCVT()) 1138 if (DstVT == MVT::f32) 1192 MVT DstVT, SrcVT; local 1194 if (!isTypeLegal(DstTy, DstVT)) 1197 if (DstVT ! [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 646 EVT DstVT = Op.getValueType(); local 647 if (SrcVT == DstVT) 651 unsigned NumDstEltBits = DstVT.getScalarSizeInBits(); 655 return DAG.getBitcast(DstVT, V); 677 return DAG.getBitcast(DstVT, V); 696 return DAG.getBitcast(DstVT, V); 795 EVT DstVT = Op.getValueType(); local 796 if (DemandedElts == 1 && DstVT.getSizeInBits() == SrcVT.getSizeInBits() && 799 return DAG.getBitcast(DstVT, Src); 6263 EVT DstVT [all...] |
H A D | FastISel.cpp | 1525 EVT DstVT = TLI.getValueType(DL, I->getType()); local 1527 if (SrcVT == MVT::Other || !SrcVT.isSimple() || DstVT == MVT::Other || 1528 !DstVT.isSimple()) 1533 if (!TLI.isTypeLegal(DstVT)) 1547 Register ResultReg = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), 1575 MVT DstVT = DstEVT.getSimpleVT(); local 1583 if (SrcVT == DstVT) { 1585 const TargetRegisterClass *DstClass = TLI.getRegClassFor(DstVT); 1596 ResultReg = fastEmit_r(SrcVT, DstVT, ISD::BITCAST, Op0, Op0IsKill); 1952 EVT DstVT local [all...] |
H A D | LegalizeIntegerTypes.cpp | 4184 EVT DstVT = N->getValueType(0); local 4185 RTLIB::Libcall LC = RTLIB::getSINTTOFP(Op.getValueType(), DstVT); 4191 TLI.makeLibCall(DAG, LC, DstVT, Op, CallOptions, SDLoc(N), Chain); 4304 EVT DstVT = N->getValueType(0); local 4305 RTLIB::Libcall LC = RTLIB::getUINTTOFP(Op.getValueType(), DstVT); 4311 TLI.makeLibCall(DAG, LC, DstVT, Op, CallOptions, SDLoc(N), Chain);
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H A D | DAGCombiner.cpp | 9659 EVT DstVT = N->getValueType(0); local 9690 !DstVT.isVector() || !DstVT.isPow2VectorType() || 9695 if (!ExtendUsesToFormExtLoad(DstVT, N, N0, N->getOpcode(), SetCCs, TLI)) 9703 EVT SplitDstVT = DstVT; 9713 assert(!DstVT.isScalableVector() && "Unexpected scalable vector type"); 9717 DstVT.getVectorNumElements() / SplitDstVT.getVectorNumElements(); 9739 SDValue NewValue = DAG.getNode(ISD::CONCAT_VECTORS, DL, DstVT, Loads);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | Scalarizer.cpp | 694 VectorType *DstVT = dyn_cast<VectorType>(BCI.getDestTy()); local 696 if (!DstVT || !SrcVT) 699 unsigned DstNumElems = cast<FixedVectorType>(DstVT)->getNumElements(); 708 Res[I] = Builder.CreateBitCast(Op0[I], DstVT->getElementType(), 714 auto *MidTy = FixedVectorType::get(DstVT->getElementType(), FanOut); 740 Res[ResI] = Builder.CreateBitCast(V, DstVT->getElementType(),
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64TargetTransformInfo.cpp | 437 auto DstVT = TLI->getValueType(DL, Dst); local 444 if (!VecLT.second.isVector() || !TLI->isTypeLegal(DstVT)) 449 if (DstVT.getSizeInBits() < SrcVT.getSizeInBits()) 464 if (DstVT.getSizeInBits() != 64u || SrcVT.getSizeInBits() == 32u)
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H A D | AArch64ISelDAGToDAG.cpp | 1264 EVT DstVT = N->getValueType(0); local 1287 DstVT = MVT::i32; 1291 if (DstVT == MVT::i64) 1297 InsertTo64 = DstVT == MVT::i64; 1300 DstVT = MVT::i32; 1304 if (DstVT == MVT::i64) 1310 InsertTo64 = DstVT == MVT::i64; 1313 DstVT = MVT::i32; 1334 SDNode *Res = CurDAG->getMachineNode(Opcode, dl, MVT::i64, DstVT,
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H A D | AArch64ISelLowering.cpp | 13817 EVT DstVT = N->getValueType(0); 13818 SDVTList VTs = DAG.getVTList(DstVT, MVT::Other);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 1528 MVT DstVT; 1530 if (!isTypeLegal(Ty, DstVT)) 1562 unsigned ResultReg = createResultReg(TLI.getRegClassFor(DstVT)); 1573 MVT DstVT; 1575 if (!isTypeLegal(RetTy, DstVT)) 1595 unsigned IntReg = ARMMoveToIntReg(DstVT, ResultReg);
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H A D | ARMISelLowering.cpp | 5905 /// When \p DstVT, the destination type of \p BC, is on the vector 5914 EVT DstVT = BC->getValueType(0); local 5922 if (!DstVT.isVector() || Op.getOpcode() != ISD::EXTRACT_VECTOR_ELT || 5932 unsigned DstNumElt = DstVT.getVectorNumElements(); 5947 *DAG.getContext(), DstVT.getScalarType(), 5950 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DstVT, BitCast, 5968 EVT DstVT = N->getValueType(0); local 5971 (DstVT == MVT::f16 || DstVT == MVT::bf16)) 5972 return MoveToHPR(SDLoc(N), DAG, MVT::i32, DstVT 15891 EVT DstVT = N->getValueType(0); local 17830 MVT DstVT = (Sz == 16 ? MVT::f32 : MVT::f64); local 17856 EVT DstVT = Op.getValueType(); local [all...] |
H A D | ARMISelLowering.h | 393 bool isTruncateFree(EVT SrcVT, EVT DstVT) const override;
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsFastISel.cpp | 1100 MVT DstVT, SrcVT; 1105 if (!isTypeLegal(DstTy, DstVT)) 1108 if (DstVT != MVT::i32)
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | CodeGenPrepare.cpp | 1205 EVT DstVT = TLI.getValueType(DL, CI->getType()); local 1208 if (SrcVT.isInteger() != DstVT.isInteger()) 1213 if (SrcVT.bitsLT(DstVT)) return false; 1221 if (TLI.getTypeAction(CI->getContext(), DstVT) == 1223 DstVT = TLI.getTypeToTransformTo(CI->getContext(), DstVT); 1226 if (SrcVT != DstVT)
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